Added an assertion to ensure ptr is not NULL before
dereferencing it. This prevents potential null pointer
dereference issues detected by Coverity.
Change-Id: I2e3325cd7cbdf141959bacd6135461be24ae6169
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>
In image_encrypt function, vulnerability arises
due to a mismatch between unsigned and signed
integer types. When a large unsigned integer
is returned by strlen and stored into signed
integer k, the value represented is a large
negative integer. This bypasses the subsequent
check against AES_BLOCK_SZ and allows a buffer
overflow to happen at memcpy.
Similar, vulnerability issue is fixed in
function verify_and_copy_file_name_entry.
Change-Id: I658521c1eec1c79933ba8082ba507df04d174e52
Signed-off-by: Jaiprakash Singh <jaiprakashs@marvell.com>
Update the 2GB LpDDR4 and DDR4 DT settings.
Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@foss.st.com>
Change-Id: I2c33105f31364ff15a66a0749b2400dd69db33e3
Enable WDQS extension mode requested by some device manufacturers.
No impact on other devices.
Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@foss.st.com>
Change-Id: I010b3932dd363c03e34b879fd68adae6dd28c27a
* changes:
refactor(arm): simplify early platform setup function in BL31
refactor(arm): simplify early platform setup function in BL2
feat(arm): add support for Transfer List creation
Refactor `arm_bl31_early_platform_setup` to accept generic u_register_t
values, enabling support for firmware handoff boot arguments in
common code. This simplifies the interface for early platform setup.
Signed-off-by: Jayanth Dodderi Chidanand <jayanthdodderi.chidanand@arm.com>
Change-Id: Iff20300d2372e1a9825827ddccbd1b3bc6751e40
Refactor `arm_bl2_early_platform_setup` to accept generic u_register_t
values, enabling support for firmware handoff boot arguments in
common code. This simplifies the interface for early platform setup.
Signed-off-by: Jayanth Dodderi Chidanand <jayanthdodderi.chidanand@arm.com>
Change-Id: Ie0dbe4d32bbef22bd185fdafe50091a2ea5f550f
This patch introduces Firmware Handoff support for Arm based
platforms listed under Firmware_Handoff specification.
[https://firmwarehandoff.github.io/firmware_handoff/main/transfer_list.html]
Signed-off-by: Jayanth Dodderi Chidanand <jayanthdodderi.chidanand@arm.com>
Change-Id: Ie3f30ffe38f809db907b663a8dbf1e48944ec690
The APU generic timer frequency in QEMU is now aligned on silicon to the
value of 100MHz.
Signed-off-by: Luc Michel <luc.michel@amd.com>
Change-Id: I4ef0a040c14fdb2fbb3f2d9d4e6ca6ee8ac8e229
QEMU uses a 62.5MHz clock frequency for the ARM generic timers.
Signed-off-by: Luc Michel <luc.michel@amd.com>
Change-Id: Ib846e17feb3cd44878a62add320fa4795fd5c69e
Report `FFA_MEM_PERM_GET` and `FFA_MEM_PERM_SET` supported to secure
world instances.
Signed-off-by: Karl Meakin <karl.meakin@arm.com>
Change-Id: I90e6b0ab601ae1142b419cacfa56109c183ab640
For some unknown reasons I did miss this '+' which does not make
sense when I submitted the former commit. We all did miss
it during codre reviews, sorry for the confusion. I do not understand
how it happened, late commits -> stupid issues.
Revert and fix: 634c7d81 fix create_pbl buildroot build
Wall -Werror -pedantic -std=c99 -O2 -DVERSION='"v2.12.0(release):master"' -D_GNU_SOURCE -D_XOPEN_SOURCE=700 -c -o create_pbl.o create_pbl.c
make[3]: Wall: No such file or directory
Change-Id: I1e17e4793061966ce5fa5e0c122914bfaed27952
Signed-off-by: Vincent Jardin <vjardin@free.fr>
* changes:
fix(psci): add const qualifier
fix(el3-runtime): add const qualifier
fix(bl31): add const qualifier
fix(console): typecast expressions to match data type
fix(arm-drivers): typecast expressions to match data type
fix(arm-drivers): align essential type categories
fix(arm-drivers): typecast expression to match data type
Warn users about disabled OCM coherency which is not enabled by
default in designs. If it is not enabled and TF-A is running out
of OCM,TF-A won't work properly.
This check is done only in Debug mode and isolation disabled.
Change-Id: I7661e0183503b71085c57fa35014341d14522203
Signed-off-by: Saivardhan Thatikonda <saivardhan.thatikonda@amd.com>
Some platforms do not support FEAT_MEC. Hence, they do not provide
an interface to update the update of the key corresponding to a
MECID.
This patch adds a condition in order to verify FEAT_MEC is present
before calling the corresponding platform hook, thus preventing it
from being called when the platform does not support the feature.
Change-Id: Ib1eb9e42f475e27ec31529569e888b93b207148c
Signed-off-by: Juan Pablo Conde <juanpablo.conde@arm.com>
* changes:
fix(versal): handle invalid entry point in cpu hotplug scenario
fix(versal-net): handle invalid entry point in cpu hotplug scenario
fix(zynqmp): handle invalid entry point in cpu hotplug scenario
Invalid addresses are from 2G-4G and also address where TF-A is.
Change-Id: I3d07808821da3bdd46be819ad829cb284f9d53d3
Signed-off-by: Maheedhar Bollapalli <maheedharsai.bollapalli@amd.com>
Invalid addresses are from 2G-4G and also address where TF-A is.
Change-Id: I153d26bd92ea26efcd7f236e2f1d89c3e5442ba4
Signed-off-by: Maheedhar Bollapalli <maheedharsai.bollapalli@amd.com>
Invalid addresses are from 2G-4G and also address where TF-A is.
Change-Id: Iedb817a2f9667b7d0b9a3ac03891a5b93295bf87
Signed-off-by: Maheedhar Bollapalli <maheedharsai.bollapalli@amd.com>
The compiler complains that it may be used unitialised. Give it some
confidence that won't be the case.
Change-Id: I14bddd48e4b205121415025175f157b92a89aa26
Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com>
- Define information structures for SMMU, root complex,
root port and BDF mappings.
- Add entries for SMMU and PCIe root complexes to Boot manifest.
- Update RMMD_MANIFEST_VERSION_MINOR from 4 to 5.
Change-Id: I0a76dc18edbaaff40116f376aeb56c750d57c7c1
Signed-off-by: AlexeiFedorov <Alexei.Fedorov@arm.com>
* changes:
refactor(arm): simplify early platform setup functions
feat(bl32): enable r3 usage for boot args
feat(handoff): add lib to sp-min sources
feat(handoff): add 32-bit variant of SRAM layout
feat(handoff): add 32-bit variant of ep info
fix(aarch32): avoid using r12 to store boot params
fix(arm): reinit secure and non-secure tls
refactor(handoff): downgrade error messages
* changes:
chore(cpus): rearrange the errata and cve order in Neoverse-N2
chore(cpus): rearrange cve in order in Cortex-X1
chore(cpus): fix cve order in Neoverse-V1
chore(cpus): fix cve order in Cortex-X2
chore(cpus): fix cve order in Cortex-A78C
chore(cpus): fix cve order in Cortex-A78_AE
chore(cpus): fix cve order in Cortex-A78
chore(cpus): fix cve order in Cortex-A77
Patch sorts the errata IDs in ascending order and the
CVE's in ascending order based on the year and index
for CPU Cortex-X4.
Change-Id: Ic304c2f68e7d0b96bbb30760696b7bceabe1ae2d
Signed-off-by: Sona Mathew <sonarebecca.mathew@arm.com>
Patch sorts the errata IDs in ascending order and the
CVE-2024-5660 in order based on the year and index
for Cortex-X3.
Change-Id: I2a4baebe0c3133528c089d999bdffa8c992f4989
Signed-off-by: Sona Mathew <sonarebecca.mathew@arm.com>
Patch rearranges CVE-2024-5660 in order based on
the year and index for Neoverse-V2.
Change-Id: I092a93ef3299fd733abae9c462c019f94d881413
Signed-off-by: Sona Mathew <sonarebecca.mathew@arm.com>
Patch sorts the errata IDs in ascending order and the
CVE's in ascending order based on the year and index
for CPU Neoverse N2.
Change-Id: Ieb4a8ab0030ea4e83efdef86a0ff1e2990b3e0dd
Signed-off-by: Sona Mathew <sonarebecca.mathew@arm.com>
