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Merge "feat(versal2): is OCM configured as coherent" into integration
This commit is contained in:
Joanna Farley
TrustedFirmware Code Review
commit
069232f553
4 changed files with 113 additions and 0 deletions
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@ -31,6 +31,8 @@
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#include <pm_api_sys.h>
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#include <pm_client.h>
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#include <plat_ocm_coherency.h>
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static entry_point_info_t bl32_image_ep_info;
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static entry_point_info_t bl33_image_ep_info;
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@ -140,6 +142,10 @@ void bl31_early_platform_setup2(u_register_t arg0, u_register_t arg1,
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setup_console();
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if (IS_TFA_IN_OCM(BL31_BASE) && (check_ocm_coherency() < 0)) {
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NOTICE("OCM coherency check not supported\n");
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}
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NOTICE("TF-A running on %s v%d.%d, RTL v%d.%d, PS v%d.%d, PMC v%d.%d\n",
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board_name_decode(),
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(platform_version >> 1), platform_version % 10U,
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20
plat/amd/versal2/include/plat_ocm_coherency.h
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20
plat/amd/versal2/include/plat_ocm_coherency.h
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@ -0,0 +1,20 @@
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/*
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* Copyright (c) 2025, Advanced Micro Devices, Inc. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#ifndef PLAT_OCM_COHERENCY_H
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#define PLAT_OCM_COHERENCY_H
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#define COHERENCY_CHECK_NOT_SUPPORTED -1
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#if (DEBUG == 1)
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int32_t check_ocm_coherency(void);
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#else
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static inline int32_t check_ocm_coherency(void)
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{
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return COHERENCY_CHECK_NOT_SUPPORTED;
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}
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#endif
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#endif/*PLAT_OCM_COHERENCY_H*/
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82
plat/amd/versal2/plat_ocm_coherency.c
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82
plat/amd/versal2/plat_ocm_coherency.c
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@ -0,0 +1,82 @@
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/*
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* Copyright (c) 2025, Advanced Micro Devices, Inc. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#include <common/debug.h>
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#include <lib/mmio.h>
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#include <plat_ocm_coherency.h>
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#include <platform_def.h>
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/*
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* Register non hash mem regions addresses
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*/
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#define POR_RNSAM_NODE_INFO_U_RNFBESAM_NID12 U(0xF8168000)
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#define NON_HASH_MEM_REGION_REG0 U(POR_RNSAM_NODE_INFO_U_RNFBESAM_NID12 + 0xC08)
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#define NON_HASH_MEM_REGION_REG1 U(POR_RNSAM_NODE_INFO_U_RNFBESAM_NID12 + 0xC0C)
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#define NON_HASH_MEM_REGION_REG2 U(POR_RNSAM_NODE_INFO_U_RNFBESAM_NID12 + 0xC10)
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#define NON_HASH_MEM_REGION_REG3 U(POR_RNSAM_NODE_INFO_U_RNFBESAM_NID12 + 0xC14)
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#define NON_HASH_MEM_REGION_REG4 U(POR_RNSAM_NODE_INFO_U_RNFBESAM_NID12 + 0xC18)
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#define NON_HASH_MEM_REGION_REG5 U(POR_RNSAM_NODE_INFO_U_RNFBESAM_NID12 + 0xC1C)
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#define NON_HASH_MEM_REGION_REG6 U(POR_RNSAM_NODE_INFO_U_RNFBESAM_NID12 + 0xC20)
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#define NON_HASH_MEM_REGION_REG7 U(POR_RNSAM_NODE_INFO_U_RNFBESAM_NID12 + 0xC24)
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#define REGION_BASE_ADDR_VALUE U(0x2E)
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#define REGION_BASE_ADDR_SHIFT 9
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#define REGION_BASE_ADDRESS_MASK GENMASK(30, REGION_BASE_ADDR_SHIFT)
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#define REGION_VALID_BIT BIT(0)
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/*
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* verify the register configured as non-hashed
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*/
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#define IS_NON_HASHED_REGION(reg) \
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((FIELD_GET(REGION_BASE_ADDRESS_MASK, mmio_read_32(reg)) == REGION_BASE_ADDR_VALUE) && \
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(mmio_read_32(reg) & REGION_VALID_BIT))
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/*
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* Splitter registers
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*/
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#define FPX_SPLITTER_0 U(0xECC20000)
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#define FPX_SPLITTER_1 U(0xECD20000)
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#define FPX_SPLITTER_2 U(0xECE20000)
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#define FPX_SPLITTER_3 U(0xECF20000)
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#define OCM_ADDR_DIST_MODE BIT(16)
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#define OCM_COHERENT 0
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#define OCM_NOT_COHERENT 1
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#define TFA_NOT_IN_OCM 2
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/*
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* Function that verifies the OCM is coherent or not with the following checks:
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* verify that OCM is in non hashed region or not if not then verify
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* OCM_ADDR_DIST_MODE bit in splitter registers is set.
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*/
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int32_t check_ocm_coherency(void)
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{
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int32_t status = OCM_COHERENT;
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/* isolation should be disabled in order to read these registers */
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if ((IS_NON_HASHED_REGION(NON_HASH_MEM_REGION_REG0) ||
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IS_NON_HASHED_REGION(NON_HASH_MEM_REGION_REG1) ||
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IS_NON_HASHED_REGION(NON_HASH_MEM_REGION_REG2) ||
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IS_NON_HASHED_REGION(NON_HASH_MEM_REGION_REG3) ||
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IS_NON_HASHED_REGION(NON_HASH_MEM_REGION_REG4) ||
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IS_NON_HASHED_REGION(NON_HASH_MEM_REGION_REG5) ||
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IS_NON_HASHED_REGION(NON_HASH_MEM_REGION_REG6) ||
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IS_NON_HASHED_REGION(NON_HASH_MEM_REGION_REG7))) {
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WARN("OCM is not configured as coherent\n");
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status = OCM_NOT_COHERENT;
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} else {
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/* verify OCM_ADDR_DIST_MODE bit in splitter registers is set */
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if (!((mmio_read_32(FPX_SPLITTER_0) & OCM_ADDR_DIST_MODE) &&
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(mmio_read_32(FPX_SPLITTER_1) & OCM_ADDR_DIST_MODE) &&
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(mmio_read_32(FPX_SPLITTER_2) & OCM_ADDR_DIST_MODE) &&
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(mmio_read_32(FPX_SPLITTER_3) & OCM_ADDR_DIST_MODE))) {
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WARN("OCM is not configured as coherent\n");
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status = OCM_NOT_COHERENT;
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}
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}
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return status;
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}
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@ -160,6 +160,11 @@ BL31_SOURCES += common/fdt_wrappers.c \
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${PLAT_PATH}/sip_svc_setup.c \
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${PLAT_PATH}/gicv3.c
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ifeq ($(DEBUG),1)
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BL31_SOURCES += ${PLAT_PATH}/plat_ocm_coherency.c
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endif
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ifeq (${ERRATA_ABI_SUPPORT}, 1)
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# enable the cpu macros for errata abi interface
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CORTEX_A78_AE_H_INC := 1
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