Djam/arm-trusted-firmware
1
0
Fork 0
mirror of https://github.com/ARM-software/arm-trusted-firmware.git synced 2025-04-04 11:53:55 +00:00
Code Issues Projects Releases Packages Wiki Activity Actions

Merge changes from topic "hm/handoff-aarch32" into integration

Browse source 
* changes:
  refactor(arm): simplify early platform setup functions
  feat(bl32): enable r3 usage for boot args
  feat(handoff): add lib to sp-min sources
  feat(handoff): add 32-bit variant of SRAM layout
  feat(handoff): add 32-bit variant of ep info
  fix(aarch32): avoid using r12 to store boot params
  fix(arm): reinit secure and non-secure tls
  refactor(handoff): downgrade error messages
This commit is contained in:
Manish Pandey 2025-03-24 17:29:57 +01:00 • committed by TrustedFirmware Code Review
commit 518b278bed
14 changed files with 45 additions and 38 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

18
bl2/aarch32/bl2_entrypoint.S
View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 2016-2022, ARM Limited and Contributors. All rights reserved.
* Copyright (c) 2016-2024, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@ -29,10 +29,10 @@ func bl2_entrypoint
* use.
* ---------------------------------------------
*/
mov r9, r0
mov r10, r1
mov r11, r2
mov r12, r3
mov r8, r0
mov r9, r1
mov r10, r2
mov r11, r3
/* ---------------------------------------------
* Set the exception vector to something sane.
@ -114,10 +114,10 @@ func bl2_entrypoint
* Perform BL2 setup
* ---------------------------------------------
*/
mov r0, r9
mov r1, r10
mov r2, r11
mov r3, r12
mov r0, r8
mov r1, r9
mov r2, r10
mov r3, r11
bl bl2_setup

6
bl32/sp_min/sp_min.mk
View file

@ -1,5 +1,5 @@
#
# Copyright (c) 2016-2024, Arm Limited and Contributors. All rights reserved.
# Copyright (c) 2016-2025, Arm Limited and Contributors. All rights reserved.
#
# SPDX-License-Identifier: BSD-3-Clause
#
@ -83,3 +83,7 @@ $(eval $(call assert_boolean,RESET_TO_SP_MIN))
SP_MIN_WITH_SECURE_FIQ ?= 0
$(eval $(call add_define,SP_MIN_WITH_SECURE_FIQ))
$(eval $(call assert_boolean,SP_MIN_WITH_SECURE_FIQ))
ifeq (${TRANSFER_LIST},1)
BL32_SOURCES += $(TRANSFER_LIST_SOURCES)
endif

3
bl32/sp_min/sp_min_main.c
View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 2016-2024, Arm Limited and Contributors. All rights reserved.
* Copyright (c) 2016-2025, Arm Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@ -113,6 +113,7 @@ static void copy_cpu_ctx_to_smc_stx(const regs_t *cpu_reg_ctx,
next_smc_ctx->r0 = read_ctx_reg(cpu_reg_ctx, CTX_GPREG_R0);
next_smc_ctx->r1 = read_ctx_reg(cpu_reg_ctx, CTX_GPREG_R1);
next_smc_ctx->r2 = read_ctx_reg(cpu_reg_ctx, CTX_GPREG_R2);
next_smc_ctx->r3 = read_ctx_reg(cpu_reg_ctx, CTX_GPREG_R3);
next_smc_ctx->lr_mon = read_ctx_reg(cpu_reg_ctx, CTX_LR);
next_smc_ctx->spsr_mon = read_ctx_reg(cpu_reg_ctx, CTX_SPSR);
next_smc_ctx->scr = read_ctx_reg(cpu_reg_ctx, CTX_SCR);

3
changelog.yaml
View file

@ -1276,6 +1276,9 @@ subsections:
- title: AArch64
scope: aarch64
- title: AArch32
scope: aarch32
- title: Debug
scope: debug

2
include/lib/transfer_list.h
View file

@ -62,6 +62,8 @@ enum transfer_list_tag_id {
TL_TAG_EXEC_EP_INFO64 = 0x102,
TL_TAG_SRAM_LAYOUT64 = 0x104,
TL_TAG_MBEDTLS_HEAP_INFO = 0x105,
TL_TAG_EXEC_EP_INFO32 = 0x106,
TL_TAG_SRAM_LAYOUT32 = 0x107,
};
enum transfer_list_ops {

4
include/plat/arm/common/plat_arm.h
View file

@ -298,8 +298,8 @@ void arm_transfer_list_get_heap_info(void **heap_addr, size_t *heap_size);
void arm_tsp_early_platform_setup(void);
/* SP_MIN utility functions */
void arm_sp_min_early_platform_setup(void *from_bl2, uintptr_t tos_fw_config,
uintptr_t hw_config, void *plat_params_from_bl2);
void arm_sp_min_early_platform_setup(u_register_t arg0, u_register_t arg1,
u_register_t arg2, u_register_t arg3);
void arm_sp_min_plat_runtime_setup(void);
void arm_sp_min_plat_arch_setup(void);

15
lib/transfer_list/transfer_list.c
View file

@ -176,35 +176,32 @@ transfer_list_check_header(const struct transfer_list_header *tl)
}
if (tl->signature != TRANSFER_LIST_SIGNATURE) {
ERROR("Bad transfer list signature 0x%x\n", tl->signature);
VERBOSE("Bad transfer list signature 0x%x\n", tl->signature);
return TL_OPS_NON;
}
if (!tl->max_size) {
ERROR("Bad transfer list max size 0x%x\n",
tl->max_size);
VERBOSE("Bad transfer list max size 0x%x\n", tl->max_size);
return TL_OPS_NON;
}
if (tl->size > tl->max_size) {
ERROR("Bad transfer list size 0x%x\n", tl->size);
VERBOSE("Bad transfer list size 0x%x\n", tl->size);
return TL_OPS_NON;
}
if (tl->hdr_size != sizeof(struct transfer_list_header)) {
ERROR("Bad transfer list header size 0x%x\n",
tl->hdr_size);
VERBOSE("Bad transfer list header size 0x%x\n", tl->hdr_size);
return TL_OPS_NON;
}
if (!transfer_list_verify_checksum(tl)) {
ERROR("Bad transfer list checksum 0x%x\n",
tl->checksum);
VERBOSE("Bad transfer list checksum 0x%x\n", tl->checksum);
return TL_OPS_NON;
}
if (tl->version == 0) {
ERROR("Transfer list version is invalid\n");
VERBOSE("Transfer list version is invalid\n");
return TL_OPS_NON;
} else if (tl->version == TRANSFER_LIST_VERSION) {
INFO("Transfer list version is valid for all operations\n");

4
plat/arm/board/a5ds/sp_min/a5ds_sp_min_setup.c
View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 2019, ARM Limited. All rights reserved.
* Copyright (c) 2019-2025, Arm Limited. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@ -11,7 +11,7 @@
void plat_arm_sp_min_early_platform_setup(u_register_t arg0, u_register_t arg1,
u_register_t arg2, u_register_t arg3)
{
arm_sp_min_early_platform_setup((void *)arg0, arg1, arg2, (void *)arg3);
arm_sp_min_early_platform_setup(arg0, arg1, arg2, arg3);
/* enable snoop control unit */
enable_snoop_ctrl_unit(A5DS_SCU_BASE);

4
plat/arm/board/corstone700/sp_min/corstone700_sp_min_setup.c
View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 2019, Arm Limited and Contributors. All rights reserved.
* Copyright (c) 2019-2025, Arm Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@ -9,5 +9,5 @@
void plat_arm_sp_min_early_platform_setup(u_register_t arg0, u_register_t arg1,
u_register_t arg2, u_register_t arg3)
{
arm_sp_min_early_platform_setup((void *)arg0, arg1, arg2, (void *)arg3);
arm_sp_min_early_platform_setup(arg0, arg1, arg2, arg3);
}

4
plat/arm/board/fvp/sp_min/fvp_sp_min_setup.c
View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 2016-2023, Arm Limited and Contributors. All rights reserved.
* Copyright (c) 2016-2025, Arm Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@ -34,7 +34,7 @@ void plat_arm_sp_min_early_platform_setup(u_register_t arg0, u_register_t arg1,
}
#endif /* !RESET_TO_SP_MIN && !RESET_TO_BL2 */
arm_sp_min_early_platform_setup((void *)arg0, arg1, arg2, (void *)arg3);
arm_sp_min_early_platform_setup(arg0, arg1, arg2, arg3);
/* Initialize the platform config for future decision making */
fvp_config_setup();

4
plat/arm/board/fvp_ve/sp_min/fvp_ve_sp_min_setup.c
View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 2019, Arm Limited. All rights reserved.
* Copyright (c) 2019-2025, Arm Limited. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@ -11,5 +11,5 @@
void plat_arm_sp_min_early_platform_setup(u_register_t arg0, u_register_t arg1,
u_register_t arg2, u_register_t arg3)
{
arm_sp_min_early_platform_setup((void *)arg0, arg1, arg2, (void *)arg3);
arm_sp_min_early_platform_setup(arg0, arg1, arg2, arg3);
}

2
plat/arm/common/arm_bl1_setup.c
View file

@ -90,7 +90,7 @@ void arm_bl1_early_platform_setup(void)
bl1_tzram_layout.total_size = ARM_BL_RAM_SIZE;
#if TRANSFER_LIST
secure_tl = transfer_list_ensure((void *)PLAT_ARM_EL3_FW_HANDOFF_BASE,
secure_tl = transfer_list_init((void *)PLAT_ARM_EL3_FW_HANDOFF_BASE,
PLAT_ARM_FW_HANDOFF_SIZE);
assert(secure_tl != NULL);
#endif

4
plat/arm/common/arm_bl31_setup.c
View file

@ -382,8 +382,8 @@ void arm_bl31_platform_setup(void)
struct transfer_list_entry *te __unused;
#if TRANSFER_LIST && !RESET_TO_BL31
ns_tl = transfer_list_ensure((void *)FW_NS_HANDOFF_BASE,
PLAT_ARM_FW_HANDOFF_SIZE);
ns_tl = transfer_list_init((void *)FW_NS_HANDOFF_BASE,
PLAT_ARM_FW_HANDOFF_SIZE);
if (ns_tl == NULL) {
ERROR("Non-secure transfer list initialisation failed!\n");
panic();

10
plat/arm/common/sp_min/arm_sp_min_setup.c
View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 2016-2024, ARM Limited and Contributors. All rights reserved.
* Copyright (c) 2016-2025, Arm Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@ -61,8 +61,8 @@ entry_point_info_t *sp_min_plat_get_bl33_ep_info(void)
/*******************************************************************************
* Utility function to perform early platform setup.
******************************************************************************/
void arm_sp_min_early_platform_setup(void *from_bl2, uintptr_t tos_fw_config,
uintptr_t hw_config, void *plat_params_from_bl2)
void arm_sp_min_early_platform_setup(u_register_t arg0, u_register_t arg1,
u_register_t arg2, u_register_t arg3)
{
/* Initialize the console to provide early debug support */
arm_console_boot_init();
@ -99,7 +99,7 @@ void arm_sp_min_early_platform_setup(void *from_bl2, uintptr_t tos_fw_config,
/*
* Check params passed from BL2 should not be NULL,
*/
bl_params_t *params_from_bl2 = (bl_params_t *)from_bl2;
bl_params_t *params_from_bl2 = (bl_params_t *)arg0;
assert(params_from_bl2 != NULL);
assert(params_from_bl2->h.type == PARAM_BL_PARAMS);
assert(params_from_bl2->h.version >= VERSION_2);
@ -132,7 +132,7 @@ void arm_sp_min_early_platform_setup(void *from_bl2, uintptr_t tos_fw_config,
void plat_arm_sp_min_early_platform_setup(u_register_t arg0, u_register_t arg1,
u_register_t arg2, u_register_t arg3)
{
arm_sp_min_early_platform_setup((void *)arg0, arg1, arg2, (void *)arg3);
arm_sp_min_early_platform_setup(arg0, arg1, arg2, arg3);
/*
* Initialize Interconnect for this cluster during cold boot.