Commit graph

431 commits

Author SHA1 Message Date
Chungying Lu
baa0d45ced feat(mediatek): add APU watchdog timeout control
Add APU watchdog timeout control.

Change-Id: I21d65a88d20b6b2752a75f74487b5fe6596ebdf7
Signed-off-by: Chungying Lu <chungying.lu@mediatek.com>
Signed-off-by: Karl Li <karl.li@mediatek.com>
2023-06-06 13:45:40 +08:00
Chungying Lu
176846a50b feat(mt8188): add emi mpu protection for APU secure memory
Add emi mpu protection of APU secure memory.

Change-Id: I949cfce97565d8a313caae4ea41af60a171042a6
Signed-off-by: Chungying Lu <chungying.lu@mediatek.com>
Signed-off-by: Karl Li <karl.li@mediatek.com>
2023-06-06 13:45:40 +08:00
Karl Li
5986ae57aa feat(mt8188): add devapc setting of apusys rcx
Apusys rcx is a subsys in apusys, and it is a basic domain of APU and
it connects several components in APU.
The devapc control of apusys rcx is also inside APU and it can only be
set when APU is powered on.
Then apusys kernel driver will trigger rcx devapc init by ATF smc call.

Change-Id: If4249f22a08690b1e4f5aa5f0cbfb54ccacf90e1
Signed-off-by: Karl Li <karl.li@mediatek.com>
Signed-off-by: Chungying Lu <chungying.lu@mediatek.com>
2023-06-06 13:45:40 +08:00
Chungying Lu
233d604f50 feat(mt8188): add backup/restore function when power on/off
Add APU backup/restore function when power on/off.

Change-Id: Id0451bd12f402e1acabeb5c12266a2e01836e9dd
Signed-off-by: Chungying Lu <chungying.lu@mediatek.com>
Signed-off-by: Karl Li <karl.li@mediatek.com>
2023-06-06 13:45:40 +08:00
Chungying Lu
94a9e6243e feat(mediatek): add APU bootup control smc call
Add APU bootup control smc call.
The steps of bootup flow:
  1. set up APU config.
  2. reset APU.
  3. set up APU boot config.
  4. boot APU.

Change-Id: I9e930070a64c7c4dcaa3a8b3d28b897823e9f53c
Signed-off-by: Chungying Lu <chungying.lu@mediatek.com>
Signed-off-by: Karl Li <karl.li@mediatek.com>
2023-06-06 13:45:40 +08:00
Karl Li
ad7673adef feat(mt8188): enable apusys mailbox mpu protect
Enable apusys mailbox mpu protect.

Change-Id: Idbf67084037b7ecf4926f57a901075f98540ee57
Signed-off-by: Karl Li <karl.li@mediatek.com>
Signed-off-by: Chungying Lu <chungying.lu@mediatek.com>
2023-06-06 13:45:40 +08:00
Karl Li
b5900c92a1 feat(mt8188): enable apusys domain remap
Enable apusys domain remap to protect no-protect memory.
  - Remap request which from domain 5 to domain 14.
  - Remap request which from domain 7 to domain 14.

Change-Id: Iccd188e3b8edbe916fa9767c841a844b66c6011f
Signed-off-by: Karl Li <karl.li@mediatek.com>
Signed-off-by: Chungying Lu <chungying.lu@mediatek.com>
2023-06-06 13:45:40 +08:00
Karl Li
777e3b71bb feat(mt8188): add apusys ao devapc setting
Apusys ao devapc is a set of control registers inside APU, and it
controls the access permission of APU ao domain.
Moreover, apusys ao devapc must be set after apusys power init, so
we need to place the drivers in TF-A instead of coreboot.

Change-Id: Ife849c32d4dd9dca15432d4b8a51753fde61b148
Signed-off-by: Karl Li <karl.li@mediatek.com>
Signed-off-by: Chungying Lu <chungying.lu@mediatek.com>
2023-06-06 13:45:40 +08:00
Karl Li
aa1cb279b6 feat(mt8188): increase TZRAM_SIZE from 192KB to 256KB
Increase TZRAM_SIZE to 256KB for MT8188 APUSYS.

Change-Id: Iabe1a4aeb79ba23c3e963170a8eb9ce19f2925f3
Signed-off-by: Karl Li <karl.li@mediatek.com>
2023-06-06 13:44:03 +08:00
Manish Pandey
4bd8c929b4 Merge changes I1bfa797e,I0ec7a70e into integration
* changes:
  fix(tree): correct some typos
  fix(rockchip): use semicolon instead of comma
2023-05-09 22:05:52 +02:00
Elyes Haouas
1b491eead5 fix(tree): correct some typos
found using codespell (https://github.com/codespell-project/codespell).

Signed-off-by: Elyes Haouas <ehaouas@noos.fr>
Change-Id: I1bfa797e3460adddeefa916bb68e22beddaf6373
2023-05-09 15:57:12 +01:00
Jason Chen
f85b34b112 feat(mt8188): add MT8188 SPM debug logs
Add debug logs for tracking the status of suspend and resume.

Change-Id: Id2d2ab06fadb3118ab66f816937e0dd6e43dbdc3
Signed-off-by: Jason Chen <Jason-ch.Chen@mediatek.com>
2023-05-08 10:49:11 +08:00
Chungying Lu
8e38b92849 feat(mt8188): add apu power on/off control
Add mt8188 apu power on/off control

Change-Id: I8e28bf7a4ad4067553981c67c4c2225fdd802859
Signed-off-by: Chungying Lu <chungying.lu@mediatek.com>
Signed-off-by: jason-ch chen <Jason-ch.Chen@mediatek.com>
2023-04-06 13:42:55 +08:00
Mark Dykes
a251f99a47 Merge "feat(mediatek): add APU init flow" into integration 2023-03-29 14:33:37 +02:00
Chungying Lu
5243091633 feat(mediatek): add APU init flow
The patch brings preparation steps before powering on APU
(AI processing unit)

Change-Id: Ica01e035153ec6f3af0de6ba2c66b17a064f8c89
Signed-off-by: Chungying Lu <chungying.lu@mediatek.com>
2023-03-29 16:25:17 +08:00
Andre Przywara
d23acc9e4f refactor(amu): unify ENABLE_AMU and ENABLE_FEAT_AMUv1
So far we have the ENABLE_AMU build option to include AMU register
handling code for enabling and context switch. There is also an
ENABLE_FEAT_AMUv1 option, solely to protect the HAFGRTR_EL2 system
register handling. The latter needs some alignment with the new feature
scheme, but it conceptually overlaps with the ENABLE_AMU option.

Since there is no real need for two separate options, unify both into a
new ENABLE_FEAT_AMU name in a first step. This is mostly just renaming at
this point, a subsequent patch will make use of the new feature handling
scheme.

Change-Id: I97d8a55bdee2ed1e1509fa9f2b09fd0bdd82736e
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2023-03-27 19:36:00 +01:00
Olivier Deprez
5fdb2e5471 Merge changes I924ea85d,I22e128c4,I7a5cfaac into integration
* changes:
  feat(mt8195): add support for SMC from OP-TEE
  feat(mediatek): add SMC handler for EMI MPU
  feat(mediatek): add SiP service for OP-TEE
2023-03-21 10:46:41 +01:00
Bo-Chen Chen
ccc61e1002 feat(mt8195): add support for SMC from OP-TEE
- Add MTK_SIP_SMC_FROM_S_EL1_TABLE to handle the SMC call from OP-TEE.
- Register optee SMC ID for EMI MPU.

Signed-off-by: Bo-Chen Chen <rex-bc.chen@mediatek.com>
Signed-off-by: Ming Huang <ming.huang@mediatek.com>
Signed-off-by: jason-ch chen <Jason-ch.Chen@mediatek.com>
Change-Id: I924ea85d29d4113e92d8f3d411c0fb77daa0c205
2023-03-21 10:51:55 +08:00
Bo-Chen Chen
c842cc0e5d feat(mediatek): add SMC handler for EMI MPU
EMI MPU will handle the SMC call from optee, so we need to add this
patch to support it.

Signed-off-by: Bo-Chen Chen <rex-bc.chen@mediatek.com>
Signed-off-by: jason-ch chen <Jason-ch.Chen@mediatek.com>
Change-Id: I22e128c4246814cbd5855f51a26e4e11ccfe3a6b
2023-03-21 10:49:17 +08:00
Bo-Chen Chen
621eaab5cc feat(mediatek): add SiP service for OP-TEE
Add SiP service for the SMC call from the secure world.

Signed-off-by: Bo-Chen Chen <rex-bc.chen@mediatek.com>
Signed-off-by: jason-ch chen <Jason-ch.Chen@mediatek.com>
Change-Id: I7a5cfaac5c46ea65be793c3d291e4332cc0b2e54
2023-03-21 10:48:25 +08:00
Chris Kay
da04341ed5 build: always prefix section names with .
Some of our specialized sections are not prefixed with the conventional
period. The compiler uses input section names to derive certain other
section names (e.g. `.rela.text`, `.relacpu_ops`), and these can be
difficult to select in linker scripts when there is a lack of a
delimiter.

This change introduces the period prefix to all specialized section
names.

BREAKING-CHANGE: All input and output linker section names have been
 prefixed with the period character, e.g. `cpu_ops` -> `.cpu_ops`.

Change-Id: I51c13c5266d5975fbd944ef4961328e72f82fc1c
Signed-off-by: Chris Kay <chris.kay@arm.com>
2023-02-20 18:29:33 +00:00
Chris Kay
a6ff0067ab build: permit multiple linker scripts
This change allows platforms to provide more than one linker script to
any image utilizing the `MAKE_BL` build system macro.

This is already done by some MediaTek platforms via the
`EXTRA_LINKERFILE` build system variable, which has now been removed.

In its place, additional linker scripts may be added to the
`<IMAGE>_LINKER_SCRIPT_SOURCES` variable.

BREAKING-CHANGE: The `EXTRA_LINKERFILE` build system variable has been
 replaced with the `<IMAGE>_LINKER_SCRIPT_SOURCES` variable. See the
 commit message for more information.

Change-Id: I3f0b69200d6a4841fd158cd09344ce9e67047271
Signed-off-by: Chris Kay <chris.kay@arm.com>
2023-02-10 17:01:47 +00:00
Liju-Clr Chen
a321337bd2 refactor(mediatek): add new LPM API for further extension
Add new LPM API `mt_lp_rm_find_constraint` and `mt_lp_rm_run_constraint`
for further extension.

Signed-off-by: Liju-Clr Chen <liju-clr.chen@mediatek.com>
Change-Id: I8298811e03227285a7d086166edf9e87471f74b4
2023-01-11 13:37:51 +08:00
Liju-Clr Chen
b0208c73af refactor(mediatek): change the parameters of LPM API
Change the parameters of the LPM API for further extension.

Change-Id: Id8897c256c2118d00c6b9f3e7424ebc6100f02eb
Signed-off-by: Liju-Clr Chen <liju-clr.chen@mediatek.com>
2023-01-11 13:37:50 +08:00
Liju-Clr Chen
1c5fc9a254 refactor(mediatek): change LPM header file path for further extension
Move `mt_lp_rm.h` to `plat/mediatek/include/lpm` for further extension.

Change-Id: If377ce6791ce80f82643b0f2466eb0f1aa5aa40b
Signed-off-by: Liju-Clr Chen <liju-clr.chen@mediatek.com>
2023-01-11 13:37:48 +08:00
Shaocheng Wang
e56a939cab feat(mt8188): keep infra and peri on when system suspend
In order to wake up system from USB devices, keep infra and peri on
when system suspend.

Change-Id: I0a0eb2e72709b0cc1bf11b36241a50cb5d85d9b8
Signed-off-by: Shaocheng Wang <shaocheng.wang@mediatek.corp-partner.google.com>
2023-01-11 13:37:47 +08:00
James Liao
380f64b2e3 feat(mt8188): enable SPM and LPM
Enable SPM and LPM features for MT8188.

Signed-off-by: James Liao <jamesjj.liao@mediatek.com>
Change-Id: Ib3e2b305e9e3cf5a67e6e787ff942831b5ff28cd
2023-01-11 13:37:45 +08:00
James Liao
f299efbea6 feat(mt8188): add SPM feature support
Add SPM low power functions, such as system suspend.

Change-Id: I6d1ad847a81ba9c347ab6fb8a8cb8c69004b7add
Signed-off-by: James Liao <jamesjj.liao@mediatek.com>
2023-01-11 13:37:43 +08:00
James Liao
45d507599e feat(mt8188): add MT8188 SPM support
Add SPM basic functions including SPM init.

Signed-off-by: James Liao <jamesjj.liao@mediatek.com>
Change-Id: I5d4860685c15f3b8d555e697837862287f0c303e
2023-01-11 13:37:42 +08:00
James Liao
c234ad17d7 feat(mediatek): add SPM's SSPM notifier
The notifier is used to notify SSPM to sleep when system suspend or
notify SSPM to wakeup when system resume.

Change-Id: I027ca356a84ea1e58be54a8a5eb302b3b96c2e22
Signed-off-by: James Liao <jamesjj.liao@mediatek.com>
2023-01-11 13:37:40 +08:00
James Liao
1a64689df5 feat(mt8188): add the register definitions accessed by SPM
SPM needs to access some modules' registers to decide its sleep
behavior. This patch add these register definitions to platform_def.h.

Signed-off-by: James Liao <jamesjj.liao@mediatek.com>
Change-Id: I3bebe74e367d5f6a7b59563036e18a83a3ef31e9
2023-01-11 13:37:38 +08:00
James Liao
917abdd990 feat(mediatek): add new features of LPM
Add new functions and intefaces of LPM to support more interactions
between LPM providers and users.

Signed-off-by: James Liao <jamesjj.liao@mediatek.com>
Change-Id: I8ebbda0c0ef5be3a7a388a38c09424ebf785996f
2023-01-11 13:37:36 +08:00
Manish Pandey
601e2d4325 Merge changes from topic "bk/warnings" into integration
* changes:
  docs: describe the new warning levels
  build: add -Wunused-const-variable=2 to W=2
  build: include -Wextra in generic builds
  docs(porting-guide): update a reference
  fix(st-usb): replace redundant checks with asserts
  fix(brcm): add braces around bodies of conditionals
  fix(renesas): align incompatible function pointers
  fix(zynqmp): remove redundant api_version check
  fix: remove old-style declarations
  fix: unify fallthrough annotations
2023-01-10 11:56:42 +01:00
Chengci.Xu
98415e1a80 feat(mt8188): update INFRA IOMMU enable flow
IOMMU kernel driver has changed the function parameters, so update
IOMMU TF-A driver to be consistent with it.

Change-Id: I2adda69bdbdc31833781fac5e6c1f4b10da161be
Signed-off-by: Chengci.Xu <chengci.xu@mediatek.com>
2023-01-06 09:42:33 +08:00
Boyan Karatotev
e138400d1c fix: unify fallthrough annotations
Compiling with -Wimplicit-fallthrough=3 (enabled by -Wextra) produces
many warnings about fallthrough comments either missing or being wrong.
Unify the comments so we comply with -Wextra.

Note that Coverity recommends against using the __attribute__ directive.
Also, zlib does not build with a higher value of -Wimplicit-fallthrough.
Finally, compilers strip comments before expanding macros. As such,
checkpatch's fallthrough annotation (or higher levels of the flag) isn't
really possible.

Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com>
Change-Id: I060cf4f8dc04c02cbb45cf4ceb69569a8369ccee
2022-12-01 16:17:24 +00:00
Liju-Clr Chen
32071c0263 fix(mt8188): add mmap entry for CPU idle SRAM
CPU PM driver accesses CPU idle SRAM during the system suspend
process. The region of CPU idle SRAM needs to be added as mmap entry.
Otherwise, the execption would occur.

BUG=b:244215539
TEST=Test of suspend resume passes.

Signed-off-by: Liju-Clr Chen <liju-clr.chen@mediatek.com>
Change-Id: I5838964fd9cb1b833e4006e2123febb4a4601003
2022-11-14 15:54:09 +08:00
James Liao
210ebbb0a6 fix(mt8188): refine gic init flow after system resume
Call gicv3_distif_init() instead of mt_gic_init() in
armv8_2_mcusys_pwr_on_common(). This is to prevent
gicv3_rdistif_init() and gicv3_cpuif_enable() from being called twice
in the power-on flow. gicv3_rdistif_init() and gicv3_cpuif_enable()
are called in later armv8_2_cpu_pwr_on_common().

BUG=b:244215539
TEST=Suspend Resume Test pass

Change-Id: Id752c1ccbb9eab277ed6278c2dd90a051a894146
Signed-off-by: Liju-Clr Chen <liju-clr.chen@mediatek.com>
2022-11-14 09:55:07 +08:00
Allen-KH Cheng
600f168172 fix(mt8186): fix the DRAM voltage after the system resumes
The DRAM power supply must sustain at 0.8V after the system resumes.
Otherwise, unexpected errors would occur. Therefore, we update the
DRAM voltage to 0.8v in PMIC voltage wrap table.

BUG=b:253537849
TEST=Suspend Resume Test

Signed-off-by: Allen-KH Cheng <allen-kh.cheng@mediatek.corp-partner.google.com>
Change-Id: Idd42d5a2d646468822e391e48d01d870c3b7f0d3
2022-11-14 09:55:07 +08:00
Trevor Wu
c70f567ad7 feat(mt8188): add audio support
For MT8188, MTK_AUDIO_SMC_OP_DOMAIN_SIDEBANDS is required for normal
mode switch.
  - Add audio common code and chip specific code.
  - Add new id (MTK_SIP_AUDIO_CONTROL) to mtk_sip_def.h.
  - Enable for MT8188.

Signed-off-by: Trevor Wu <trevor.wu@mediatek.com>
Change-Id: Iff4680cd0b520b2b519ecf30ecafe100f147cc62
2022-11-14 09:55:07 +08:00
Liju-Clr Chen
f278d84ded refactor(mt8195): use ptp3 common drivers
Some 8195 ptp3 drivers are the same in plat/mediatek/drivers/ptp3, so
add this patch to reuse them.

Change-Id: I2b1801a73b6a2979e20d49d314c57f663dc5bf04
Signed-off-by: Liju-Clr Chen <liju-clr.chen@mediatek.com>
2022-11-14 09:55:07 +08:00
Riven Chen
44a10511c9 feat(mt8188): add support for PTP3
Add PTP3 driver to protect CPU from excessive voltage drop in CPU
heavy loading.

Signed-off-by: Riven Chen <riven.chen@mediatek.corp-partner.google.com>
Change-Id: I394096be43e1d1d615f99b22f38f0b3ae0bb40c1
2022-11-14 09:55:07 +08:00
Rex-BC Chen
0b1186a3e6 feat(mt8188): enable MTK_PUBEVENT_ENABLE
Enable MTK_PUBEVENT_ENABLE for subscribing CPUPM events. This
patch also corrects the header file naming.

Signed-off-by: Bo-Chen Chen <rex-bc.chen@mediatek.com>
Change-Id: Iabd89a4ead21ccafa833390367484bfea5d351f6
2022-11-14 09:55:07 +08:00
Rex-BC Chen
fcf4dd9f79 fix(mediatek): switch console to runtime state before leaving BL31
We should switch console to runtime state. If we don't do this, the
state will keep boot state even we exit from BL31.

Signed-off-by: Bo-Chen Chen <rex-bc.chen@mediatek.com>
Change-Id: Id2269ccf2fdc22e0fa088c3c0365836730172233
2022-10-26 21:24:25 +08:00
Tinghan Shen
28a8b738fe fix(mt8186): fix EMI_MPU domain setting for DSP
Correct the domain setting for DSP. It should be 6.

BUG=b:249954378
TEST=audio is functional.

Change-Id: Ie79aa0dad3d2b1ef5de0f2acc51ded13b6f085ac
Signed-off-by: Tinghan Shen <tinghan.shen@mediatek.com>
2022-10-11 13:14:48 +08:00
Olivier Deprez
af1ee1fad2 Merge changes from topic "mt8188 cpu_pm" into integration
* changes:
  feat(mediatek): move lpm drivers back to common
  feat(mt8188): add cpu_pm driver
  fix(mt8188): refine c-state power domain for extensibility
2022-10-05 13:37:10 +02:00
Yidi Lin
8a998b5aca fix(mt8186-emi-mpu): fix SCP permission
Hardware video decoding is not working after enabling EMI MPU protection
for SCP.

According to coreboot DEVAPC setting, SCP belongs to domain 4 instead of
domain 3. So correct the permission setting.

BUG=b:249954378
TEST=play video and see codec irq count is incrementing.

Signed-off-by: Yidi Lin <yidilin@chromium.org>
Change-Id: If71de3eabf8682909f96924c159aa92f25deb96c
2022-10-04 22:31:16 +08:00
Bo-Chen Chen
cd7890d79e feat(mediatek): move lpm drivers back to common
In order to sync drivers with MediaTek internal code base, we move lpm
drivers back to common folder.

Signed-off-by: Bo-Chen Chen <rex-bc.chen@mediatek.com>
Change-Id: I1066e092febe0abb9782a46f668613e137737c88
2022-10-04 09:52:10 +08:00
Edward-JW Yang
4fe7e6a8d9 feat(mt8188): add cpu_pm driver
- Add cpu_pm driver for CPU idle and SMP flow.
- Add SMP driver for CPU power on/off control.
- Add CPC driver to handle CPU powered on/off in CPU suspend.
- Add mbox driver for tinysys support.

Signed-off-by: Edward-JW Yang <edward-jw.yang@mediatek.com>
Change-Id: I20141474e1c43cdfacb9f2c6a2285721e50a617c
2022-10-04 09:52:10 +08:00
Edward-JW Yang
e35f4cbf80 fix(mt8188): refine c-state power domain for extensibility
1. MT8188 uses "suspend to RAM" instead of "suspend to idle", so
   remove s2idle state.
2. Definition c-state power domain:
    - bit[7:4] (main state id):
      1: Cluster.
      2: Mcusys.
      3: Memory.
      4: System pll.
      5: System bus.
      6: SoC 26m/DCXO.
      7: Vcore buck.
      15: Suspend.
    - bit[3:0] (reserved for state_id extension):
      4: CPU buck.

Signed-off-by: Edward-JW Yang <edward-jw.yang@mediatek.corp-partner.google.com>
Change-Id: Ibacd3d642f78726e1f1c08f18892481d2695f9e6
2022-10-04 09:44:08 +08:00
Bo-Chen Chen
a64d9f442e refactor(mt8188): move platform_def.h to mt8188/include
It is more suitable to place platform_def.h in mt8188/include.

Signed-off-by: Bo-Chen Chen <rex-bc.chen@mediatek.com>
Change-Id: I35720690ff4f2ca99c9430edb8bbe17edf9aefb9
2022-09-22 19:26:15 +08:00