Commit graph

431 commits

Author SHA1 Message Date
Runyang Chen
2be3014f6b refactor(mediatek): fix mcusys off issue for MTK GIC v3 driver
When mcusys is off, rdist_ctx will save the rdist data of the last core.
In the case of the last core plug off, the data of other cores will be
inconsistent with the data in rdist_ctx.

Therefore, each core needs to use a dedicated context.

Signed-off-by: Runyang Chen <runyang.chen@mediatek.com>
Change-Id: Ic9501f4da219cf906c0e348982be3f550c3ba30b
2025-03-21 06:38:05 +01:00
Cathy Xu
6f891e6896 feat(mt8196): fix MT8196 gpio driver
- Add GPIO_BASE in mtgpio.c
- Modify gpio register address

Signed-off-by: Cathy Xu <ot_cathy.xu@mediatek.com>
Change-Id: I648473fa373d208fa29c7069637974e097b75b26
2025-02-27 16:10:45 +08:00
Wenzhen Yu
11855267b5 fix(mt8196): remove EC_SUSPEND_PIN initial setting
Move EC_SUSPEND_PIN (GPIO_AP_SUSPEND_L) init to coreboot and remove
EC_SUSPEND_PIN init from TF-A.

Signed-off-by: Wenzhen Yu <wenzhen.yu@mediatek.com>
Change-Id: I3d7a5a923dc9f692495d99255427a39ef5852bf8
2025-02-13 20:33:52 +08:00
Wenzhen Yu
ee2e99c3e3 fix(mt8196): remove SPM support for ES chip
We no longer maintain the device equipped with ES chip. Remove SPM
support for ES ship.

Signed-off-by: Wenzhen Yu <wenzhen.yu@mediatek.com>
Change-Id: I5b2d035ec384a9861239f33dbe6df54c17f1285c
2025-02-13 20:33:43 +08:00
Govindraj Raja
a58d99ec67 Merge "feat(mt8196): disable debug flag in APU driver" into integration 2025-02-12 17:13:08 +01:00
Gavin Liu
31137e1b15 feat(mt8196): disable debug flag in APU driver
Disable the debug flag from the driver to reduce debugging messages.

Change-Id: I9444f64acbf684debab56d8226b14c6c01200ea4
Signed-off-by: Gavin Liu <gavin.liu@mediatek.com>
2025-02-12 10:48:35 +08:00
Manish Pandey
fcb80d7d14 Merge changes I765a7fa0,Ic33f0b6d,I8d1a88c7,I381f96be,I698fa849, ... into integration
* changes:
  fix(cpus): clear CPUPWRCTLR_EL1.CORE_PWRDN_EN_BIT on reset
  chore(docs): drop the "wfi" from `pwr_domain_pwr_down_wfi`
  chore(psci): drop skip_wfi variable
  feat(arm): convert arm platforms to expect a wakeup
  fix(cpus): avoid SME related loss of context on powerdown
  feat(psci): allow cores to wake up from powerdown
  refactor: panic after calling psci_power_down_wfi()
  refactor(cpus): undo errata mitigations
  feat(cpus): add sysreg_bit_toggle
2025-02-11 16:52:18 +01:00
Govindraj Raja
0f38b9f87e Merge "fix(mt8196): fix wrong register offset of dptx on MT8196" into integration 2025-02-10 16:43:52 +01:00
Kunlong Wang
a3c218afd6 feat(mt8196): enable vcore dvfsrc feature
This patch will enable vcore dvfsrc.
- VCORE DVFS is the feature to change VCORE/DDR Freq for power saving
- When there are no requests for using Vcore/DRAM, Vcore DVFS will
- lower the voltage and frequency of Vcore/DRAM to achieve power saving.

Signed-off-by: Kunlong Wang <kunlong.wang@mediatek.corp-partner.google.com>
Change-Id: I972eb2da1b8526f4ce2927cd662a6fc3ef2f2401
2025-02-10 11:21:10 +08:00
Gavin Liu
b38f8f7a3e fix(mt8196): fix wrong register offset of dptx on MT8196
Fix wrong register offset of dptx on MT8196.

Change-Id: I46f7ac7751d14c9093b7b5bd1c741179a7fbbd34
Signed-off-by: Gavin Liu <gavin.liu@mediatek.com>
2025-02-07 17:26:57 +08:00
Govindraj Raja
efff459bdb Merge "fix(mt8196): remove CPU_IDLE_SRAM_BASE entry from plat_mmap" into integration 2025-02-06 16:20:51 +01:00
Gavin Liu
83f37d9981 fix(mt8196): remove CPU_IDLE_SRAM_BASE entry from plat_mmap
This region is defined in LPM driver. Prefer managing this region in
LPM driver and remove it from plat_mmap and platform_def.h.

Change-Id: I57bfaad88a28d4f29e2b132ba080bc7d5b8248d8
Signed-off-by: Gavin Liu <gavin.liu@mediatek.com>
2025-02-06 14:21:03 +08:00
Yidi Lin
ead26026ff feat(mediatek): update mtk_sip_def.h
Update missing SiP SCM ID definitions. Those definitons are required
when linking to the proprietary library.

Change-Id: I6b912cee9bcceac774ff2228a1e335073a1d5ea7
Signed-off-by: Yidi Lin <yidilin@chromium.org>
2025-02-06 13:51:05 +08:00
Govindraj Raja
cea1549c95 Merge "fix(mt8196): add whole-archive option to prebuilt library" into integration 2025-02-05 21:20:19 +01:00
Yidi Lin
22d74da7cd feat(mt8196): add reset and poweroff function for PSCI call
Add reset and poweroff function for PSCI call.

Change-Id: I65b9e341b74f568f968f3c464a64ea754284cb8c
Signed-off-by: Yidi Lin <yidilin@chromium.org>
2025-02-05 23:56:28 +08:00
Wenzhen Yu
6fac00a490 feat(mt8196): refactor LPM header include paths to use lpm_v2
These changes align the project with the latest directory structure
and ensure consistency in header references.

Signed-off-by: Wenzhen Yu <wenzhen.yu@mediatek.com>
Change-Id: I7f3c42cbd9a803064bbfed67cd8f309638da8441
2025-02-05 21:38:22 +08:00
Gavin Liu
0d8c101cd9 refactor(mediatek): update API calls to MTK GIC v3 driver
Updated the code to call the API of MTK GIC v3.

Change-Id: I1bb1771dda4d5532b1b818864f823dbb7a38094d
Signed-off-by: Gavin Liu <gavin.liu@mediatek.com>
2025-02-05 21:37:34 +08:00
Gavin Liu
8f7d9bfa0a fix(mt8196): add whole-archive option to prebuilt library
Added `-Wl,--whole-archive` option to the LDLIBS in the platfrom.mk to
ensure that the symbols within the library are not stripped during the
linking process.

Change-Id: I35c728d3ccc98489183285a96f703e02dc7505d3
Signed-off-by: Gavin Liu <gavin.liu@mediatek.com>
2025-02-05 09:58:23 +08:00
Govindraj Raja
0c370e2d59 Merge "feat(mt8196): add SMMU driver for PM" into integration 2025-02-04 18:14:07 +01:00
Yong Wu
86dd08d838 feat(mt8196): add SMMU driver for PM
Add MediaTek SMMU power driver. This driver tracks the reference
counter for power domain access on SMMU hardware, including
Multimedia SMMU and APU SMMU. The PM get/put commands may come from
linux(EL1) and hypervisor(EL2).

Change-Id: I60f83c4e3d87059b0549b2ed8c68367be3bfbbc5
Signed-off-by: Yong Wu <yong.wu@mediatek.com>
2025-02-04 10:39:57 +08:00
Govindraj Raja
a726d56074 Merge "feat(mt8196): enable appropriate errata" into integration 2025-02-03 16:49:02 +01:00
Boyan Karatotev
db5fe4f493 chore(docs): drop the "wfi" from pwr_domain_pwr_down_wfi
To allow for generic handling of a wakeup, this hook is no longer
expected to call wfi itself. Update the name everywhere to reflect this
expectation so that future platform implementers don't get misled.

Change-Id: Ic33f0b6da74592ad6778fd802c2f0b85223af614
Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com>
2025-02-03 14:29:47 +00:00
Boyan Karatotev
2bd3b39767 refactor: panic after calling psci_power_down_wfi()
This function doesn't return and its callers that don't return either
rely on this. Drop the dead attribute and add a panic() after it to make
this expectation explicit. Calling `wfi` in the powerdown sequence is
terminal so even if the function was made to return, there would be no
functional change.

This is useful for a following patch that makes psci_power_down_wfi()
return.

Change-Id: I62ca1ee058b1eaeb046966c795081e01bf45a2eb
Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com>
2025-02-03 14:29:47 +00:00
Douglas Anderson
0d11e62e67 feat(mt8196): enable appropriate errata
Booting mt8196 and grepping the logs for "errat" showed:

  WARNING: BL31: cortex_a720: CPU workaround for erratum 2792132 was missing!
  WARNING: BL31: cortex_a720: CPU workaround for erratum 2844092 was missing!
  WARNING: BL31: cortex_a720: CPU workaround for erratum 2926083 was missing!
  WARNING: BL31: cortex_a720: CPU workaround for erratum 2940794 was missing!
  WARNING: BL31: cortex_x4: CPU workaround for erratum 2726228 was missing!
  WARNING: BL31: cortex_x4: CPU workaround for erratum 2740089 was missing!
  WARNING: BL31: cortex_x4: CPU workaround for erratum 2763018 was missing!
  WARNING: BL31: cortex_x4: CPU workaround for erratum 2816013 was missing!
  WARNING: BL31: cortex_x4: CPU workaround for erratum 2897503 was missing!
  WARNING: BL31: cortex_x4: CPU workaround for erratum 2923985 was missing!
  WARNING: BL31: cortex_x4: CPU workaround for erratum 3076789 was missing!

Set defines so that all the errata are fixed. Now the above shows:

  INFO:    BL31: cortex_a720: CPU workaround for erratum 2792132 was applied
  INFO:    BL31: cortex_a720: CPU workaround for erratum 2844092 was applied
  INFO:    BL31: cortex_a720: CPU workaround for erratum 2926083 was applied
  INFO:    BL31: cortex_a720: CPU workaround for erratum 2940794 was applied
  INFO:    BL31: cortex_x4: CPU workaround for erratum 2726228 was applied
  INFO:    BL31: cortex_x4: CPU workaround for erratum 2740089 was applied
  INFO:    BL31: cortex_x4: CPU workaround for erratum 2763018 was applied
  INFO:    BL31: cortex_x4: CPU workaround for erratum 2816013 was applied
  INFO:    BL31: cortex_x4: CPU workaround for erratum 2897503 was applied
  INFO:    BL31: cortex_x4: CPU workaround for erratum 2923985 was applied
  INFO:    BL31: cortex_x4: CPU workaround for erratum 3076789 was applied

Change-Id: I209784c2574b99c3c275ac60adf73896e0cdd078
Signed-off-by: Douglas Anderson <dianders@chromium.org>
2025-02-01 01:01:33 +01:00
Karl Li
5de1ace54a feat(mt8196): turn on APU smpu protection
1. Turn on APU SMPU protection on MT8196.
2. Remove unused header file.

Change-Id: I58637b8dda4bf68253bc2329580963a8bd9cca8b
Signed-off-by: Karl Li <karl.li@mediatek.com>
2025-01-30 23:32:30 +08:00
Karl Li
823a57e11c feat(mt8196): enable APU spmi operation
Enable APU spmi operation after spmi module ready

Change-Id: I4bb1a50a635e8798b049295dbbf98967daff5997
Signed-off-by: Karl Li <karl.li@mediatek.com>
2025-01-30 23:30:59 +08:00
Yong Wu
4794746eec feat(mt8196): add Mediatek MMinfra stub implementation
Implement stub functions for the MMinfra (Multimedia Infrastructure)
driver to ensure that the build can pass when a prebuilt library is
not available.

Change-Id: Iadac654950c868d3743b13a1d6f7ab5d1015fb86
Signed-off-by: Yong Wu <yong.wu@mediatek.com>
2025-01-30 23:30:09 +08:00
ot_chhao.chang
49d8c11285 feat(mt8196): enable cirq for MediaTek MT8196
- Add CIRQ related information.

Signed-off-by: ot_chhao.chang <ot_chhao.chang@mediatek.com>
Change-Id: I758e933f9d53f7bfb16e3d7feb1c7f53516b1da6
2025-01-30 23:28:17 +08:00
Govindraj Raja
ff82102505 Merge "feat(mediatek): add gic driver" into integration 2025-01-29 23:08:26 +01:00
Govindraj Raja
35c54de149 Merge "refactor(mediatek): refactor the data type of the return value" into integration 2025-01-29 22:57:15 +01:00
Govindraj Raja
2c09bf93f0 Merge changes I3f63d597,I40fc21f5 into integration
* changes:
  feat(mt8196): add mtcmos driver
  feat(mt8196): add DCM driver
2025-01-28 22:08:16 +01:00
Guangjie Song
1f913a6e3a feat(mt8196): add mtcmos driver
add mtcmos driver for ufs power control

Signed-off-by: Guangjie Song <guangjie.song@mediatek.com>
Change-Id: I3f63d5976906aaca91a71a147497e9345339774d
2025-01-28 21:59:52 +01:00
Guangjie Song
e578702f71 feat(mt8196): add DCM driver
DCM means dynamic clock management, and it can dynamically slow down
or gate clocks during CPU or bus idle.

Add MCUSYS or bus related DCM drivers.
Enable MCUSYS or bus related DCM by default.

Signed-off-by: Guangjie Song <guangjie.song@mediatek.com>
Change-Id: I40fc21f5808962ca46870a2f3b9963dc8088f877
2025-01-28 21:59:03 +01:00
Kunlong Wang
f0dce79600 feat(mt8196): add vcore dvfs drivers
- VCORE DVFS is the feature to change VCORE/DDR Freq for power saving
- When there are no requests for using Vcore/DRAM, Vcore DVFS will
- lower the voltage and frequency of Vcore/DRAM to achieve power saving.

Signed-off-by: Kunlong Wang <kunlong.wang@mediatek.com>
Change-Id: I1126311e8b3943cc54fb13e15973b9e1b74c129e
2025-01-22 15:28:08 +08:00
Wenzhen Yu
da8cc41bc8 feat(mt8196): add LPM v2 support
LPM means low power module, it will connect idle and SPM to achieve
lower power consumption in some scenarios, and this patch is LPM
second version

Signed-off-by: Wenzhen Yu <wenzhen.yu@mediatek.corp-partner.google.com>
Change-Id: I6ae5b5b4c2056d08c29efab5116be3a92351d8f1
2025-01-22 15:28:08 +08:00
Wenzhen Yu
5532feb70c feat(mt8196): add SPM common version support
This patch provides common APIs for communication with other subsystems
as well as common APIs for collecting the clock and power status of
each subsystem.

Signed-off-by: Wenzhen Yu <wenzhen.yu@mediatek.com>
Change-Id: I1b907256f53578a58d74d66beec7140edf41f687
2025-01-22 15:28:08 +08:00
Wenzhen Yu
a24b53e0e5 feat(mt8196): add SPM common driver support
This patch mainly initializes the SPM and provides common APIs for SPM
to enable the use of its various features.

Signed-off-by: Wenzhen Yu <wenzhen.yu@mediatek.com>
Change-Id: I9facb6bf9962bb2d5fcacd945846bfaeb4c87a55
2025-01-22 15:28:08 +08:00
Wenzhen Yu
fb57af70ae feat(mt8196): add SPM basic features support
This patch mainly collects and organizes SPM state information to
facilitate debugging when issues arise.

Signed-off-by: Wenzhen Yu <wenzhen.yu@mediatek.com>
Change-Id: Ie51cffeb1d683d65d88701fc63c426b20b22492f
2025-01-22 15:28:08 +08:00
Wenzhen Yu
01ce1d5d2f feat(mt8196): add SPM features support
When the system is in idle or suspend state, SPM will turn off some
unused system resources. This patch enables this feature to achieve
power saving.

Signed-off-by: Wenzhen Yu <wenzhen.yu@mediatek.com>
Change-Id: Ia9764b91073c4765d41fe7fcd8e4a21372c290f1
2025-01-22 15:28:08 +08:00
Wenzhen Yu
e8e87683f2 feat(mt8196): enable PMIC low power setting
During suspend, it is necessary to set some power rails of the PMIC
to enter low power mode to achieve power saving.

Signed-off-by: Wenzhen Yu <wenzhen.yu@mediatek.com>
Change-Id: Iaeadd15270e0209f027fab80f478ad621bd59ea7
2025-01-22 15:27:52 +08:00
Kai Liang
5cb0bc07e3 feat(mt8196): add mcdi driver
Add MCDI driver to manage CPU idle states and optimize power consumption.

Signed-off-by: Kai Liang <kai.liang@mediatek.com>
Change-Id: I3a2e163730dd997dd72f2ebc1375dea38d728cb7
2025-01-22 12:01:28 +08:00
Kai Liang
4ba679da8b feat(mt8196): add pwr_ctrl module for CPU power management
Implement pwr_ctrl module to manage CPU power.

Signed-off-by: Kai Liang <kai.liang@mediatek.com>
Change-Id: I73a7a8a2d0b120b7225c2f323990176397b6e4a5
2025-01-22 11:53:33 +08:00
Kai Liang
95e974fa15 feat(mt8196): add mcusys moudles for power management
And mcusys drivers to enhance CPU power state control.

Signed-off-by: Kai Liang <kai.liang@mediatek.com>
Change-Id: I7d84407cebc16a5ab23359781574e9d02e90c58b
2025-01-22 11:51:32 +08:00
Kai Liang
75530ee280 feat(mt8196): add CPC module for power management
Add Centralized Power Control (CPC) module to manage CPU power states.

Signed-off-by: Kai Liang <kai.liang@mediatek.com>
Change-Id: I212155143018141c89427032f6a7d21243e750b7
2025-01-22 11:51:25 +08:00
Kai Liang
da54c72436 feat(mt8196): add topology module for power management
Add topology module to support CPU power state control.

Signed-off-by: Kai Liang <kai.liang@mediatek.com>
Change-Id: I0cc1e5a426762b1b29bff1e940e077643da02e5e
2025-01-22 11:51:16 +08:00
Hope Wang
adf73ae20a feat(mt8196): add SPMI driver
Add SPMI and PMIF driver for PMIC communication

Change-Id: Iad1d90381d6dad6b3e92fd9d6a3ce02fa11d15f1
Signed-off-by: Hope Wang <hope.wang@mediatek.corp-partner.google.com>
2025-01-22 11:51:07 +08:00
Hope Wang
d4e6f98d7f feat(mt8196): add PMIC driver
1. Add PMIC shutdown API
2. Add PMIC low power settings

Change-Id: I634a60fa3e2a74a6031df9fe59e2f52956ef7114
Signed-off-by: Hope Wang <hope.wang@mediatek.corp-partner.google.com>
2025-01-22 11:50:47 +08:00
Gavin Liu
c7105798ed fix(mediatek): covert MTK_BL to uppercase for the build
The build macro no longer coverts variable names to uppercase.
We need to convert it to uppercase to pass it on.

Change-Id: If808fc77bce71d575e2d43ff83c4d9bcdcc52326
Signed-off-by: Gavin Liu <gavin.liu@mediatek.com>
2025-01-15 05:07:19 +02:00
Runyang Chen
d905b3df30 feat(mediatek): add gic driver
Add GIC driver for taking interrupts to core.

Signed-off-by: Runyang Chen <runyang.chen@mediatek.com>
Change-Id: Id4d702b8579488befc1a1b6d37e66287dd534798
2025-01-14 05:17:49 +02:00
Manish Pandey
5e8509c22c Merge "feat(mt8196): link prebuilt library" into integration 2025-01-13 15:52:51 +01:00