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feat(mt8196): add reset and poweroff function for PSCI call
Add reset and poweroff function for PSCI call. Change-Id: I65b9e341b74f568f968f3c464a64ea754284cb8c Signed-off-by: Yidi Lin <yidilin@chromium.org>
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3 changed files with 15 additions and 2 deletions
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@ -1,18 +1,25 @@
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/*
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* Copyright (c) 2022, MediaTek Inc. All rights reserved.
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* Copyright (c) 2022-2025, MediaTek Inc. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#include <assert.h>
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#include <arch_helpers.h>
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#include <common/debug.h>
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#include <drivers/delay_timer.h>
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#include <drivers/gpio.h>
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#if CONFIG_MTK_PMIC_SHUTDOWN_CFG
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#include <drivers/pmic/pmic_psc.h>
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#endif
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#include <lib/mtk_init/mtk_init.h>
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#include <lib/pm/mtk_pm.h>
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#include <plat_params.h>
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#if !CONFIG_MTK_PMIC_SHUTDOWN_CFG
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#include <pmic.h>
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#include <rtc.h>
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#endif
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static void __dead2 mtk_system_reset_cros(void)
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{
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@ -31,8 +38,13 @@ static void __dead2 mtk_system_off_cros(void)
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{
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INFO("MTK System Off\n");
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#if CONFIG_MTK_PMIC_SHUTDOWN_CFG
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platform_power_hold(false);
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mdelay(1000);
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#else
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rtc_power_off_sequence();
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pmic_power_off();
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#endif
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wfi();
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ERROR("MTK System Off: operation not handled.\n");
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@ -87,7 +87,7 @@
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* GPIO related constants
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******************************************************************************/
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#define GPIO_BASE (IO_PHYS + 0x0002D000)
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#define RGU_BASE (IO_PHYS + 0x0C00B000)
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#define RGU_BASE (IO_PHYS + 0x0C010000)
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#define DRM_BASE (IO_PHYS + 0x0000D000)
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#define IOCFG_RT_BASE (IO_PHYS + 0x02000000)
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#define IOCFG_RM1_BASE (IO_PHYS + 0x02020000)
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@ -41,6 +41,7 @@ MODULES-y += $(MTK_PLAT)/common
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MODULES-y += $(MTK_PLAT)/common/lpm_v2
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MODULES-y += $(MTK_PLAT)/lib/mtk_init
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MODULES-y += $(MTK_PLAT)/lib/pm
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MODULES-y += $(MTK_PLAT)/lib/system_reset
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MODULES-y += $(MTK_PLAT)/drivers/apusys
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MODULES-y += $(MTK_PLAT)/drivers/cirq
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MODULES-y += $(MTK_PLAT)/drivers/dp
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