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fix(mt8186): fix the DRAM voltage after the system resumes

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The DRAM power supply must sustain at 0.8V after the system resumes.
Otherwise, unexpected errors would occur. Therefore, we update the
DRAM voltage to 0.8v in PMIC voltage wrap table.

BUG=b:253537849
TEST=Suspend Resume Test

Signed-off-by: Allen-KH Cheng <allen-kh.cheng@mediatek.corp-partner.google.com>
Change-Id: Idd42d5a2d646468822e391e48d01d870c3b7f0d3
This commit is contained in:
Allen-KH Cheng 2022-11-08 18:40:27 +08:00 • committed by Liju-Clr Chen
parent c70f567ad7
commit 600f168172
1 changed files with 4 additions and 4 deletions
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8
plat/mediatek/mt8186/drivers/spm/mt_spm_pmic_wrap.c
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@ -51,10 +51,10 @@ static struct pmic_wrap_setting pw66 = {
.addr = { {0UL, 0UL} },
.set[PMIC_WRAP_PHASE_ALLINONE] = {
._[CMD_0] = { BUCK_VCORE_ELR0_66, VOLT_TO_PMIC_VAL_66(80000), },
._[CMD_1] = { BUCK_VCORE_ELR0_66, VOLT_TO_PMIC_VAL_66(75000), },
._[CMD_2] = { BUCK_VCORE_ELR0_66, VOLT_TO_PMIC_VAL_66(70000), },
._[CMD_3] = { BUCK_VCORE_ELR0_66, VOLT_TO_PMIC_VAL_66(65000), },
._[CMD_4] = { BUCK_VCORE_ELR0_66, VOLT_TO_PMIC_VAL_66(60000), },
._[CMD_1] = { BUCK_VCORE_ELR0_66, VOLT_TO_PMIC_VAL_66(80000), },
._[CMD_2] = { BUCK_VCORE_ELR0_66, VOLT_TO_PMIC_VAL_66(80000), },
._[CMD_3] = { BUCK_VCORE_ELR0_66, VOLT_TO_PMIC_VAL_66(80000), },
._[CMD_4] = { BUCK_VCORE_ELR0_66, VOLT_TO_PMIC_VAL_66(80000), },
._[CMD_5] = { TOP_SPI_CON0_66, 0x1, },
._[CMD_6] = { TOP_SPI_CON0_66, 0x0, },
.nr_idx = NR_IDX_ALL,