Changes all occurrences of "RSS" and "rss" in the code and build files
to "RSE" and "rse".
Signed-off-by: Tamas Ban <tamas.ban@arm.com>
Change-Id: Idec0bf7a90ae381f5bc968e1bb167daace24a11f
Currently both FEAT_MTE and FEAT_MTE_PERM aren't used for enabling
of any feature bits in EL3. So remove both FEAT handling.
All mte regs that are currently context saved/restored are needed
only when FEAT_MTE2 is enabled, so move to usage of FEAT_MTE2 and
remove FEAT_MTE usage.
BREAKING CHANGE: Any platform or downstream code trying to use
SCR_EL3.ATA bit(26) will see failures as this is now moved to be
used only with FEAT_MTE2 with
commit@ef0d0e5478a3f19cbe70a378b9b184036db38fe2
Change-Id: Id01e154156571f7792135639e17dc5c8d0e17cf8
Signed-off-by: Govindraj Raja <govindraj.raja@arm.com>
pVMs on Android 14 has a platform requirement to support
SMCCC TRNG discovery. This implementation add a
dummy TRNG support to TC2.
Signed-off-by: Tamas Ban <tamas.ban@arm.com>
Change-Id: Iae0ca546cadf48a6a404ae578c7ccf5a84d057c4
Each client who wants to communicate with the DPE service
must own a valid context handle issued by the DPE service.
A context handle can be used for a single time then it will
be invalidated by the DPE service. In case of calls from
the same component, the next valid context handle is
returned in the response to a DPE command. When a component
finishes their job then the next component in the boot flow
inherits its first context handle from its parent.
How the inheritance is done can be client or
platform-dependent. It can be shared through shared
memory or be part of a DTB object passed to the next
bootloader stage.
Signed-off-by: Tamas Ban <tamas.ban@arm.com>
Signed-off-by: David Vincze <david.vincze@arm.com>
Change-Id: Ic82f074f1c5b15953e78f9fa5404ed7f48674cbb
Child software components are inheriting their first valid
DPE context handle from their parent components (who loaded
and measured them). The context handle is shared through
the device tree object the following way:
- BL1 -> BL2 via TB_FW_CONFIG
- BL2 -> BL33 via NT_FW_CONFIG
Signed-off-by: Tamas Ban <tamas.ban@arm.com>
Change-Id: I9bf7808fb13a310ad7ca1895674a0c7e6725e08b
The client platform relies on the DICE attestation
scheme. RSS provides the DICE Protection Environment
(DPE) service. TF-A measured boot framework supports
multiple backends. A given platform always enables
the corresponding backend which is required by the
attestation scheme.
Signed-off-by: Tamas Ban <tamas.ban@arm.com>
Change-Id: Idc3360d0d7216e4859e99b5db3d377407e0aeee5
They are very scattered, hard to read, and especially hard to track
down. As a result some are duplicate and some are overridden in the
downstream as it's simpler.
Put all variables at the top of the platform makefile. Also drop setting
variables that don't change from their default values
(CTX_INCLUDE_EL2_REGS, ARCH, ENABLE_FEAT_RAS, SDEI_SUPPORT,
EL3_EXCEPTION_HANDLING, HANDLE_EA_EL3_FIRST_NS, ENABLE_SPE_FOR_NS).
While we're at it, add some variables that are necessary. SPMD
requires MTE registers to be saved, BRANCH_PROTECTION, as well as
running at SEL2. All of our CPUs are Armv8.7 compliant so we can have
ARM_ARCH_MINOR=7 (and drop ENABLE_TRF_FOR_NS which it includes).
Finally, drop the override directives as there's no reason to prohibit
experimentation (even if incorrect).
Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com>
Change-Id: I6ac596934952aab8abf5d4db5220e13a4941a10c
Compile-time controls have been added for the following:
* SCMI power domain use for DPU and GPU.
* SMMU-700: planned rework required to use IOMMU correctly
for DPU and GPU.
These will allow easier experimentation in the future without
ad-hoc changes needed in the dts file for any sort of analysis
that requires testing different paths.
For TC3 however, the DPU is in an always on power domain so SCMI power
domains are not supported.
Co-developed-by: Tintu Thomas <tintu.thomas@arm.com>
Signed-off-by: Kshitij Sisodia <kshitij.sisodia@arm.com>
Change-Id: If6179a3e4784c1b69f0338a8d52b552452c0eac1
Even though the FVP and FPGA are meant to be identical their RoS's (rest
of system) are different. Factor these in so the device tree works for
both. The differences are:
* addresses of GIC and UART
* displays (FPGA uses 4k)
* ethernet devices and SD card (it's non removable on the FPGA)
Their frequencies are also different. The FVP simulates certain
frequencies but isn't very sensitive when we disregard them. To keep
code similar, update them with the FPGA values. This keeps working on
FVP even if slightly incorrect.
Also add an option for the DPU to either use fixed clocks or SCMI set
clocks, hidden behind a flag. This is useful during bringup and because
SCMI may not necessarily work on FPGA.
Co-developed-by: Kshitij Sisodia <kshitij.sisodia@arm.com>
Co-developed-by: Arunachalam Ganapathy <arunachalam.ganapathy@arm.com>
Co-developed-by: Usama Arif <usama.arif@arm.com>
Co-developed-by: Angel Rodriguez Garcia <angel.rodriguezgarcia@arm.com>
Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com>
Change-Id: Ic7a4bfc302673a3a6571757e23a9e6184fba2a13
TC is getting an FPGA port alongside the FVP. It is meant to be
identical, but the core configurations on TC2 differ (there are 14 in an
odd arrangement).
Introduce these differences and gate them behind a new TARGET_FLAVOUR
flag which defaults to FVP for compatibility.
While updating CPUs, it's a good time to do TC3 too. It has different
cores in a different configuration again, so it needs different capacity
values. Those have been derived using GeekBench 6.0 ST on the FPGA.
Finally GPU and DPU power domains are 1 above the CPUs so make that
relative.
In the end, the big/mid/little configurations are:
* TC2 FVP: 1/3/4
* TC2 FPGA: 2/3/5/4 (the 3 is a big "min" core)
* TC3 both: 2/4/2 (with new capacities)
Co-developed-by: Tintu Thomas <tintu.thomas@arm.com>
Co-developed-by: Kshitij Sisodia <kshitij.sisodia@arm.com>
Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com>
Change-Id: I3c3a10d6727f5010fd9026a404df27e9262dff6b
TC3 is a little different from TC2:
* new address for its second DRAM bank
* new CPUs
* a few interrupts have changed
* new SCP MHU base address.
* utility space address (needed for MPAM) is different
* no CMN (and therefore cmn-pmu)
* the uart clock is different
This requires the dts to be different between revisions for the first
time. Introduce a tc_vers.dtsi that includes only definitions for things
that are different.
Signed-off-by: Tintu Thomas <tintu.thomas@arm.com>
Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com>
Change-Id: I2940d87a69ea93502b7f5a22a539e4b70a63e827
The manifests describe the same hardware layout with only the secure
partitions being different. Factor it out so it can be shared and only
add the VM information separately.
This has some deliberate side effects: the test configuration gets the
full secure memory address space and drops the 0x7000000 region as that
was accidentally copied over from the FVP platform and doesn't apply to
TC.
Also optee unconditionally gets the smaller mem_size as it's been
working fine and simplifies the manifest.
Small touch up is that mem_size-s are now in hex but otherwise the same
number.
Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com>
Change-Id: Iea23f9769235eea32afa374952b9a0e4f6d3e9a1
There are requirements in which the MPMM and Auxiliary AMU counters have
to be disabled. Hence removing the "override" here which helps in
disabling them during the build.
Change-Id: I2c0a808d5d9968082a508a9206e34f7a57f2e33a
Signed-off-by: Davidson K <davidson.kumaresan@arm.com>
Arm has made the strategic decision to deprecate the TC1 platform.
Consequently, software development and the creation of fast models
for the TC1 platform have been officially discontinued.
The TC1 platform, now considered obsolete, has been succeeded by
the TC2 platform. It's noteworthy that the TC2 platform is already
integrated and supported in both TF-A and CI repositories.
Change-Id: Ia196a5fc975b4dbf3c913333daf595199968d95d
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>
This patch removes RAS_FFH_SUPPORT macro which is the combination of
ENABLE_FEAT_RAS and HANDLE_EA_EL3_FIRST_NS. Instead introduce an
internal macro FFH_SUPPORT which gets enabled when platforms wants
to enable lower EL EA handling at EL3. The internal macro FFH_SUPPORT
will be automatically enabled if HANDLE_EA_EL3_FIRST_NS is enabled.
FFH_SUPPORT along with ENABLE_FEAT_RAS will be used in source files
to provide equivalent check which was provided by RAS_FFH_SUPPORT
earlier. In generic code we needed a macro which could abstract both
HANDLE_EA_EL3_FIRST_NS and RAS_FFH_SUPPORT macros that had limitations.
Former was tied up with NS world only while the latter was tied to RAS
feature.
This is to allow Secure/Realm world to have their own FFH macros
in future.
Signed-off-by: Manish Pandey <manish.pandey2@arm.com>
Change-Id: Ie5692ccbf462f5dcc3f005a5beea5aa35124ac73
Moving all PLATFORM_TESTS into platform test makefile
Change-Id: I31821e9e69d916d12ae4c804df26f07fb523c835
Signed-off-by: Lauren Wehrmeister <lauren.wehrmeister@arm.com>
Adding new test for AP/RSS interface for reading ROTPK for
each 3 types of ROTPKs for: CCA, secure, and non-secure firmware.
Enabled by PLATFORM_TEST=rss-rotpk.
Update to print output when AP/RSS interface platform tests
pass to be able to reuse expect script functionality in CI.
Change-Id: Icc50b090e18a272378751fda104d209738b5b70c
Signed-off-by: Lauren Wehrmeister <lauren.wehrmeister@arm.com>
TC0 is now a deprecated platform so remove it from the list
of supported FVPs as well as throwing an error if it is attempted
to be built.
Signed-off-by: Daniel Boulby <daniel.boulby@arm.com>
Change-Id: Id013fcecbe20700611463ef9eab8cb3ae09071cc
* changes:
test(tc): unify platform tests traces
test(tc): return test failures count for tfm-testsuite
test(tc): move platform tests in their own function
test(tc): centralize platform error handling
refactor(tc): define PLATFORM_TESTS for scale
The current usage of RAS_EXTENSION in TF-A codebase is to cater for two
things in TF-A :
1. Pull in necessary framework and platform hooks for Firmware first
handling(FFH) of RAS errors.
2. Manage the FEAT_RAS extension when switching the worlds.
FFH means that all the EAs from NS are trapped in EL3 first and signaled
to NS world later after the first handling is done in firmware. There is
an alternate way of handling RAS errors viz Kernel First handling(KFH).
Tying FEAT_RAS to RAS_EXTENSION build flag was not correct as the
feature is needed for proper handling KFH in as well.
This patch breaks down the RAS_EXTENSION flag into a flag to denote the
CPU architecture `ENABLE_FEAT_RAS` which is used in context management
during world switch and another flag `RAS_FFH_SUPPORT` to pull in
required framework and platform hooks for FFH.
Proper support for KFH will be added in future patches.
BREAKING CHANGE: The previous RAS_EXTENSION is now deprecated. The
equivalent functionality can be achieved by the following
2 options:
- ENABLE_FEAT_RAS
- RAS_FFH_SUPPORT
Signed-off-by: Manish Pandey <manish.pandey2@arm.com>
Change-Id: I1abb9ab6622b8f1b15712b12f17612804d48a6ec
For scalability when we add more tests in the future, add PLATFORM_TESTS
macro when specific test flags, i.e. PLATFORM_TEST_NV_COUNTERS, are
defined.
Change-Id: Icb875a171dde673fca9fcf66624ac55383e7b641
Signed-off-by: Lauren Wehrmeister <lauren.wehrmeister@arm.com>
This patch does the following:
1. Configures SBSA secure watchdog timer as Group0 interrupt for
TC platform while keeping it as Group1 secure interrupt for
other CSS based SoCs.
2. Programs the watchdog timer to trigger periodically
3. Provides a Group0 interrupt handler for TC platform port to
deactivate the EL3 interrupt due to expiry of secure watchdog
timer and refresh it explicitly.
Change-Id: I3847d6eb7347c6ea0e527b97b096119ca1e6701b
Signed-off-by: Madhukar Pappireddy <madhukar.pappireddy@arm.com>
The C preprocessor cannot compare defines against strings.
Such an expression is always evaluated to be true. Therefore,
its usage in a conditional expression results that always the
first branch is taken. Other branches cannot be reached by
any configuration value. The fix removes this string comparison
and instead it introduces distinct defines for all the cases.
Signed-off-by: Tamas Ban <tamas.ban@arm.com>
Change-Id: Ia1142b31b6778686c74e1e882fe4604fe3b6501d
Currently, TF-A supports three states for feature flags:
0: FEAT_DISABLED
1: FEAT_STATE_ALWAYS (for fixed/real platforms)
2: FEAT_STATE_CHECK (for configurable platforms)
to meet the feature detection requirements dynamically, mainly
targetting configurable/Fixed Virtual platforms.
With this mechanism in place, we are refactoring all the existing
feature flags to the FEAT_STATE_CHECK option(=2), including
FEAT_SVE explicitly for FVPs.
SVE Patch Reference:
https://review.trustedfirmware.org/c/TF-A/trusted-firmware-a/+/19888/25
This newly introduced change, breaks the existing behaviour especially
for virtual platforms, who have set the ENABLE_SVE_FOR_NS flag to 1.
Moving ahead, we advise the platforms to take the following steps while
enabling the features:
1. If the platform is configurable (virtual), and want to ensure feature
detection happens dynamically at runtime, set the build flags to
FEAT_STATE_CHECK(=2).
2. For real(fixed) platforms, depending on the features supported by the
hardware and platform wants to enable it, platforms could set build
flags to FEAT_STATE_ALWAYS(=1).
(Note: Only the non-secure world enablement related build flags have
been refactored to take the values within 0 to 2. As earlier Secure
world enablement flags will still remain boolean.)
Henceforth, in order to keep it aligned with this tri-state mechanism,
changing the TC platform default to the now supported dynamic
option(=2), so the right decision can be made by the code at runtime.
Change-Id: I4c1ebeb55a00a7f148fac1573a6694b7c02a0a81
Signed-off-by: Jayanth Dodderi Chidanand <jayanthdodderi.chidanand@arm.com>
So far we have the ENABLE_AMU build option to include AMU register
handling code for enabling and context switch. There is also an
ENABLE_FEAT_AMUv1 option, solely to protect the HAFGRTR_EL2 system
register handling. The latter needs some alignment with the new feature
scheme, but it conceptually overlaps with the ENABLE_AMU option.
Since there is no real need for two separate options, unify both into a
new ENABLE_FEAT_AMU name in a first step. This is mostly just renaming at
this point, a subsequent patch will make use of the new feature handling
scheme.
Change-Id: I97d8a55bdee2ed1e1509fa9f2b09fd0bdd82736e
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
At the moment we hardcode the SPE functionality to be available on the
non-secure side only, by setting MDCR_EL2.E2PB accordingly.
This should be reflected in the feature selection symbol, so rename that
to ENABLE_SPE_FOR_NS, to make it clearer that SPE is not supported in
the secure world.
Change-Id: I3f9b48eab1a45d6ccfcbb9c90a11eeb66867ad9a
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Change in PLATFORM_TEST build flag from boolean -> string, with the
current string options being tfm-testsuite and rss-nv-counters.
To get the old behavior, i.e. where we used to use PLATFORM_TEST=1,
we now need to pass PLATFORM_TEST=tfm-testsuite.
Adding new test of the AP/RSS interface for non-volatile counters.
The test reads, increments, and reads again each 3 types of NV
counters for: CCA, secure, and non-secure firmware. Enabled by
PLATFORM_TEST=rss-nv-counters.
Change-Id: I2044cc9b2f37984697e0754c9c824eab51a11e7f
Signed-off-by: Lauren Wehrmeister <lauren.wehrmeister@arm.com>
Signed-off-by: Raef Coles <raef.coles@arm.com>
Move all plat_fiptool.mks into tools, change the logic to recursively
check for tools/fiptool/plat_fiptool/<plat_path>/plat_fiptool.mk
I.e. for a platform that has the path "plat/arm/board/tc/platform.mk",
the makefile will now load the first existing file from:
- tools/fiptool/plat_fiptool/arm/board/tc/plat_fiptool.mk
- tools/fiptool/plat_fiptool/arm/board/plat_fiptool.mk
- tools/fiptool/plat_fiptool/arm/plat_fiptool.mk
This enables fiptool to support multiple platforms, or a specific one.
Remove file-copying previously being used to handle old default path.
Remove custom file cleaning in plat_fiptool.mk.
Change-Id: I95245bcf7143b329481d4394ab64f29bfe9de5ab
Signed-off-by: Raef Coles <raef.coles@arm.com>
Add platform fiptool and UUIDs to the TC platform, to allow RSS images
to be inserted into and used from FIPs
Change-Id: Ic8e11bd4a766bdc616af7dee60d44fc5d1f6e7b6
Signed-off-by: Raef Coles <raef.coles@arm.com>
This patch adds Delegated Attestation and Measured Boot tests to the
plat/arm/board/tc platform.
The test suite can be activated by adding the build time option
`PLATFORM_TEST=1` to the make command. In this case the boot sequence is
not finished, plat_error_handler is called after the tests are run
(regardless of the test result.)
The actual test code is coming from the Trusted-Firmware-M project. Some
of the files of the tf-m-tests and tf-m-extras repo are linked to the
BL31 image.
Versions used for testing:
https://git.trustedfirmware.org/TF-M/tf-m-tests
614e8c358377e4146e8ee13d1246e59d01b4bf1b
https: //git.trustedfirmware.org/TF-M/tf-m-extras
3be9fdd557e6df449de93c2101973fb011699b3d
Change-Id: I98f0f5f760a39d2d7e0dd11d33663ddb75f0b6fc
Signed-off-by: Mate Toth-Pal <mate.toth-pal@arm.com>
Arm has decided to deprecate the TC0 platform. The development of
software and fast models for TC0 platform has been discontinued.
TC0 platform has been superseded by the TC1 and TC2 platforms,
which are already supported in TF-A and CI repositories.
Change-Id: I0269816a6ee733f732669027eae4e14cd60b6084
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>
Current RAS framework in TF-A only supports handling errors originating
from NS world but the HANDLE_EA_EL3_FIRST flag configures it for all
lower Els. To make the current design of RAS explicit, rename this macro
to HANDLE_EA_EL3_FIRST_NS and set EA bit in scr_el3 only when
switching to NS world.
Note: I am unaware of any platform which traps errors originating in
Secure world to EL3, if there is any such platform then it need to
be explicitly implemented in TF-A
Signed-off-by: Manish Pandey <manish.pandey2@arm.com>
Change-Id: If58eb201d8fa792c16325c85c26056e9b409b750
Add basic CPU library code to support the Hunter ELP CPU in TF-A.
Hunter-ELP adds v9.2 architecture support and is derived from
Makalu-ELP. As such, the library code is adapted from the
Makalu-ELP support library.
Change-Id: I7e93b9af6b1f0bc4d08c3cf5caf071d2cbdbc89f
Signed-off-by: Harrison Mutai <harrison.mutai@arm.com>
Measurements taken during boot are stored in RSS.
These measurements are included in the platform
attestation token.
Change-Id: Iac3356f813fb417315681c718839319832a76191
Signed-off-by: David Vincze <david.vincze@arm.com>
Signed-off-by: Tamas Ban <tamas.ban@arm.com>
* ASM files are renamed to have public IP names in their filename.
* updated other files to include ASM filename changes.
Signed-off-by: Rupinderjit Singh <rupinderjit.singh@arm.com>
Change-Id: Ie899c512b11fd7c4312e3a808bb6b9d2376cdb8c
Added a platform support to use tc2 specific CPU cores.
Signed-off-by: Rupinderjit Singh <rupinderjit.singh@arm.com>
Change-Id: Ib76d440e358e9bd1cf80aec5b8591f7a6e47ecbd
Change [1] is specific to TC2 model and breaks former TC0/TC1 test
configs.
BL1 start address is 0x0 on TC0/TC1 and 0x1000 from TC2 onwards.
Fix by adding conditional defines depending on TARGET_PLATFORM build
flag.
[1] https://review.trustedfirmware.org/c/TF-A/trusted-firmware-a/+/15917
Signed-off-by: Olivier Deprez <olivier.deprez@arm.com>
Change-Id: I51f77e6a61ca8eaa6871c19cabe9deb1288f5a9d
Total Compute has ETE and TRBE tracing components and they have
to be enabled to capture the execution trace of the processor.
Signed-off-by: Davidson K <davidson.kumaresan@arm.com>
Change-Id: I3c86c11be2c655a61ecefa3eb2e4e3951577a113
This change enables MPMM and adds, to the TC firmware configuration
device tree, the AMU counters representing the "gears" for the
Maximum Power Mitigation Mechanism feature of the Cortex-X2,
Cortex-A710 and Cortex-A510:
- Gear 0: throttle medium and high bandwidth vector and viruses.
- Gear 1: throttle high bandwidth vector and viruses.
- Gear 2: throttle power viruses only.
This ensures these counters are enabled and context-switched as
expected.
Change-Id: I6df6e0fe3a5362861aa967a78ab7c34fc4bb8fc3
Signed-off-by: Chris Kay <chris.kay@arm.com>
This has been introduced to simplify dependencies on the FDT wrappers.
We generally want to avoid pulling in components on a file-by-file
basis, particularly as we are trying to draw conceptual boxes around
components in preparation for transitioning the build system to CMake,
where dependencies are modelled on libraries rather than files.
Signed-off-by: Chris Kay <chris.kay@arm.com>
Change-Id: Idb7ee05a9b54a8caa3e07f36e608867e20b6dcd5
BL2 passes FW_CONFIG to BL31 which contains information
about different DTBs present. BL31 then uses FW_CONFIG
to get the base address of HW_CONFIG and populate fconf.
Signed-off-by: Usama Arif <usama.arif@arm.com>
Change-Id: I0b4fc83e6e0a0b9401f692516654eb9a3b037616
