mirror of
https://github.com/ARM-software/arm-trusted-firmware.git
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TC is getting an FPGA port alongside the FVP. It is meant to be identical, but the core configurations on TC2 differ (there are 14 in an odd arrangement). Introduce these differences and gate them behind a new TARGET_FLAVOUR flag which defaults to FVP for compatibility. While updating CPUs, it's a good time to do TC3 too. It has different cores in a different configuration again, so it needs different capacity values. Those have been derived using GeekBench 6.0 ST on the FPGA. Finally GPU and DPU power domains are 1 above the CPUs so make that relative. In the end, the big/mid/little configurations are: * TC2 FVP: 1/3/4 * TC2 FPGA: 2/3/5/4 (the 3 is a big "min" core) * TC3 both: 2/4/2 (with new capacities) Co-developed-by: Tintu Thomas <tintu.thomas@arm.com> Co-developed-by: Kshitij Sisodia <kshitij.sisodia@arm.com> Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com> Change-Id: I3c3a10d6727f5010fd9026a404df27e9262dff6b
219 lines
6.2 KiB
Makefile
219 lines
6.2 KiB
Makefile
# Copyright (c) 2021-2024, Arm Limited. All rights reserved.
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#
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# SPDX-License-Identifier: BSD-3-Clause
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#
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include common/fdt_wrappers.mk
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TARGET_FLAVOUR := fvp
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ifneq ($(shell expr $(TARGET_PLATFORM) \<= 1), 0)
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$(warning Platform ${PLAT}$(TARGET_PLATFORM) is deprecated. \
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Some of the features might not work as expected)
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endif
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ifeq ($(shell expr $(TARGET_PLATFORM) \<= 3), 0)
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$(error TARGET_PLATFORM must be less than or equal to 3)
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endif
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ifeq ($(filter ${TARGET_FLAVOUR}, fvp fpga),)
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$(error TARGET_FLAVOUR must be fvp or fpga)
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endif
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$(eval $(call add_defines, \
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TARGET_PLATFORM \
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TARGET_FLAVOUR_$(call uppercase,${TARGET_FLAVOUR}) \
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))
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CSS_LOAD_SCP_IMAGES := 1
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CSS_USE_SCMI_SDS_DRIVER := 1
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ENABLE_FEAT_RAS := 1
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SDEI_SUPPORT := 0
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EL3_EXCEPTION_HANDLING := 0
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HANDLE_EA_EL3_FIRST_NS := 0
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# System coherency is managed in hardware
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HW_ASSISTED_COHERENCY := 1
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# When building for systems with hardware-assisted coherency, there's no need to
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# use USE_COHERENT_MEM. Require that USE_COHERENT_MEM must be set to 0 too.
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USE_COHERENT_MEM := 0
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GIC_ENABLE_V4_EXTN := 1
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# GIC-600 configuration
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GICV3_SUPPORT_GIC600 := 1
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# Enable SVE
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ENABLE_SVE_FOR_NS := 2
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ENABLE_SVE_FOR_SWD := 1
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# enable trace buffer control registers access to NS by default
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ENABLE_TRBE_FOR_NS := 1
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# enable trace system registers access to NS by default
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ENABLE_SYS_REG_TRACE_FOR_NS := 1
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# enable trace filter control registers access to NS by default
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ENABLE_TRF_FOR_NS := 1
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# Include GICv3 driver files
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include drivers/arm/gic/v3/gicv3.mk
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ENT_GIC_SOURCES := ${GICV3_SOURCES} \
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plat/common/plat_gicv3.c \
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plat/arm/common/arm_gicv3.c
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override NEED_BL2U := no
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override ARM_PLAT_MT := 1
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TC_BASE = plat/arm/board/tc
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PLAT_INCLUDES += -I${TC_BASE}/include/ \
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-I${TC_BASE}/fdts/
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# CPU libraries for TARGET_PLATFORM=1
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ifeq (${TARGET_PLATFORM}, 1)
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TC_CPU_SOURCES += lib/cpus/aarch64/cortex_a510.S \
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lib/cpus/aarch64/cortex_a715.S \
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lib/cpus/aarch64/cortex_x3.S
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endif
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# CPU libraries for TARGET_PLATFORM=2
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ifeq (${TARGET_PLATFORM}, 2)
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TC_CPU_SOURCES += lib/cpus/aarch64/cortex_a520.S \
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lib/cpus/aarch64/cortex_a720.S \
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lib/cpus/aarch64/cortex_x4.S
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endif
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# CPU libraries for TARGET_PLATFORM=3
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ifeq (${TARGET_PLATFORM}, 3)
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TC_CPU_SOURCES += lib/cpus/aarch64/cortex_a520.S \
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lib/cpus/aarch64/cortex_chaberton.S \
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lib/cpus/aarch64/cortex_blackhawk.S
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endif
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INTERCONNECT_SOURCES := ${TC_BASE}/tc_interconnect.c
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PLAT_BL_COMMON_SOURCES += ${TC_BASE}/tc_plat.c \
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${TC_BASE}/include/tc_helpers.S
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BL1_SOURCES += ${INTERCONNECT_SOURCES} \
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${TC_CPU_SOURCES} \
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${TC_BASE}/tc_trusted_boot.c \
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${TC_BASE}/tc_err.c \
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drivers/arm/sbsa/sbsa.c
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BL2_SOURCES += ${TC_BASE}/tc_security.c \
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${TC_BASE}/tc_err.c \
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${TC_BASE}/tc_trusted_boot.c \
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${TC_BASE}/tc_bl2_setup.c \
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lib/utils/mem_region.c \
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drivers/arm/tzc/tzc400.c \
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plat/arm/common/arm_tzc400.c \
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plat/arm/common/arm_nor_psci_mem_protect.c
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BL31_SOURCES += ${INTERCONNECT_SOURCES} \
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${TC_CPU_SOURCES} \
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${ENT_GIC_SOURCES} \
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${TC_BASE}/tc_bl31_setup.c \
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${TC_BASE}/tc_topology.c \
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lib/fconf/fconf.c \
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lib/fconf/fconf_dyn_cfg_getter.c \
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drivers/cfi/v2m/v2m_flash.c \
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lib/utils/mem_region.c \
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plat/arm/common/arm_nor_psci_mem_protect.c \
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drivers/arm/sbsa/sbsa.c
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BL31_SOURCES += ${FDT_WRAPPERS_SOURCES}
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# Add the FDT_SOURCES and options for Dynamic Config
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FDT_SOURCES += ${TC_BASE}/fdts/${PLAT}_fw_config.dts \
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${TC_BASE}/fdts/${PLAT}_tb_fw_config.dts
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FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_fw_config.dtb
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TB_FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_tb_fw_config.dtb
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# Add the FW_CONFIG to FIP and specify the same to certtool
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$(eval $(call TOOL_ADD_PAYLOAD,${FW_CONFIG},--fw-config,${FW_CONFIG}))
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# Add the TB_FW_CONFIG to FIP and specify the same to certtool
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$(eval $(call TOOL_ADD_PAYLOAD,${TB_FW_CONFIG},--tb-fw-config,${TB_FW_CONFIG}))
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ifeq (${SPD},spmd)
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ifeq ($(ARM_SPMC_MANIFEST_DTS),)
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ARM_SPMC_MANIFEST_DTS := ${TC_BASE}/fdts/${PLAT}_spmc_test_manifest.dts
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endif
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FDT_SOURCES += ${ARM_SPMC_MANIFEST_DTS}
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TC_TOS_FW_CONFIG := ${BUILD_PLAT}/fdts/$(notdir $(basename ${ARM_SPMC_MANIFEST_DTS})).dtb
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# Add the TOS_FW_CONFIG to FIP and specify the same to certtool
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$(eval $(call TOOL_ADD_PAYLOAD,${TC_TOS_FW_CONFIG},--tos-fw-config,${TC_TOS_FW_CONFIG}))
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endif
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#Device tree
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TC_HW_CONFIG_DTS := fdts/tc.dts
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TC_HW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}.dtb
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FDT_SOURCES += ${TC_HW_CONFIG_DTS}
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$(eval TC_HW_CONFIG := ${BUILD_PLAT}/$(patsubst %.dts,%.dtb,$(TC_HW_CONFIG_DTS)))
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# Add the HW_CONFIG to FIP and specify the same to certtool
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$(eval $(call TOOL_ADD_PAYLOAD,${TC_HW_CONFIG},--hw-config,${TC_HW_CONFIG}))
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override CTX_INCLUDE_AARCH32_REGS := 0
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override CTX_INCLUDE_PAUTH_REGS := 1
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override ENABLE_SPE_FOR_NS := 0
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override ENABLE_FEAT_AMU := 1
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ENABLE_AMU_AUXILIARY_COUNTERS := 1
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ENABLE_AMU_FCONF := 1
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ENABLE_MPMM := 1
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ENABLE_MPMM_FCONF := 1
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# Include Measured Boot makefile before any Crypto library makefile.
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# Crypto library makefile may need default definitions of Measured Boot build
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# flags present in Measured Boot makefile.
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ifeq (${MEASURED_BOOT},1)
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MEASURED_BOOT_MK := drivers/measured_boot/rss/rss_measured_boot.mk
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$(info Including ${MEASURED_BOOT_MK})
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include ${MEASURED_BOOT_MK}
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$(info Including rss_comms.mk)
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include drivers/arm/rss/rss_comms.mk
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BL1_SOURCES += ${MEASURED_BOOT_SOURCES} \
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plat/arm/board/tc/tc_common_measured_boot.c \
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plat/arm/board/tc/tc_bl1_measured_boot.c \
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lib/psa/measured_boot.c \
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${RSS_COMMS_SOURCES}
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BL2_SOURCES += ${MEASURED_BOOT_SOURCES} \
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plat/arm/board/tc/tc_common_measured_boot.c \
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plat/arm/board/tc/tc_bl2_measured_boot.c \
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lib/psa/measured_boot.c \
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${RSS_COMMS_SOURCES}
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PLAT_INCLUDES += -Iinclude/lib/psa
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endif
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ifneq (${PLATFORM_TEST},)
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# Add this include as first, before arm_common.mk. This is necessary
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# because arm_common.mk builds Mbed TLS, and platform_test.mk can
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# change the list of Mbed TLS files that are to be compiled
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# (LIBMBEDTLS_SRCS).
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include plat/arm/board/tc/platform_test.mk
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endif
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include plat/arm/common/arm_common.mk
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include plat/arm/css/common/css_common.mk
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include plat/arm/soc/common/soc_css.mk
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include plat/arm/board/common/board_common.mk
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