mirror of
https://github.com/ARM-software/arm-trusted-firmware.git
synced 2025-04-16 09:34:18 +00:00
refactor(tc): unify all the spmc manifests
The manifests describe the same hardware layout with only the secure partitions being different. Factor it out so it can be shared and only add the VM information separately. This has some deliberate side effects: the test configuration gets the full secure memory address space and drops the 0x7000000 region as that was accidentally copied over from the FVP platform and doesn't apply to TC. Also optee unconditionally gets the smaller mem_size as it's been working fine and simplifies the manifest. Small touch up is that mem_size-s are now in hex but otherwise the same number. Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com> Change-Id: Iea23f9769235eea32afa374952b9a0e4f6d3e9a1
This commit is contained in:
Boyan Karatotev
parent
0686a01b0c
commit
3ac3b6b0a3
5 changed files with 87 additions and 158 deletions
29
plat/arm/board/tc/fdts/tc_spmc_common_sp_manifest.dtsi
Normal file
29
plat/arm/board/tc/fdts/tc_spmc_common_sp_manifest.dtsi
Normal file
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@ -0,0 +1,29 @@
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/*
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* Copyright (c) 2023-2024, Arm Limited. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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&hafnium {
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vm1 {
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is_ffa_partition;
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vcpu_count = <8>;
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/* partition information filled in separately */
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};
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#ifdef TS_SP_FW_CONFIG
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vm2 {
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is_ffa_partition;
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debug_name = "internal-trusted-storage";
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load_address = <0xfee00000>;
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vcpu_count = <1>;
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mem_size = <0x200000>; /* 2MB TZC DRAM */
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};
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vm3 {
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is_ffa_partition;
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debug_name = "crypto";
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load_address = <0xfec00000>;
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vcpu_count = <1>;
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mem_size = <0x200000>; /* 2MB TZC DRAM */
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};
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#endif
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};
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@ -1,10 +1,8 @@
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/*
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* Copyright (c) 2020-2023, Arm Limited. All rights reserved.
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* Copyright (c) 2020-2024, Arm Limited. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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/dts-v1/;
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/ {
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compatible = "arm,ffa-core-manifest-1.0";
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#address-cells = <2>;
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@ -20,36 +18,9 @@
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binary_size = <0x80000>;
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};
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hypervisor {
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hafnium:hypervisor {
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compatible = "hafnium,hafnium";
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vm1 {
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is_ffa_partition;
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debug_name = "cactus-primary";
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load_address = <0xfe000000>;
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vcpu_count = <8>;
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mem_size = <1048576>;
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};
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vm2 {
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is_ffa_partition;
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debug_name = "cactus-secondary";
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load_address = <0xfe100000>;
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vcpu_count = <8>;
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mem_size = <1048576>;
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};
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vm3 {
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is_ffa_partition;
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debug_name = "cactus-tertiary";
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load_address = <0xfe200000>;
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vcpu_count = <1>;
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mem_size = <1048576>;
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};
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vm4 {
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is_ffa_partition;
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debug_name = "ivy";
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load_address = <0xfe600000>;
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vcpu_count = <1>;
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mem_size = <1048576>;
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};
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/* filled in in top level .dts */
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};
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cpus {
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@ -119,14 +90,13 @@
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memory@0 {
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device_type = "memory";
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reg = <0x0 0xfd000000 0x0 0x2000000>,
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<0x0 0x7000000 0x0 0x1000000>,
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reg = <0x0 0xf9000000 0x0 0x6000000>,
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<0x0 0xff000000 0x0 0x1000000>;
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};
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memory@1 {
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device_type = "ns-memory";
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reg = <0x00008800 0x80000000 0x0 0x7f000000>,
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<0x0 0x88000000 0x1 0x00000000>;
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reg = <0x0 0x80000000 0x0 0x79000000>,
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<0x80 0x80000000 0x1 0x80000000>;
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};
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};
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@ -1,129 +1,17 @@
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/*
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* Copyright (c) 2020-2023, Arm Limited. All rights reserved.
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* Copyright (c) 2020-2024, Arm Limited. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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/dts-v1/;
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/ {
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compatible = "arm,ffa-core-manifest-1.0";
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#address-cells = <2>;
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#size-cells = <2>;
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#include <tc_spmc_manifest.dtsi>
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#include <tc_spmc_common_sp_manifest.dtsi>
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attribute {
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spmc_id = <0x8000>;
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maj_ver = <0x1>;
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min_ver = <0x2>;
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exec_state = <0x0>;
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load_address = <0x0 0xfd000000>;
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entrypoint = <0x0 0xfd000000>;
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binary_size = <0x80000>;
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};
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hypervisor {
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compatible = "hafnium,hafnium";
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vm1 {
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is_ffa_partition;
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debug_name = "op-tee";
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load_address = <0xfd280000>;
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vcpu_count = <8>;
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#ifdef TS_SP_FW_CONFIG
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mem_size = <26738688>; /* 25MB TZC DRAM */
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#else
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mem_size = <30928896>; /* 29MB TZC DRAM */
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#endif
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};
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#ifdef TS_SP_FW_CONFIG
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vm2 {
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is_ffa_partition;
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debug_name = "internal-trusted-storage";
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load_address = <0xfee00000>;
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vcpu_count = <1>;
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mem_size = <2097152>; /* 2MB TZC DRAM */
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};
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vm3 {
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is_ffa_partition;
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debug_name = "crypto";
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load_address = <0xfec00000>;
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vcpu_count = <1>;
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mem_size = <2097152>; /* 2MB TZC DRAM */
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};
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#endif
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};
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cpus {
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#address-cells = <0x2>;
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#size-cells = <0x0>;
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CPU0:cpu@0 {
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device_type = "cpu";
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compatible = "arm,armv8";
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reg = <0x0 0x0>;
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enable-method = "psci";
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};
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/*
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* SPMC (Hafnium) requires secondary cpu nodes are declared in
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* descending order
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*/
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CPU7:cpu@700 {
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device_type = "cpu";
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compatible = "arm,armv8";
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reg = <0x0 0x700>;
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enable-method = "psci";
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};
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CPU6:cpu@600 {
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device_type = "cpu";
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compatible = "arm,armv8";
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reg = <0x0 0x600>;
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enable-method = "psci";
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};
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CPU5:cpu@500 {
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device_type = "cpu";
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compatible = "arm,armv8";
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reg = <0x0 0x500>;
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enable-method = "psci";
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};
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CPU4:cpu@400 {
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device_type = "cpu";
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compatible = "arm,armv8";
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reg = <0x0 0x400>;
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enable-method = "psci";
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};
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CPU3:cpu@300 {
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device_type = "cpu";
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compatible = "arm,armv8";
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reg = <0x0 0x300>;
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enable-method = "psci";
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};
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CPU2:cpu@200 {
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device_type = "cpu";
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compatible = "arm,armv8";
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reg = <0x0 0x200>;
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enable-method = "psci";
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};
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CPU1:cpu@100 {
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device_type = "cpu";
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compatible = "arm,armv8";
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reg = <0x0 0x100>;
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enable-method = "psci";
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};
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};
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memory@0 {
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device_type = "memory";
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reg = <0x0 0xfd000000 0x0 0x2000000>;
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};
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memory@1 {
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device_type = "ns-memory";
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reg = <0x0 0x80000000 0x0 0x79000000>,
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<0x80 0x80000000 0x1 0x80000000>;
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&hafnium {
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vm1 {
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debug_name = "op-tee";
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load_address = <0xfd280000>;
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mem_size = <26738688>; /* 25MB TZC DRAM */
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};
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};
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41
plat/arm/board/tc/fdts/tc_spmc_test_manifest.dts
Normal file
41
plat/arm/board/tc/fdts/tc_spmc_test_manifest.dts
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@ -0,0 +1,41 @@
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/*
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* Copyright (c) 2023-2024, Arm Limited. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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/dts-v1/;
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#include <tc_spmc_manifest.dtsi>
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/ {
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hypervisor {
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vm1 {
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is_ffa_partition;
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debug_name = "cactus-primary";
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load_address = <0xfe000000>;
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vcpu_count = <8>;
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mem_size = <1048576>;
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};
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vm2 {
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is_ffa_partition;
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debug_name = "cactus-secondary";
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load_address = <0xfe100000>;
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vcpu_count = <8>;
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mem_size = <1048576>;
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};
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vm3 {
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is_ffa_partition;
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debug_name = "cactus-tertiary";
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load_address = <0xfe200000>;
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vcpu_count = <1>;
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mem_size = <1048576>;
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};
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vm4 {
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is_ffa_partition;
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debug_name = "ivy";
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load_address = <0xfe600000>;
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vcpu_count = <1>;
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mem_size = <1048576>;
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};
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};
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};
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@ -70,7 +70,8 @@ override ARM_PLAT_MT := 1
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TC_BASE = plat/arm/board/tc
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PLAT_INCLUDES += -I${TC_BASE}/include/
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PLAT_INCLUDES += -I${TC_BASE}/include/ \
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-I${TC_BASE}/fdts/
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# CPU libraries for TARGET_PLATFORM=1
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ifeq (${TARGET_PLATFORM}, 1)
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@ -133,7 +134,7 @@ $(eval $(call TOOL_ADD_PAYLOAD,${TB_FW_CONFIG},--tb-fw-config,${TB_FW_CONFIG}))
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ifeq (${SPD},spmd)
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ifeq ($(ARM_SPMC_MANIFEST_DTS),)
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ARM_SPMC_MANIFEST_DTS := ${TC_BASE}/fdts/${PLAT}_spmc_manifest.dts
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ARM_SPMC_MANIFEST_DTS := ${TC_BASE}/fdts/${PLAT}_spmc_test_manifest.dts
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endif
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FDT_SOURCES += ${ARM_SPMC_MANIFEST_DTS}
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