Commit graph

2464 commits

Author SHA1 Message Date
Madhukar Pappireddy
1f6bb41dd9 refactor(el3-runtime): plat_ic_has_interrupt_type returns bool
Rather than returning 0 or 1, the above function returns bool false
or true. No functional change.

Change-Id: Iea904ffc368568208fa8203e0d2e0cdaa500b1e0
Signed-off-by: Madhukar Pappireddy <madhukar.pappireddy@arm.com>
2023-09-25 17:09:15 -05:00
Sandrine Bailleux
9c44778818 Merge changes If9672598,I219c49d3 into integration
* changes:
  feat(cert-create): add pkcs11 engine support
  fix(cert-create): key: Avoid having a temporary value for pkey in key_load
2023-09-25 17:00:52 +02:00
Lauren Wehrmeister
fcfa15d41c Merge changes from topic "errata" into integration
* changes:
  fix(cpus): workaround for Neoverse V2 erratum 2743011
  fix(cpus): workaround for Neoverse V2 erratum 2779510
  fix(cpus): workaround for Neoverse V2 erratum 2719105
  fix(cpus): workaround for Neoverse V2 erratum 2331132
2023-09-22 20:22:19 +02:00
Raymond Mao
3ba2c15147 feat(handoff): introduce firmware handoff library
Add transfer list APIs and firmware handoff build option.

Change-Id: I68a0ace22c7e50fcdacd101eb76b271d7b76d8ff
Signed-off-by: Raymond Mao <raymond.mao@linaro.org>
2023-09-22 10:56:51 +01:00
Robin van der Gracht
616b3ce27d feat(cert-create): add pkcs11 engine support
Add pkcs11 engine support which allows using keys that are securely
stored on a HSM or TPM. To use this feature the user has to supply
an RFC 7512 compliant PKCS11 URI to a key instead of a file as an
argument to one of the key options. This change is fully backwards
compatible.

This change makes use of the openssl engine API which is deprecated
since openssl 3.0 and will most likely be removed in version 4. So
pkcs11 support will have to be updated to the openssl provider API
in the near future.

Signed-off-by: Robin van der Gracht <robin@protonic.nl>
Change-Id: If96725988ca62c5613ec59123943bf15922f5d1f
2023-09-21 13:27:25 +02:00
Joanna Farley
455cd0d3b5 Merge "chore: remove MULTI_CONSOLE_API references" into integration 2023-09-19 14:48:43 +02:00
Bipin Ravi
58dd153cc8 fix(cpus): workaround for Neoverse V2 erratum 2743011
Neoverse V2 erratum 2743011 is a Cat B erratum that applies to
all revisions <= r0p1 and is fixed in r0p2. The workaround is to
set CPUACTLR5_EL1[56:55] to 2'b01.

SDEN documentation:
https://developer.arm.com/documentation/SDEN2332927/latest

Signed-off-by: Bipin Ravi <bipin.ravi@arm.com>
Change-Id: I0e06ca723a1cce51fb027b7160f3dd06a4c93e64
2023-09-18 19:54:41 -05:00
Bipin Ravi
ff342643bc fix(cpus): workaround for Neoverse V2 erratum 2779510
Neoverse V2 erratum 2779510 is a Cat B erratum that applies to
all revisions <= r0p1 and is fixed in r0p2. The workaround is to
set bit[47] of CPUACTLR3_EL1 which might have a small impact on
power and negligible impact on performance.

SDEN documentation:
https://developer.arm.com/documentation/SDEN2332927/latest

Signed-off-by: Bipin Ravi <bipin.ravi@arm.com>
Change-Id: I6d937747bdcbf2913a64c4037f99918cbc466e80
2023-09-18 19:35:16 -05:00
Bipin Ravi
b01140256b fix(cpus): workaround for Neoverse V2 erratum 2719105
Neoverse V2 erratum 2719105 is a Cat B erratum that applies to all
revisions <= r0p1 and is fixed in r0p2.

The erratum is avoided by setting CPUACTLR2_EL1[0] to 1 to force
PLDW/PFRM ST to behave like PLD/PRFM LD and not cause invalidations
to other PE caches. There might be a small performance degradation
to this workaround for certain workloads that share data.

SDEN documentation:
https://developer.arm.com/documentation/SDEN2332927/latest

Signed-off-by: Bipin Ravi <bipin.ravi@arm.com>
Change-Id: Id026edcb7ee1ca93371ce0001d18f5a8282c49ba
2023-09-18 17:43:51 -05:00
Bipin Ravi
8852fb5b7d fix(cpus): workaround for Neoverse V2 erratum 2331132
Neoverse V2 erratum 2331132 is a Cat B erratum that applies to all
revisions <= r0p2 and is still open. The workaround is to write the
value 4'b1001 to the PF_MODE bits in the IMP_CPUECTLR2_EL1 register
which will place the data prefetcher in the most conservative mode
instead of disabling it.

SDEN documentation:
https://developer.arm.com/documentation/SDEN2332927/latest

Signed-off-by: Bipin Ravi <bipin.ravi@arm.com>
Change-Id: Ic6c76375df465a4ad2e20dd7add7037477d973c1
2023-09-18 17:42:07 -05:00
Mark Dykes
57b557d038 Merge "refactor(cpufeat): refactor arch feature build options" into integration 2023-09-18 16:29:12 +02:00
Xueliang Zhong
140d890954 docs(maintainers): update corstone1000 maintainers
Update maintainers list for corstone1000 platform.

Signed-off-by: Xueliang Zhong <xueliang.zhong@arm.com>
Change-Id: I779e3717f6a6e19d32e8568eda05204cd46f35ea
2023-09-18 12:09:47 +02:00
Govindraj Raja
f5211420b5 refactor(cpufeat): refactor arch feature build options
Current build infra defaults all cpufeats in defaults.mk and some
mandatory features are enabled in arch_features.mk and optional
arch features are enabled in platform specific makefile.
This fragmentation is sometime confusing to figure out which feature
is tied to which ARCH_MAJOR.ARCH_MINOR.

So, consolidating and grouping them for tracking and enabling makes
more sense. With this change we consolidate all ARCH feature handling
within arch_features.mk and disable all optional features that need
to be enabled to platform makefile.

This is an ongoing series of effort to consolidate and going forward
platform makefile should just specify ARCH_MAJOR and ARCH MINOR and
all mandatory feature should be selected based on arch_features.mk
any optional feature needed by the platform support can be enabled
by platform makefile.

It also makes it easier for platform ports to look upto arch_features.mk
and enable any optional feature that platform may need which are
supported from TF-A.

Change-Id: I18764008856d81414256b6cbabdfa42a16b8040d
Signed-off-by: Govindraj Raja <govindraj.raja@arm.com>
2023-09-15 14:53:08 +02:00
Manish V Badarkhe
cc933e1d12 Merge changes from topic "stm32mp2" into integration
* changes:
  feat(stm32mp2): generate stm32 file
  feat(stm32mp2-fdts): add stm32mp257f-ev1 board
  feat(stm32mp2-fdts): introduce stm32mp25 pinctrl files
  feat(stm32mp2-fdts): introduce stm32mp25 SoCs family
  feat(stm32mp2): add console configuration
  feat(st): add RCC registers list
  feat(st-uart): add AARCH64 stm32_console driver
  feat(st): introduce new platform STM32MP2
  feat(dt-bindings): add the STM32MP2 clock and reset bindings
  docs(changelog): add scopes for STM32MP2
  feat(docs): introduce STM32MP2 doc
  refactor(docs): add a sub-menu for ST platforms
  refactor(st): move plat_image_load.c
  refactor(st): rename PLAT_NB_FIXED_REGS
  refactor(st): move some storage definitions to common part
  refactor(st): move SDMMC definitions to driver
  feat(st-clock): stub fdt_get_rcc_secure_state
  feat(st-clock): allow aarch64 compilation of STGEN functions
  feat(st): allow AARCH64 compilation for common code
  refactor(st): rename QSPI macros
2023-09-15 09:41:44 +02:00
Manish V Badarkhe
f1ed218a9f Merge "feat(mbedtls): update to 3.4.1" into integration 2023-09-12 16:20:10 +02:00
Michal Simek
13ff6e9dde chore: remove MULTI_CONSOLE_API references
MULTI_CONSOLE_API have been removed long time ago by commit 5b6ebeec9c
("Remove MULTI_CONSOLE_API flag and references to it") that's why remove
references in platform.mk files and also in one rst which is not valid
anymore.

Change-Id: I45f8e7db0a14ce63de62509100d8159b7aca2657
Signed-off-by: Michal Simek <michal.simek@amd.com>
2023-09-12 15:28:36 +02:00
Olivier Deprez
2e20069b2b Merge "docs(maintainers): add maintainers for i.MX9 SoCs" into integration 2023-09-12 14:10:39 +02:00
Sandrine Bailleux
e686cdb450 feat(mbedtls): update to 3.4.1
Update TF-A documentation to recommend using the latest and greatest
release of mbedTLS library to this date, i.e. version 3.4.1. The
upgrade was successfully tested by the OpenCI running all existing
test configs, in particular trusted boot and measured boot related
ones.

The reason for this upgrade is simply to obey TF-A's guideline to
always use up-to-date security libraries. mbedTLS 3.4.1 release
notes [1] do not list any changes that should affect TF-A.

[1] https://github.com/Mbed-TLS/mbedtls/releases/tag/v3.4.1

Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>
Change-Id: Ifc31c2fc825a2fc9ca318ea8baadd51b670e7a4e
2023-09-12 11:38:56 +02:00
Bipin Ravi
e99df5c295 Merge changes from topic "sm/errata_X3" into integration
* changes:
  fix(cpus): workaround for Cortex-X3 erratum 2742421
  feat(errata_abi): add support for Cortex-X3
2023-09-08 22:18:32 +02:00
Madhukar Pappireddy
77fc89fd22 Merge "fix(docs): replace deprecated urls under tfa/docs" into integration 2023-09-08 18:32:26 +02:00
Yann Gautier
ee5076f971 feat(docs): introduce STM32MP2 doc
STM32MP2x is a new family of microprocessors designed by
STMicroelectronics and based on Arm Cortex-A35.

Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
Change-Id: I741ed0a701a614817a4d0b65d3d6f4e6a79da6a9
2023-09-08 10:56:49 +02:00
Yann Gautier
ce7f8044c7 refactor(docs): add a sub-menu for ST platforms
In order to ease introduction of new STM32 MPUs platforms, a dedicated
ST sub-menu (and directory) is created.
The old page is kept, but with an orphan parameter to avoid build
issues with the docs, and to avoid listing it in the menu. It is
updated to just have links with the new pages.
A new page STM32 MPUs is created to group common options for all STM32
MPUs.

Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
Change-Id: I799b57967d76a985835c7a3d9d6ab21beb44ba40
2023-09-08 10:56:49 +02:00
Sona Mathew
5b0e4438d0 fix(cpus): workaround for Cortex-X3 erratum 2742421
Cortex-X3 erratum 2742421 is a Cat B erratum that applies to
all revisions <= r1p1 and is fixed in r1p2. The workaround is to
set CPUACTLR5_EL1[56:55] to 2'b01.

SDEN documentation:
https://developer.arm.com/documentation/2055130/latest

Signed-off-by: Sona Mathew <sonarebecca.mathew@arm.com>
Change-Id: Idadd323e419739fe909b9b68ea2dbe857846666b
2023-09-07 16:31:47 -05:00
Thaddeus Serna
5fdf198c11 fix(docs): replace deprecated urls under tfa/docs
Fixed internal links refrenced inside tfa/docs.
Followed https://www.sphinx-doc.org/en/master/usage/restructuredtext/roles.html#ref-role
for instrustion on how to link sections within other documents.

Signed-off-by: Thaddeus Serna <thaddeus.gonzalez-serna@arm.com>
Change-Id: I8e7c090d98951b1e3d393ab5b1d6bcdaa1865c6f
2023-09-07 16:29:11 -05:00
Mark Dykes
d2b66cc87e Merge "fix(cpus): workaround for Neoverse N2 erratum 2009478" into integration 2023-09-07 23:05:48 +02:00
Sandrine Bailleux
a1e121beba docs(threat-model): classify threats by mitigating entity
The generic threat model used to list threats in no particular order.

Reorganize threats so that they are grouped by mitigating entity. For
example, threats mitigated by the boot firmware (i.e. BL1 and BL2) are
now clubbed together, ditto for those mitigated by the runtime EL3
firmware. Note that some generic threats apply to all firmware images
so these get grouped in their own section as well.

The motivations for this refactoring are the following:

 - Clarify the scope of the threats.

   In particular, as the boot firmware is typically transient, threats
   applying to those images can only be exploited during a short
   period of time before the runtime firmware starts.

   A note has been added to this effect.

 - Helping developers implement mitigations in the right place.

 - Some vendors have their own solution for booting their device and
   only leverage the runtime firmware from the TF-A project. Thus,
   they are not interested in the threat model of TF-A's boot
   firmware. Isolating the latter in a specific section helps them
   focus on what is important for them.

To avoid unnecessary churn, the threats ids have been kept the same.

Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>
Change-Id: Id8616fd0e4b37cd400b1ad3372beb3455234d4dc
2023-08-30 08:23:32 +02:00
Sandrine Bailleux
b721648da4 docs(threat-model): club RME note with other assumptions
The fact that RME is out of the generic threat model's scope is just
another assumption we make about the target of evaluation so mention
it there.

Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>
Change-Id: I839ec5427f36b085148338030e8b1b85191d4245
2023-08-30 08:23:24 +02:00
Bipin Ravi
74bfe31fd2 fix(cpus): workaround for Neoverse N2 erratum 2009478
Neoverse N2 erratum 2009478 is a Cat B erratum that applies to
revision r0p0 and is fixed in r0p1. The workaround is to clear
the ED bit for all core error records before setting the PWRDN_EN
bit in CPUPWRCTLR_EL1 to request a power down.

SDEN documentation:
https://developer.arm.com/documentation/SDEN1982442/latest

Signed-off-by: Bipin Ravi <bipin.ravi@arm.com>
Change-Id: Ic5ef58c9e795b90026af1d2b09edc0eea3ceee51
2023-08-29 15:05:56 -05:00
Boyan Karatotev
e37dfd3c57 refactor(cpus): reorder Cortex-A53 errata by ascending order
Errata report order is enforced to be in ascending order. To achieve
this with the errata framework this has to be done at the definition
level.

Also rename the disable_non_temporal_hint to its erratum number to
conform to convention.

Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com>
Change-Id: Id474872afebf361ab3d21c454ab3624db8354045
2023-08-24 14:27:42 -05:00
Sandrine Bailleux
32ed09eed5 Merge "docs(psa): doc AP/RSS interfaces for NV ctrs/ROTPK" into integration 2023-08-16 09:11:24 +02:00
Madhukar Pappireddy
4ede8c39a2 Merge changes from topic "el3_direct_msg" into integration
* changes:
  docs(spm): document new build option
  feat(fvp): spmd logical partition smc handler
  feat(fvp): add spmd logical partition
  feat(spmd): get logical partitions info
  feat(spmd): add partition info get regs
  refactor(ff-a): move structure definitions
  feat(spmd): el3 direct message API
  feat(spmd): add spmd logical partitions
2023-08-14 17:12:59 +02:00
Raghu Krishnamurthy
a83aa72fd0 docs(spm): document new build option
Add documentation for the new build option ENABLE_SPMD_LP.

Signed-off-by: Raghu Krishnamurthy <raghu.ncstate@gmail.com>
Change-Id: I808e6c00e3699fc900dc97e889af63cc01cae794
2023-08-11 18:57:55 -07:00
Elizabeth Ho
5ac3fdcdfb docs: add instructions for PDF generation of docs
This patch details the required packages and terminal commands for
building the documentation in PDF format locally.

Change-Id: Ic5f416b73e46d5f362fe9eb909200b95eda19e6a
Signed-off-by: Elizabeth Ho <elizabeth.ho@arm.com>
2023-08-10 10:42:14 +01:00
Manish V Badarkhe
2360d18bb5 Merge "docs: remove blank pages from PDF documentation" into integration 2023-08-09 15:18:05 +02:00
Manish V Badarkhe
27bb509d7b Merge "fix: use rsvg-convert as the conversion backend" into integration 2023-08-09 15:18:02 +02:00
Rajasekaran Kalidoss
ffdf5ea47a docs(ethos-n): update build-options.rst
Move documentation related to Arm(R) Ethos(TM)-N NPU driver from
docs/plat/arm/arm-build-options.rst to
docs/getting_started/build-options.rst.

Signed-off-by: Rajasekaran Kalidoss <rajasekaran.kalidoss@arm.com>
Change-Id: I388e8dcd3950b11bc3305f5e6396ee2e49c04493
2023-08-07 19:13:58 +02:00
Lauren Wehrmeister
29ae73e3fb Merge changes from topic "mb/mb-signer-id" into integration
* changes:
  feat(qemu): add dummy plat_mboot_measure_key() function
  docs(rss): update RSS doc for signer-ID
  feat(imx): add dummy 'plat_mboot_measure_key' function
  feat(tc): implement platform function to measure and publish Public Key
  feat(auth): measure and publicise the Public Key
  feat(fvp): implement platform function to measure and publish Public Key
  feat(fvp): add public key-OID information in RSS metadata structure
  feat(auth): add explicit entries for key OIDs
  feat(rss): set the signer-ID in the RSS metadata
  feat(auth): create a zero-OID for Subject Public Key
  docs: add details about plat_mboot_measure_key function
  feat(measured-boot): introduce platform function to measure and publish Public Key
2023-08-07 16:53:35 +02:00
Bipin Ravi
db8621a2fe Merge changes from topic "ar/errata_refactor" into integration
* changes:
  fix(cpus): workaround for Neoverse N2 erratum 2779511
  fix(errata-abi): added Neoverse N2 to Errata ABI list
  fix(cpus): workaround for Neoverse N2 erratum 2743014
  fix(docs): updated certain Neoverse N2 erratum status in docs
  refactor(cpus): convert Neoverse N2 to use CPU helpers
  refactor(cpus): convert Neoverse N2 to framework
  refactor(cpus): reorder Neoverse N2 errata by ascending order
2023-08-04 18:01:07 +02:00
Soby Mathew
f560a13cad Merge "docs(rme): update tftf build command" into integration 2023-08-04 13:19:36 +02:00
Arvind Ram Prakash
12d28067c9 fix(cpus): workaround for Neoverse N2 erratum 2779511
Neoverse N2 erratum 2779511 is a Cat B erratum that applies to
all revisions <=r0p2 and is fixed in r0p3. The workaround is to
set bit[47] of CPUACTLR3_EL1

SDEN documentation:
https://developer.arm.com/documentation/SDEN1982442/latest

Signed-off-by: Arvind Ram Prakash <arvind.ramprakash@arm.com>
Change-Id: Iaa0e30de8473ecb1df1fcca3a45904aac2e419b3
2023-08-03 22:42:31 +02:00
Arvind Ram Prakash
eb44035cde fix(cpus): workaround for Neoverse N2 erratum 2743014
Neoverse N2 erratum 2743014 is a Cat B erratum that applies to
all revisions <=r0p2 and is fixed in r0p3. The workaround is to
set CPUACTLR5_EL1[56:55] to 2'b01.

SDEN documentation:
https://developer.arm.com/documentation/SDEN1982442/latest

Signed-off-by: Arvind Ram Prakash <arvind.ramprakash@arm.com>
Change-Id: Ie7e1be5dea9d1f74738f9fed0fb58bfd41763192
2023-08-03 22:42:18 +02:00
Arvind Ram Prakash
d6d34b3913 fix(docs): updated certain Neoverse N2 erratum status in docs
Certain Neoverse N2 erratum in docs were out of date with the latest
SDEN document and hence updated it to match the latest

SDEN documentation:
https://developer.arm.com/documentation/SDEN1707916/latest

Signed-off-by: Arvind Ram Prakash <arvind.ramprakash@arm.com>
Change-Id: I5d82a56388a46a09a42b940a633ecebdde0c74e3
2023-08-03 22:42:10 +02:00
Elizabeth Ho
7bbccd4de6 docs: remove blank pages from PDF documentation
The PDF documentation download has a lot of blank pages. This is
because Sphinx starts each section on an odd numbered page for
duplex printing. This patch fixes this to allow sections to start
on any page.

Change-Id: I1ba8a4707c39b54205f2a3c9b47c1c21a3fedcb9
Signed-off-by: Elizabeth Ho <elizabeth.ho@arm.com>
2023-08-02 14:22:59 +01:00
Shruti Gupta
b175287075 docs(rme): update tftf build command
Deprecate pack_realm build command for TFTF.
To build Realm payload tests use ENABLE_REALM_PAYLOAD_TESTS=1.
This new command line for TFTF is effective from SHA 9945bef6b
in tf-a-tests repo.

Signed-off-by: Shruti Gupta <shruti.gupta@arm.com>
Change-Id: Iee9ac9b2b367aac50677fac95631e7e4818cdf3a
2023-08-02 13:31:10 +01:00
laurenw-arm
5b00658867 docs(psa): doc AP/RSS interfaces for NV ctrs/ROTPK
Adding documentation for AP/RSS interfaces for NV counters and ROTPK

Change-Id: I38745bcc5d53317bab07bb81f11f9ba4551a224f
Signed-off-by: Lauren Wehrmeister <lauren.wehrmeister@arm.com>
2023-07-31 10:49:05 -05:00
Harrison Mutai
c365476003 fix: use rsvg-convert as the conversion backend
The auxiliary pdf build requires SVG files to be converted to pdf files.
Use libRSVG as a light weight alternative to inkscape, and ensure it's
installed in the build environment.

Change-Id: I1fdb05fb2701fc28a04e210d5928f4387ca08613
Signed-off-by: Harrison Mutai <harrison.mutai@arm.com>
2023-07-28 12:37:49 +01:00
Manish V Badarkhe
137d934dd9 docs(rss): update RSS doc for signer-ID
Added details about the API that calculates the signer-ID and updated
console log details to provide signer-ID information for each image.

Change-Id: If637b3719418e9c0b8d2844c92bddbdfe454bfb8
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>
2023-07-28 09:01:15 +01:00
Manish V Badarkhe
97653189bc docs: add details about plat_mboot_measure_key function
Added details of 'plat_mboot_measure_key' function in the porting-guide.

Change-Id: Id62211abc0ba13a0f581dc8e24c7b367afe2dcf5
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>
2023-07-28 09:01:04 +01:00
rutigl@gmail.com
edcece15c7 feat(nuvoton): added support for npcm845x chip
Initial version

Signed-off-by: Margarita Glushkin <rutigl@gmail.com>
Change-Id: If433d325a90b519ae5f02411865bffd368ff2824
2023-07-26 08:14:45 +03:00
Manish V Badarkhe
43a6544f01 Merge "chore(docs): update march utility details" into integration 2023-07-25 16:53:26 +02:00