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fix(cpus): workaround for Neoverse V2 erratum 2743011

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Neoverse V2 erratum 2743011 is a Cat B erratum that applies to
all revisions <= r0p1 and is fixed in r0p2. The workaround is to
set CPUACTLR5_EL1[56:55] to 2'b01.

SDEN documentation:
https://developer.arm.com/documentation/SDEN2332927/latest

Signed-off-by: Bipin Ravi <bipin.ravi@arm.com>
Change-Id: I0e06ca723a1cce51fb027b7160f3dd06a4c93e64
This commit is contained in:
Bipin Ravi 2023-09-18 19:54:41 -05:00
parent ff342643bc
commit 58dd153cc8
5 changed files with 26 additions and 3 deletions
docs/design
cpu-specific-build-macros.rst
include/lib/cpus/aarch64
neoverse_v2.h
lib/cpus
aarch64
neoverse_v2.S
cpu-ops.mk
services/std_svc/errata_abi
errata_abi_main.c

4
docs/design/cpu-specific-build-macros.rst
View file

@ -536,6 +536,10 @@ For Neoverse V2, the following errata build flags are defined :
CPU. This needs to be enabled for revisions r0p0 and r0p1. It is fixed in
r0p2.
- ``ERRATA_V2_2743011``: This applies errata 2743011 workaround to Neoverse-V2
CPU. This needs to be enabled for revisions r0p0 and r0p1. It is fixed in
r0p2.
- ``ERRATA_V2_2779510``: This applies errata 2779510 workaround to Neoverse-V2
CPU. This needs to be enabled for revisions r0p0 and r0p1. It is fixed in
r0p2.

7
include/lib/cpus/aarch64/neoverse_v2.h
View file

@ -43,4 +43,11 @@
#define NEOVERSE_V2_CPUACTLR3_EL1 S3_0_C15_C1_2
#define NEOVERSE_V2_CPUACTLR3_EL1_BIT_47 (ULL(1) << 47)
/*******************************************************************************
* CPU Auxiliary Control register 5 specific definitions.
******************************************************************************/
#define NEOVERSE_V2_CPUACTLR5_EL1 S3_0_C15_C8_0
#define NEOVERSE_V2_CPUACTLR5_EL1_BIT_56 (ULL(1) << 56)
#define NEOVERSE_V2_CPUACTLR5_EL1_BIT_55 (ULL(1) << 55)
#endif /* NEOVERSE_V2_H */

7
lib/cpus/aarch64/neoverse_v2.S
View file

@ -35,6 +35,13 @@ workaround_reset_end neoverse_v2, ERRATUM(2719105)
check_erratum_ls neoverse_v2, ERRATUM(2719105), CPU_REV(0, 1)
workaround_reset_start neoverse_v2, ERRATUM(2743011), ERRATA_V2_2743011
sysreg_bit_set NEOVERSE_V2_CPUACTLR5_EL1, NEOVERSE_V2_CPUACTLR5_EL1_BIT_55
sysreg_bit_clear NEOVERSE_V2_CPUACTLR5_EL1, NEOVERSE_V2_CPUACTLR5_EL1_BIT_56
workaround_reset_end neoverse_v2, ERRATUM(2743011)
check_erratum_ls neoverse_v2, ERRATUM(2743011), CPU_REV(0, 1)
workaround_reset_start neoverse_v2, ERRATUM(2779510), ERRATA_V2_2779510
sysreg_bit_set NEOVERSE_V2_CPUACTLR3_EL1, NEOVERSE_V2_CPUACTLR3_EL1_BIT_47
workaround_reset_end neoverse_v2, ERRATUM(2779510)

4
lib/cpus/cpu-ops.mk
View file

@ -798,6 +798,10 @@ CPU_FLAG_LIST += ERRATA_V2_2719103
# to revisions r0p0 and r0p1. It is fixed in r0p2.
CPU_FLAG_LIST += ERRATA_V2_2719105
# Flag to apply erratum 2743011 workaround during reset. This erratum applies
# to revisions r0p0 and r0p1. It is fixed in r0p2.
CPU_FLAG_LIST += ERRATA_V2_2743011
# Flag to apply erratum 2779510 workaround during reset. This erratum applies
# to revisions r0p0 and r0p1. It is fixed in r0p2.
CPU_FLAG_LIST += ERRATA_V2_2779510

7
services/std_svc/errata_abi/errata_abi_main.c
View file

@ -403,9 +403,10 @@ struct em_cpu_list cpu_list[] = {
[1] = {2719103, 0x00, 0x01, ERRATA_V2_2719103, \
ERRATA_NON_ARM_INTERCONNECT},
[2] = {2719105, 0x00, 0x01, ERRATA_V2_2719105},
[3] = {2779510, 0x00, 0x01, ERRATA_V2_2779510},
[4] = {2801372, 0x00, 0x01, ERRATA_V2_2801372},
[5 ... ERRATA_LIST_END] = UNDEF_ERRATA,
[3] = {2743011, 0x00, 0x01, ERRATA_V2_2743011},
[4] = {2779510, 0x00, 0x01, ERRATA_V2_2779510},
[5] = {2801372, 0x00, 0x01, ERRATA_V2_2801372},
[6 ... ERRATA_LIST_END] = UNDEF_ERRATA,
}
},
#endif /* NEOVERSE_V2_H_INC */