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fix(cpus): workaround for Neoverse N2 erratum 2743014

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Neoverse N2 erratum 2743014 is a Cat B erratum that applies to
all revisions <=r0p2 and is fixed in r0p3. The workaround is to
set CPUACTLR5_EL1[56:55] to 2'b01.

SDEN documentation:
https://developer.arm.com/documentation/SDEN1982442/latest

Signed-off-by: Arvind Ram Prakash <arvind.ramprakash@arm.com>
Change-Id: Ie7e1be5dea9d1f74738f9fed0fb58bfd41763192
This commit is contained in:
Arvind Ram Prakash 2023-07-05 17:24:23 -05:00
parent d6d34b3913
commit eb44035cde
6 changed files with 22 additions and 3 deletions
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4
docs/design/cpu-specific-build-macros.rst
View file

@ -641,6 +641,10 @@ For Neoverse N2, the following errata build flags are defined :
CPU. This needs to be enabled for revision r0p0 of the CPU, it is fixed in
r0p1.
- ``ERRATA_N2_2743014``: This applies errata 2743014 workaround to Neoverse-N2
CPU. This needs to be enabled for revisions r0p0, r0p1 and r0p2. It is fixed
in r0p3.
- ``ERRATA_N2_2743089``: This applies errata 2743089 workaround to Neoverse-N2
CPU. This needs to be enabled for revisions r0p0, r0p1 and r0p2. It is fixed
in r0p3.

2
include/lib/cpus/aarch64/neoverse_n2.h
View file

@ -46,6 +46,8 @@
* CPU Auxiliary Control register 5 specific definitions.
******************************************************************************/
#define NEOVERSE_N2_CPUACTLR5_EL1 S3_0_C15_C8_0
#define NEOVERSE_N2_CPUACTLR5_EL1_BIT_56 (ULL(1) << 56)
#define NEOVERSE_N2_CPUACTLR5_EL1_BIT_55 (ULL(1) << 55)
#define NEOVERSE_N2_CPUACTLR5_EL1_BIT_44 (ULL(1) << 44)
#define NEOVERSE_N2_CPUACTLR5_EL1_BIT_13 (ULL(1) << 13)
#define NEOVERSE_N2_CPUACTLR5_EL1_BIT_17 (ULL(1) << 17)

8
lib/cpus/aarch64/neoverse_n2.S
View file

@ -166,6 +166,14 @@ workaround_reset_end neoverse_n2, ERRATUM(2388450)
check_erratum_ls neoverse_n2, ERRATUM(2388450), CPU_REV(0, 0)
workaround_reset_start neoverse_n2, ERRATUM(2743014), ERRATA_N2_2743014
/* Set CPUACTLR5_EL1[56:55] to 2'b01 */
sysreg_bit_set NEOVERSE_N2_CPUACTLR5_EL1, NEOVERSE_N2_CPUACTLR5_EL1_BIT_55
sysreg_bit_clear NEOVERSE_N2_CPUACTLR5_EL1, NEOVERSE_N2_CPUACTLR5_EL1_BIT_56
workaround_reset_end neoverse_n2, ERRATUM(2743014)
check_erratum_ls neoverse_n2, ERRATUM(2743014), CPU_REV(0, 2)
workaround_runtime_start neoverse_n2, ERRATUM(2743089), ERRATA_N2_2743089
/* dsb before isb of power down sequence */
dsb sy

4
lib/cpus/cpu-ops.mk
View file

@ -668,6 +668,10 @@ CPU_FLAG_LIST += ERRATA_N2_2388450
# r0p3.
CPU_FLAG_LIST += ERRATA_N2_2728475
# Flag to apply erratum 2743014 workaround during reset. This erratum applies
# to r0p0, r0p1, r0p2 of the Neoverse N2 cpu, it is fixed in r0p3.
CPU_FLAG_LIST += ERRATA_N2_2743014
# Flag to apply erratum 2743089 workaround during during powerdown. This erratum
# applies to all revisions <= r0p2 of the Neoverse N2 cpu, it is fixed in r0p3.
CPU_FLAG_LIST += ERRATA_N2_2743089

2
services/std_svc/errata_abi/cpu_errata_info.h
View file

@ -39,7 +39,7 @@
#include <cortex_a9.h>
#endif
#define MAX_ERRATA_ENTRIES 16
#define MAX_ERRATA_ENTRIES 32
#define ERRATA_LIST_END (MAX_ERRATA_ENTRIES - 1)

5
services/std_svc/errata_abi/errata_abi_main.c
View file

@ -346,8 +346,9 @@ struct em_cpu_list cpu_list[] = {
[12] = {2388450, 0x00, 0x00, ERRATA_N2_2388450},
[13] = {2728475, 0x00, 0x02, ERRATA_N2_2728475, \
ERRATA_NON_ARM_INTERCONNECT},
[14] = {2743089, 0x00, 0x02, ERRATA_N2_2743089},
[15 ... ERRATA_LIST_END] = UNDEF_ERRATA,
[14] = {2743014, 0x00, 0x02, ERRATA_N2_2743014},
[15] = {2743089, 0x00, 0x02, ERRATA_N2_2743089},
[16 ... ERRATA_LIST_END] = UNDEF_ERRATA,
}
},
#endif /* NEOVERSE_N2_H_INC */