Commit graph

11606 commits

Author SHA1 Message Date
Boyan Karatotev
c65bf2d134 docs: add top level section numbering
Top level sections are not numbered. Adding numbers makes referring to
sections easier. For example the Maintainers page changes from
"about/3.1" to simply "1.3.1".

Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com>
Change-Id: If90a18ee8d6a6858d58f0687f31ea62b69399e04
2022-11-16 14:06:48 +00:00
Boyan Karatotev
b50838bae7 docs(build): clarify getting started section
The Getting started section is very difficult to follow. Building the
fip comes before building the files it needs, the BL33 requirement is
given in a somewhat hand wavy way, and the Arm Developer website
download provides a lot of targets and the guide is not clear which ones
are needed on download.

Swapping the initial build and supporting tools sections makes the flow
more natural and the supporting tools section then becomes clear.
Explicitly mentioning the GCC targets avoids confusion for people less
familiar with the project (eg. new starters).

Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com>
Change-Id: I02e88f8c279db6d8eda68f634e8473c02b733963
2022-11-16 14:06:48 +00:00
Boyan Karatotev
8526472a46 docs(build): clarify docs building instructions
Using virtual environments with pip is a generally recommended good
practice but the docs do not acknowledge it. As a result fresh installs
might fail builds due to missing $PATH entries. The Prerequisites
section is also a bit verbose which is difficult to read.

This patch adds the virtual environment mention and clarifies wording.

Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com>
Change-Id: Iea447fb59dc471a502454650c8548192d93ba879
2022-11-16 14:06:48 +00:00
Boyan Karatotev
e48b1f8c48 fix(docs): prevent a sphinx warning
Some newer versions of sphinx (tried on v5.3) will warn about language
being None which will fail the build. Change it to the default (en) to
prevent this.

Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com>
Change-Id: Ie0570481f42aeb293e885ca936e0765f6cb299a8
2022-11-16 14:06:48 +00:00
Boyan Karatotev
3fd1fe388e fix(docs): prevent a virtual environment from failing a build
sphinx-build is passed a blanket "." to build all docs. However, if a
virtual environment is placed within the docs directory, sphinx will try
to build it which will fail due to some weird files it has.

This excludes the most common virtual environment directories from the
build to prevent this.

Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com>
Change-Id: Ieeb14cfc5730d21c986611feb0ed379c58dfcae2
2022-11-16 14:06:48 +00:00
Manish Pandey
fbcbd88eb1 Merge "fix(rockchip): align fdt buffer on 8 bytes" into integration 2022-11-15 12:18:39 +01:00
Quentin Schulz
621acbd055 fix(rockchip): align fdt buffer on 8 bytes
Since commit 94b2f94bd6 ("feat(libfdt): upgrade libfdt source files"),
8-byte alignment of the FDT address is enforced to follow the DT
standard.

Rockchip implementation of params_early_setup loads the FDT address as
passed by the bootloader into a buffer. This buffer is currently made of
uint8_t which means it is not 8-byte aligned and might result in
fdt_open_into failing.

Instead, let's make this buffer uint64_t to make it 8-byte aligned.

Cc: Quentin Schulz <foss+tf-a@0leil.net>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Change-Id: Ifcf0e0cf4000e3661d76d3c3a2fe3921f7fe44b9
2022-11-15 11:22:42 +01:00
Manish Pandey
e1d24114a6 Merge changes I256959d7,I721376bf into integration
* changes:
  fix(cpus): remove plat_can_cmo check for aarch32
  fix(cpus): update doc and check for plat_can_cmo
2022-11-14 15:54:27 +01:00
Manish Pandey
5fab71a7dc Merge "refactor(stm32mp1): remove STM32MP_USE_STM32IMAGE" into integration 2022-11-14 15:40:06 +01:00
Okash Khawaja
92f8be8fd1 fix(cpus): remove plat_can_cmo check for aarch32
We don't need CONDITIONAL_CMO for aarch32 so let's remove it.

Signed-off-by: Okash Khawawja <okash@google.com>
Change-Id: I256959d7005df21a850ff7791c8188ea01f5c53b
2022-11-14 15:31:17 +01:00
Okash Khawaja
a2e0123484 fix(cpus): update doc and check for plat_can_cmo
plat_can_cmo must not clobber x1 but the doc doesn't mention that. This
patch updates the doc to mention x1. It also adds check for plat_can_cmo
to `dcsw_op_louis` which was missed out in original patch.

Signed-off-by: Okash Khawaja <okash@google.com>
Change-Id: I721376bf3726520d0d5b0df0f33f98ce92257287
2022-11-14 15:31:12 +01:00
Yann Gautier
981b9dcb87 refactor(stm32mp1): remove STM32MP_USE_STM32IMAGE
The code managing legacy boot (without FIP) that was under
STM32MP_USE_STM32IMAGE flag is remove.

Change-Id: I04452453ed84567b0de39e900594a81526562259
Signed-off-by: Yann Gautier <yann.gautier@st.com>
2022-11-14 14:14:48 +01:00
Manish Pandey
c3170fd80b Merge changes from topic "stm32mp1-trusted-boot" into integration
* changes:
  docs(st): update documentation for TRUSTED_BOARD_BOOT
  fix(build): ensure that the correct rule is called for tools
  feat(stm32mp1): add the platform specific build for tools
  fix(stm32mp13-fdts): remove secure status
  feat(stm32mp1-fdts): add CoT and fuse references for authentication
  feat(stm32mp1): add a check on TRUSTED_BOARD_BOOT with secure chip
  feat(stm32mp1): add the decryption support
  feat(stm32mp1): add the TRUSTED_BOARD_BOOT support
  feat(stm32mp1): update ROM code API for header v2 management
  feat(stm32mp1): remove unused function from boot API
  refactor(stm32mp1): remove authentication using STM32 image mode
  fix(fconf): fix type error displaying disable_auth
  feat(tbbr): increase PK_DER_LEN size
  fix(auth): correct sign-compare warning
  feat(auth): allow to verify PublicKey with platform format PK
  feat(cert-create): update for ECDSA brainpoolP256r/t1 support
  feat(stm32mp1): add RNG initialization in BL2 for STM32MP13
  feat(st-crypto): remove BL32 HASH driver usage
  feat(stm32mp1): add a stm32mp crypto library
  feat(st-crypto): add STM32 RNG driver
  feat(st-crypto): add AES decrypt/auth by SAES IP
  feat(st-crypto): add ECDSA signature check with PKA
  feat(st-crypto): update HASH for new hardware version used in STM32MP13
2022-11-14 14:11:55 +01:00
Lionel Debieve
b82a30c297 docs(st): update documentation for TRUSTED_BOARD_BOOT
Update the documentation to indicate commands needed for
TRUSTED_BOARD_BOOT management.

Change-Id: I7b8781eaa7f8b6b8d675a625c7ff2e1ee767222a
Signed-off-by: Lionel Debieve <lionel.debieve@foss.st.com>
2022-11-14 11:25:01 +01:00
Lionel Debieve
598b166bbc fix(build): ensure that the correct rule is called for tools
In case of platform specific usage for both fiptool or certtool,
we need to ensure that the Makefile will use the correct rule
to generate the binary. Add the explicit call to the "all" rule.

Change-Id: I9724b63e01b3497daaedb9365c7d6a494aac9561
Signed-off-by: Lionel Debieve <lionel.debieve@foss.st.com>
2022-11-14 11:25:01 +01:00
Lionel Debieve
461d631aca feat(stm32mp1): add the platform specific build for tools
Add cert_create and fiptool specific files to add the platform
addons to the generic tools.

Change-Id: Ifa600241cdf32b495cc65edccddab47c3796b77d
Signed-off-by: Lionel Debieve <lionel.debieve@foss.st.com>
2022-11-14 11:25:01 +01:00
Lionel Debieve
8ef8e0e30e fix(stm32mp13-fdts): remove secure status
Remove the secure status for PKA and SAES entries.
The peripherals are used in BL2 at EL3, context will
remain secure only.

Change-Id: I79d95bc55a9afd27f295249936d7bc332c777f5e
Signed-off-by: Lionel Debieve <lionel.debieve@foss.st.com>
2022-11-14 11:25:01 +01:00
Lionel Debieve
928fa66272 feat(stm32mp1-fdts): add CoT and fuse references for authentication
Add the stm32mp1 CoT description file. Include the TRUSTED_BOARD_BOOT
entry in the platform device tree file.
Add the missing public root key reference for stm32mp15 and the
encryption key reference for stm32mp13.

Change-Id: I0ae2454979a3df6dd3e4361510317742e8fbc109
Signed-off-by: Lionel Debieve <lionel.debieve@foss.st.com>
2022-11-14 11:25:01 +01:00
Lionel Debieve
54007c37d5 feat(stm32mp1): add a check on TRUSTED_BOARD_BOOT with secure chip
Add a security check to enforce the usage of TRUSTED_BOARD_BOOT
on closed device. It will guarantee the secure bootchain.

Change-Id: Id6120d0e5041e8f2d3866e5710876ec96b6d0216
Signed-off-by: Lionel Debieve <lionel.debieve@foss.st.com>
2022-11-14 11:25:01 +01:00
Lionel Debieve
cd791164a9 feat(stm32mp1): add the decryption support
Add the decryption support for STM32MP1 binaries.
Decryption is limited to the BL32 loaded images.

Limitation: STM32MP15 doesn't support the feature.

Change-Id: I96800bac7b22109f8471eb2953fc0dc269fc4fd1
Signed-off-by: Lionel Debieve <lionel.debieve@foss.st.com>
2022-11-14 11:25:01 +01:00
Lionel Debieve
beb625f90b feat(stm32mp1): add the TRUSTED_BOARD_BOOT support
Add the support of the TRUSTED_BOARD_BOOT to authenticate the loaded
FIP using platform CoT management.
It adds TBB platform definition, redefining the standard image ID in
order to decrease requested size in BL2 binary.
Authentication will use mbedTLS library for parsing certificate
configured with a platform configuration.

Change-Id: I9da66b915c5e9e9293fccfce92bef2434da1e430
Signed-off-by: Nicolas Toromanoff <nicolas.toromanoff@st.com>
Signed-off-by: Lionel Debieve <lionel.debieve@foss.st.com>
2022-11-14 11:25:01 +01:00
Lionel Debieve
89c07747d0 feat(stm32mp1): update ROM code API for header v2 management
Add the new definition field for authentication used in header V2
on STM32MP13.

Change-Id: Id8f0c2584ca9b74b0d21d82c9a98d286500548c4
Signed-off-by: Lionel Debieve <lionel.debieve@foss.st.com>
2022-11-14 11:25:01 +01:00
Lionel Debieve
f30034a298 feat(stm32mp1): remove unused function from boot API
Remove old library access from ROM library that is no more
used.

Change-Id: I9b91f1efd6ff9d311b69ca36f60474f01268c221
Signed-off-by: Lionel Debieve <lionel.debieve@foss.st.com>
2022-11-14 11:25:01 +01:00
Lionel Debieve
87dfbd7112 refactor(stm32mp1): remove authentication using STM32 image mode
Remove deprecated authentication mode to use the FIP authentication
based on TBBR requirements. It will use the new crypto library.

Change-Id: I95c7baa64ba42c370ae136f59781f2a7a4c7f507
Signed-off-by: Lionel Debieve <lionel.debieve@foss.st.com>
2022-11-14 11:25:01 +01:00
Lionel Debieve
381f465ca9 fix(fconf): fix type error displaying disable_auth
disable_auth is defined as uint32_t and must be displayed
as an unsigned int.

lib/fconf/fconf_tbbr_getter.c:
In function ‘fconf_populate_tbbr_dyn_config’:
include/common/debug.h:46:41: error:
format ‘%d’ expects argument of type ‘int’, but argument 3 has
 type ‘uint32_t’ {aka ‘unsigned int’} [-Werror=format=]
   46 | #define LOG_MARKER_WARNING              "\x1e"  /* 30 */
      |                                         ^~~~~~
include/common/debug.h:77:32: note:
 in expansion of macro ‘LOG_MARKER_WARNING’
   77 | # define WARN(...) tf_log(LOG_MARKER_WARNING __VA_ARGS__)
      |                           ^~~~~~~~~~~~~~~~~~
lib/fconf/fconf_tbbr_getter.c:47:17: note:
in expansion of macro ‘WARN’
   47 |                 WARN("Invalid value for `%s` cell %d\n",
      |                 ^~~~
include/common/debug.h:48:41: error:
format ‘%d’ expects argument of type ‘int’, but argument 5 has
 type ‘uint32_t’ {aka ‘unsigned int’} [-Werror=format=]
   48 | #define LOG_MARKER_VERBOSE              "\x32"  /* 50 */
      |                                         ^~~~~~
include/common/debug.h:58:32: note:
in definition of macro ‘no_tf_log’
   58 |                 tf_log(fmt, ##__VA_ARGS__);     \
      |                        ^~~
include/common/debug.h:91:35: note:
in expansion of macro ‘LOG_MARKER_VERBOSE’
   91 | # define VERBOSE(...)
      |           no_tf_log(LOG_MARKER_VERBOSE __VA_ARGS__)
      |                     ^~~~~~~~~~~~~~~~~~
lib/fconf/fconf_tbbr_getter.c:74:9: note:
in expansion of macro ‘VERBOSE’
   74 |    VERBOSE("%s%s%s %d\n","FCONF: `tbbr.", "disable_auth",
      |    ^~~~~~~
cc1: all warnings being treated as errors

Change-Id: I0164ddfe511406cc1a8d014a368ef3e3c5f8cd27
Signed-off-by: Lionel Debieve <lionel.debieve@foss.st.com>
2022-11-14 11:25:01 +01:00
Nicolas Toromanoff
1ef303f9f7 feat(tbbr): increase PK_DER_LEN size
Public key brainpool ECDSA DER certificate are 92 byte long.
OID for brainpool curve are 1 byte bigger than the one for NIST curve.

Change-Id: Ifad51da3c576d555da9fc519d2df3d9a0e6ed91b
Signed-off-by: Nicolas Toromanoff <nicolas.toromanoff@st.com>
2022-11-14 11:25:01 +01:00
Nicolas Toromanoff
ed38366f1d fix(auth): correct sign-compare warning
Correct the warning due to comparison between signed and
unsigned variable.

drivers/auth/mbedtls/mbedtls_x509_parser.c: In function 'get_ext':
drivers/auth/mbedtls/mbedtls_x509_parser.c:120:30:
	error: comparison of integer expressions of different
	signedness: 'int' and 'size_t' {aka 'unsigned int'}
	[-Werror=sign-compare]
120 | if ((oid_len == strlen(oid_str)) && !strcmp(oid, oid_str)) {
    |              ^~

Change-Id: Ic12527f5f92a34e925bee3047c168eacf5e99d8a
Signed-off-by: Nicolas Toromanoff <nicolas.toromanoff@st.com>
2022-11-14 11:25:01 +01:00
Nicolas Toromanoff
40f9f644e8 feat(auth): allow to verify PublicKey with platform format PK
In some platform the digest of the public key saved in the OTP is not
the digest of the exact same public key buffer needed to check the
signature. Typically, platform checks signature using the DER ROTPK
whereas some others add some related information. Add a new platform
weak function to transform the public key buffer used by
verify_signature to a platform specific public key.

Mark this new weak function as deprecated as it will be replaced
by another framework implementation.

Change-Id: I71017b41e3eca9398cededf317ad97e9b511be5f
Signed-off-by: Nicolas Toromanoff <nicolas.toromanoff@st.com>
Signed-off-by: Lionel Debieve <lionel.debieve@foss.st.com>
2022-11-14 11:25:01 +01:00
Lionel Debieve
e78ba69e35 feat(cert-create): update for ECDSA brainpoolP256r/t1 support
Updated cert_tool to be able to select brainpool P256r/t1
or NIST prim256v1 curve for certificates signature.

Change-Id: I6e800144697069ea83660053b8ba6e21c229243a
Signed-off-by: Nicolas Toromanoff <nicolas.toromanoff@st.com>
Signed-off-by: Lionel Debieve <lionel.debieve@foss.st.com>
2022-11-14 11:25:01 +01:00
Manish Pandey
84498ad163 Merge changes I5838964f,Id752c1cc,Idd42d5a2,Iff4680cd,I2b1801a7, ... into integration
* changes:
  fix(mt8188): add mmap entry for CPU idle SRAM
  fix(mt8188): refine gic init flow after system resume
  fix(mt8186): fix the DRAM voltage after the system resumes
  feat(mt8188): add audio support
  refactor(mt8195): use ptp3 common drivers
  feat(mt8188): add support for PTP3
  feat(mt8188): enable MTK_PUBEVENT_ENABLE
2022-11-14 11:17:27 +01:00
Nicolas Le Bayon
2742374414 feat(stm32mp1): add RNG initialization in BL2 for STM32MP13
Initialize RNG driver at platform level for STM32MP13.

Change-Id: I64832de43e5f6559a12e26680142db54c88f0b9e
Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@foss.st.com>
2022-11-14 10:55:17 +01:00
Lionel Debieve
6b5fc19227 feat(st-crypto): remove BL32 HASH driver usage
Remove unused mode for HASH driver. The driver will only be
used in BL2 scope.

Change-Id: I1fce09cdaa9da0c11554ac5f73433b4bee776011
Signed-off-by: Lionel Debieve <lionel.debieve@foss.st.com>
2022-11-14 10:55:17 +01:00
Lionel Debieve
ad3e46a35c feat(stm32mp1): add a stm32mp crypto library
Add the crypto library for STM32MP1 to use STM32 hardware
accelerators.

Change-Id: I0bbb941001242a6fdc47514ab3efe07b12249285
Signed-off-by: Nicolas Toromanoff <nicolas.toromanoff@st.com>
Signed-off-by: Lionel Debieve <lionel.debieve@foss.st.com>
2022-11-14 10:55:17 +01:00
Yann Gautier
af8dee20d5 feat(st-crypto): add STM32 RNG driver
This driver manages the STM32 Random Number Generator
peripheral.

Change-Id: I4403ebb2dbdaa8df993a4413f1ef48eeba00427c
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Signed-off-by: Lionel Debieve <lionel.debieve@foss.st.com>
2022-11-14 10:55:17 +01:00
Nicolas Toromanoff
4bb4e83649 feat(st-crypto): add AES decrypt/auth by SAES IP
Add code to be able to use STMicroelectronics SAES IP. This driver
can manage many AES algorithms (CBC, ECB, CCM, GCM). It will be used
by the authenticated decryption framework (AES-GCM only).

Change-Id: Ibd4030719fb12877dcecd5d2c395d13b4b15c260
Signed-off-by: Nicolas Toromanoff <nicolas.toromanoff@st.com>
2022-11-14 10:55:17 +01:00
Nicolas Toromanoff
b0fbc02aea feat(st-crypto): add ECDSA signature check with PKA
Add code to be able to use STMicroelectronics PKA peripheral
in the authentication framework.

Change-Id: Ifeafe84c68db483cd18674f2280576cc065f92ee
Signed-off-by: Nicolas Toromanoff <nicolas.toromanoff@st.com>
2022-11-14 10:55:17 +01:00
Nicolas Toromanoff
68039f2d14 feat(st-crypto): update HASH for new hardware version used in STM32MP13
Introduce new flag to manage hardware version.
STM32MP15 currently uses the HASH_V2 and STM32MP13 uses the HASH_V4.
For STM32_HASH_V4: remove MD5 algorithm (no more supported) and
add SHA384 and SHA512.

For STM32_HASH_V2: no change.

Change-Id: I3a9ae9e38249a2421c657232cb0877004d04dae1
Signed-off-by: Nicolas Toromanoff <nicolas.toromanoff@st.com>
Signed-off-by: Lionel Debieve <lionel.debieve@foss.st.com>
2022-11-14 10:55:17 +01:00
Liju-Clr Chen
32071c0263 fix(mt8188): add mmap entry for CPU idle SRAM
CPU PM driver accesses CPU idle SRAM during the system suspend
process. The region of CPU idle SRAM needs to be added as mmap entry.
Otherwise, the execption would occur.

BUG=b:244215539
TEST=Test of suspend resume passes.

Signed-off-by: Liju-Clr Chen <liju-clr.chen@mediatek.com>
Change-Id: I5838964fd9cb1b833e4006e2123febb4a4601003
2022-11-14 15:54:09 +08:00
James Liao
210ebbb0a6 fix(mt8188): refine gic init flow after system resume
Call gicv3_distif_init() instead of mt_gic_init() in
armv8_2_mcusys_pwr_on_common(). This is to prevent
gicv3_rdistif_init() and gicv3_cpuif_enable() from being called twice
in the power-on flow. gicv3_rdistif_init() and gicv3_cpuif_enable()
are called in later armv8_2_cpu_pwr_on_common().

BUG=b:244215539
TEST=Suspend Resume Test pass

Change-Id: Id752c1ccbb9eab277ed6278c2dd90a051a894146
Signed-off-by: Liju-Clr Chen <liju-clr.chen@mediatek.com>
2022-11-14 09:55:07 +08:00
Allen-KH Cheng
600f168172 fix(mt8186): fix the DRAM voltage after the system resumes
The DRAM power supply must sustain at 0.8V after the system resumes.
Otherwise, unexpected errors would occur. Therefore, we update the
DRAM voltage to 0.8v in PMIC voltage wrap table.

BUG=b:253537849
TEST=Suspend Resume Test

Signed-off-by: Allen-KH Cheng <allen-kh.cheng@mediatek.corp-partner.google.com>
Change-Id: Idd42d5a2d646468822e391e48d01d870c3b7f0d3
2022-11-14 09:55:07 +08:00
Trevor Wu
c70f567ad7 feat(mt8188): add audio support
For MT8188, MTK_AUDIO_SMC_OP_DOMAIN_SIDEBANDS is required for normal
mode switch.
  - Add audio common code and chip specific code.
  - Add new id (MTK_SIP_AUDIO_CONTROL) to mtk_sip_def.h.
  - Enable for MT8188.

Signed-off-by: Trevor Wu <trevor.wu@mediatek.com>
Change-Id: Iff4680cd0b520b2b519ecf30ecafe100f147cc62
2022-11-14 09:55:07 +08:00
Liju-Clr Chen
f278d84ded refactor(mt8195): use ptp3 common drivers
Some 8195 ptp3 drivers are the same in plat/mediatek/drivers/ptp3, so
add this patch to reuse them.

Change-Id: I2b1801a73b6a2979e20d49d314c57f663dc5bf04
Signed-off-by: Liju-Clr Chen <liju-clr.chen@mediatek.com>
2022-11-14 09:55:07 +08:00
Riven Chen
44a10511c9 feat(mt8188): add support for PTP3
Add PTP3 driver to protect CPU from excessive voltage drop in CPU
heavy loading.

Signed-off-by: Riven Chen <riven.chen@mediatek.corp-partner.google.com>
Change-Id: I394096be43e1d1d615f99b22f38f0b3ae0bb40c1
2022-11-14 09:55:07 +08:00
Rex-BC Chen
0b1186a3e6 feat(mt8188): enable MTK_PUBEVENT_ENABLE
Enable MTK_PUBEVENT_ENABLE for subscribing CPUPM events. This
patch also corrects the header file naming.

Signed-off-by: Bo-Chen Chen <rex-bc.chen@mediatek.com>
Change-Id: Iabd89a4ead21ccafa833390367484bfea5d351f6
2022-11-14 09:55:07 +08:00
Manish V Badarkhe
797d7446a0 Merge "refactor(security): add OpenSSL 1.x compatibility" into integration 2022-11-11 19:59:58 +01:00
Juan Pablo Conde
cf2dd17ddd refactor(security): add OpenSSL 1.x compatibility
When updated to work with OpenSSL 3.0, the host tools lost their
compatibility with previous versions (1.x) of OpenSSL. This is
mainly due to the fact that 1.x APIs became deprecated in 3.0 and
therefore their use cause compiling errors. In addition, updating
for a newer version of OpenSSL meant improving the stability
against security threats. However, although version 1.1.1 is
now deprecated, it still receives security updates, so it would
not imply major security issues to keep compatibility with it too.

This patch adds backwards compatibility with OpenSSL 1.x versions
by adding back 1.x API code. It defines a macro USING_OPENSSL3,
which will select the appropriate OpenSSL API version depending on
the OpenSSL library path chosen (which is determined by the
already-existing OPENSSL_DIR variable).

In addition, cleanup items were packed in functions and moved to
the proper modules in order to make the code more maintainable and
legible.

Signed-off-by: Juan Pablo Conde <juanpablo.conde@arm.com>
Change-Id: I8deceb5e419edc73277792861882404790ccd33c
2022-11-11 13:33:42 -05:00
Manish Pandey
7e88791a13 Merge "fix(docs): add LTS maintainers" into integration 2022-11-11 18:40:39 +01:00
Bipin Ravi
20a43156f7 Merge "feat(cpus): make cache ops conditional" into integration 2022-11-11 17:49:20 +01:00
Bipin Ravi
ab0d4d9d44 fix(docs): add LTS maintainers
Adding the  maintainers for the TF-A LTS releases.

Signed-off-by: Bipin Ravi <bipin.ravi@arm.com>
Change-Id: I683885b8b52c0d004218fa52f71a245bd26b1229
2022-11-11 10:08:05 -06:00
Manish Pandey
2f54614630 Merge "fix(pmu): add sensible default for MDCR_EL2" into integration 2022-11-11 16:56:30 +01:00