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feat(st-crypto): update HASH for new hardware version used in STM32MP13

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Introduce new flag to manage hardware version.
STM32MP15 currently uses the HASH_V2 and STM32MP13 uses the HASH_V4.
For STM32_HASH_V4: remove MD5 algorithm (no more supported) and
add SHA384 and SHA512.

For STM32_HASH_V2: no change.

Change-Id: I3a9ae9e38249a2421c657232cb0877004d04dae1
Signed-off-by: Nicolas Toromanoff <nicolas.toromanoff@st.com>
Signed-off-by: Lionel Debieve <lionel.debieve@foss.st.com>
This commit is contained in:
Nicolas Toromanoff 2020-12-22 13:54:51 +01:00 • committed by Lionel Debieve
parent 797d7446a0
commit 68039f2d14
3 changed files with 55 additions and 8 deletions
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43
drivers/st/crypto/stm32_hash.c
View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 2019-2021, STMicroelectronics - All Rights Reserved
* Copyright (c) 2019-2022, STMicroelectronics - All Rights Reserved
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@ -8,10 +8,6 @@
#include <errno.h>
#include <stdint.h>
#include <libfdt.h>
#include <platform_def.h>
#include <arch_helpers.h>
#include <common/debug.h>
#include <drivers/clk.h>
@ -20,9 +16,17 @@
#include <drivers/st/stm32mp_reset.h>
#include <lib/mmio.h>
#include <lib/utils.h>
#include <libfdt.h>
#include <plat/common/platform.h>
#include <platform_def.h>
#if STM32_HASH_VER == 2
#define DT_HASH_COMPAT "st,stm32f756-hash"
#endif
#if STM32_HASH_VER == 4
#define DT_HASH_COMPAT "st,stm32mp13-hash"
#endif
#define HASH_CR 0x00U
#define HASH_DIN 0x04U
@ -33,11 +37,22 @@
/* Control Register */
#define HASH_CR_INIT BIT(2)
#define HASH_CR_DATATYPE_SHIFT U(4)
#if STM32_HASH_VER == 2
#define HASH_CR_ALGO_SHA1 0x0U
#define HASH_CR_ALGO_MD5 BIT(7)
#define HASH_CR_ALGO_SHA224 BIT(18)
#define HASH_CR_ALGO_SHA256 (BIT(18) | BIT(7))
#endif
#if STM32_HASH_VER == 4
#define HASH_CR_ALGO_SHIFT U(17)
#define HASH_CR_ALGO_SHA1 (0x0U << HASH_CR_ALGO_SHIFT)
#define HASH_CR_ALGO_SHA224 (0x2U << HASH_CR_ALGO_SHIFT)
#define HASH_CR_ALGO_SHA256 (0x3U << HASH_CR_ALGO_SHIFT)
#define HASH_CR_ALGO_SHA384 (0xCU << HASH_CR_ALGO_SHIFT)
#define HASH_CR_ALGO_SHA512_224 (0xDU << HASH_CR_ALGO_SHIFT)
#define HASH_CR_ALGO_SHA512_256 (0xEU << HASH_CR_ALGO_SHIFT)
#define HASH_CR_ALGO_SHA512 (0xFU << HASH_CR_ALGO_SHIFT)
#endif
/* Status Flags */
#define HASH_SR_DCIS BIT(1)
@ -51,6 +66,10 @@
#define SHA1_DIGEST_SIZE 20U
#define SHA224_DIGEST_SIZE 28U
#define SHA256_DIGEST_SIZE 32U
#define SHA384_DIGEST_SIZE 48U
#define SHA512_224_DIGEST_SIZE 28U
#define SHA512_256_DIGEST_SIZE 32U
#define SHA512_DIGEST_SIZE 64U
#define RESET_TIMEOUT_US_1MS 1000U
#define HASH_TIMEOUT_US 10000U
@ -131,10 +150,12 @@ static void hash_hw_init(enum stm32_hash_algo_mode mode)
reg = HASH_CR_INIT | (HASH_DATA_8_BITS << HASH_CR_DATATYPE_SHIFT);
switch (mode) {
#if STM32_HASH_VER == 2
case HASH_MD5SUM:
reg |= HASH_CR_ALGO_MD5;
stm32_hash.digest_size = MD5_DIGEST_SIZE;
break;
#endif
case HASH_SHA1:
reg |= HASH_CR_ALGO_SHA1;
stm32_hash.digest_size = SHA1_DIGEST_SIZE;
@ -143,6 +164,16 @@ static void hash_hw_init(enum stm32_hash_algo_mode mode)
reg |= HASH_CR_ALGO_SHA224;
stm32_hash.digest_size = SHA224_DIGEST_SIZE;
break;
#if STM32_HASH_VER == 4
case HASH_SHA384:
reg |= HASH_CR_ALGO_SHA384;
stm32_hash.digest_size = SHA384_DIGEST_SIZE;
break;
case HASH_SHA512:
reg |= HASH_CR_ALGO_SHA512;
stm32_hash.digest_size = SHA512_DIGEST_SIZE;
break;
#endif
/* Default selected algo is SHA256 */
case HASH_SHA256:
default:

12
include/drivers/st/stm32_hash.h
View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 2019, STMicroelectronics - All Rights Reserved
* Copyright (c) 2019-2022, STMicroelectronics - All Rights Reserved
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@ -7,11 +7,19 @@
#ifndef STM32_HASH_H
#define STM32_HASH_H
#include <stdint.h>
enum stm32_hash_algo_mode {
#if STM32_HASH_VER == 2
HASH_MD5SUM,
#endif
HASH_SHA1,
HASH_SHA224,
HASH_SHA256
HASH_SHA256,
#if STM32_HASH_VER == 4
HASH_SHA384,
HASH_SHA512,
#endif
};
int stm32_hash_update(const uint8_t *buffer, size_t length);

8
plat/st/stm32mp1/platform.mk
View file

@ -110,6 +110,12 @@ $(error FWU Feature enabled only with FIP images)
endif
endif
ifeq ($(STM32MP13),1)
STM32_HASH_VER := 4
else # Assuming STM32MP15
STM32_HASH_VER := 2
endif
# Boot devices
STM32MP_EMMC ?= 0
STM32MP_SDMMC ?= 0
@ -223,6 +229,7 @@ $(eval $(call assert_booleans,\
$(eval $(call assert_numerics,\
$(sort \
PLAT_PARTITION_MAX_ENTRIES \
STM32_HASH_VER \
STM32_TF_A_COPIES \
STM32_TF_VERSION \
STM32MP_UART_BAUDRATE \
@ -233,6 +240,7 @@ $(eval $(call add_defines,\
DWL_BUFFER_BASE \
PLAT_PARTITION_MAX_ENTRIES \
PLAT_XLAT_TABLES_DYNAMIC \
STM32_HASH_VER \
STM32_TF_A_COPIES \
STM32_TF_VERSION \
STM32MP_DDR_32BIT_INTERFACE \