Commit graph

7861 commits

Author SHA1 Message Date
Wenzhen Yu
fb57af70ae feat(mt8196): add SPM basic features support
This patch mainly collects and organizes SPM state information to
facilitate debugging when issues arise.

Signed-off-by: Wenzhen Yu <wenzhen.yu@mediatek.com>
Change-Id: Ie51cffeb1d683d65d88701fc63c426b20b22492f
2025-01-22 15:28:08 +08:00
Wenzhen Yu
01ce1d5d2f feat(mt8196): add SPM features support
When the system is in idle or suspend state, SPM will turn off some
unused system resources. This patch enables this feature to achieve
power saving.

Signed-off-by: Wenzhen Yu <wenzhen.yu@mediatek.com>
Change-Id: Ia9764b91073c4765d41fe7fcd8e4a21372c290f1
2025-01-22 15:28:08 +08:00
Wenzhen Yu
e8e87683f2 feat(mt8196): enable PMIC low power setting
During suspend, it is necessary to set some power rails of the PMIC
to enter low power mode to achieve power saving.

Signed-off-by: Wenzhen Yu <wenzhen.yu@mediatek.com>
Change-Id: Iaeadd15270e0209f027fab80f478ad621bd59ea7
2025-01-22 15:27:52 +08:00
Kai Liang
5cb0bc07e3 feat(mt8196): add mcdi driver
Add MCDI driver to manage CPU idle states and optimize power consumption.

Signed-off-by: Kai Liang <kai.liang@mediatek.com>
Change-Id: I3a2e163730dd997dd72f2ebc1375dea38d728cb7
2025-01-22 12:01:28 +08:00
Kai Liang
4ba679da8b feat(mt8196): add pwr_ctrl module for CPU power management
Implement pwr_ctrl module to manage CPU power.

Signed-off-by: Kai Liang <kai.liang@mediatek.com>
Change-Id: I73a7a8a2d0b120b7225c2f323990176397b6e4a5
2025-01-22 11:53:33 +08:00
Kai Liang
95e974fa15 feat(mt8196): add mcusys moudles for power management
And mcusys drivers to enhance CPU power state control.

Signed-off-by: Kai Liang <kai.liang@mediatek.com>
Change-Id: I7d84407cebc16a5ab23359781574e9d02e90c58b
2025-01-22 11:51:32 +08:00
Kai Liang
75530ee280 feat(mt8196): add CPC module for power management
Add Centralized Power Control (CPC) module to manage CPU power states.

Signed-off-by: Kai Liang <kai.liang@mediatek.com>
Change-Id: I212155143018141c89427032f6a7d21243e750b7
2025-01-22 11:51:25 +08:00
Kai Liang
da54c72436 feat(mt8196): add topology module for power management
Add topology module to support CPU power state control.

Signed-off-by: Kai Liang <kai.liang@mediatek.com>
Change-Id: I0cc1e5a426762b1b29bff1e940e077643da02e5e
2025-01-22 11:51:16 +08:00
Hope Wang
adf73ae20a feat(mt8196): add SPMI driver
Add SPMI and PMIF driver for PMIC communication

Change-Id: Iad1d90381d6dad6b3e92fd9d6a3ce02fa11d15f1
Signed-off-by: Hope Wang <hope.wang@mediatek.corp-partner.google.com>
2025-01-22 11:51:07 +08:00
Hope Wang
d4e6f98d7f feat(mt8196): add PMIC driver
1. Add PMIC shutdown API
2. Add PMIC low power settings

Change-Id: I634a60fa3e2a74a6031df9fe59e2f52956ef7114
Signed-off-by: Hope Wang <hope.wang@mediatek.corp-partner.google.com>
2025-01-22 11:50:47 +08:00
Olivier Deprez
b8ac81c7e6 Merge "chore(fvp): use correct dts for dynamiq cores" into integration 2025-01-20 19:31:31 +01:00
Manish Pandey
d6dccfb01a Merge "build: remove Windows compatibility layer" into integration 2025-01-20 12:52:16 +01:00
Govindraj Raja
f532cd3069 Merge changes I137f69be,Ia2e7168f,I0e569d12,I614272ec,Ib68293f2 into integration
* changes:
  perf(psci): pass my_core_pos around instead of calling it repeatedly
  refactor(psci): move timestamp collection to psci_pwrdown_cpu
  refactor(psci): factor common code out of the standby finisher
  refactor(psci): don't use PSCI_INVALID_PWR_LVL to signal OFF state
  docs(psci): drop outdated cache maintenance comment
2025-01-15 17:03:27 +01:00
Manish Pandey
efe18729ad Merge "feat(mops): enable FEAT_MOPS in EL3 when INIT_UNUSED_NS_EL2=1" into integration 2025-01-15 15:25:23 +01:00
Olivier Deprez
1261f0aa98 Merge "fix(mediatek): covert MTK_BL to uppercase for the build" into integration 2025-01-15 10:31:39 +01:00
Gavin Liu
c7105798ed fix(mediatek): covert MTK_BL to uppercase for the build
The build macro no longer coverts variable names to uppercase.
We need to convert it to uppercase to pass it on.

Change-Id: If808fc77bce71d575e2d43ff83c4d9bcdcc52326
Signed-off-by: Gavin Liu <gavin.liu@mediatek.com>
2025-01-15 05:07:19 +02:00
Arvind Ram Prakash
6b8df7b9e5 feat(mops): enable FEAT_MOPS in EL3 when INIT_UNUSED_NS_EL2=1
FEAT_MOPS, mandatory from Arm v8.8, is typically managed in EL2.
However, in configurations where NS_EL2 is not enabled,
EL3 must set the HCRX_EL2.MSCEn bit to 1 to enable the feature.

This patch ensures FEAT_MOPS is enabled by setting HCRX_EL2.MSCEn to 1.

Change-Id: Ic4960e0cc14a44279156b79ded50de475b3b21c5
Signed-off-by: Arvind Ram Prakash <arvind.ramprakash@arm.com>
2025-01-14 15:30:19 -06:00
Chris Kay
c32737033c build: remove Windows compatibility layer
For a couple of releases now we have officially withdrawn support for
building TF-A on Windows using the native environment, relying instead
on POSIX emulation layers like MSYS2, Mingw64, Cygwin or WSL.

This change removes the remainder of the OS compatibility layer
entirely, and migrates the build system over to explicitly relying on a
POSIX environment.

Change-Id: I8fb60d998162422e958009afd17eab826e3bc39b
Signed-off-by: Chris Kay <chris.kay@arm.com>
2025-01-14 16:21:51 +00:00
Ghennadi Procopciuc
61b5ef21af feat(s32g274a): split early clock initialization
Initializing all early clocks before the MMU is enabled can impact boot
time. Therefore, splitting the setup into A53 clocks and peripheral
clocks can be beneficial, with the peripheral clocks configured after
fully initializing the MMU.

Change-Id: I19644227b66effab8e2c43e64e057ea0c8625ebc
Signed-off-by: Ghennadi Procopciuc <ghennadi.procopciuc@nxp.com>
2025-01-14 13:02:51 +02:00
Ghennadi Procopciuc
e2ae6ceccc feat(s32g274a): enable MMU for BL31 stage
Enable the MMU and add two entries to map the BL31 code and data
regions. Additional mappings will be added dynamically, enhancing
flexibility and modularity during the porting process.

Change-Id: I333c34c58274a115f62f54730bba5b71165e3e36
Signed-off-by: Ghennadi Procopciuc <ghennadi.procopciuc@nxp.com>
2025-01-14 13:02:51 +02:00
Ghennadi Procopciuc
5680f81cec feat(s32g274a): dynamically map GIC regions
Dynamically add entries for the GIC distributor and all its
redistributors for the cases when the platform is booted using enabled
MMU.

Change-Id: Ia810ec2329993057173e8fc25620a3df59b1e55d
Signed-off-by: Ghennadi Procopciuc <ghennadi.procopciuc@nxp.com>
2025-01-14 13:02:51 +02:00
Ghennadi Procopciuc
eb4d4185fa feat(s32g274a): enable MMU for BL2 stage
Enable the MMU and add two entries to map the BL2 code and data regions.
Additional mappings will be added dynamically, enhancing flexibility and
modularity during the porting process.

Change-Id: I107abf944dfdce9dcff47b08272a5001484de8a9
Signed-off-by: Ghennadi Procopciuc <ghennadi.procopciuc@nxp.com>
2025-01-14 13:02:51 +02:00
Ghennadi Procopciuc
507ce7ed6f feat(s32g274a): dynamically map siul2 and fip img
Dynamically map the remaining regions part of the BL2 stages using
dynamic regions.

Change-Id: Ia81666920b941218ddaa7d3244dfa5212525c75d
Signed-off-by: Ghennadi Procopciuc <ghennadi.procopciuc@nxp.com>
2025-01-14 13:02:51 +02:00
Ghennadi Procopciuc
34fb2b35b9 feat(s32g274a): map each image before its loading
The regions used by the stages loaded by BL2 must be mapped before they
can be used.

Change-Id: Ia70f8c5f35d7930e2b20f1a26be0ad2cdfea2b1a
Signed-off-by: Khristine Andreea Barbulescu <khristineandreea.barbulescu@nxp.com>
Signed-off-by: Ghennadi Procopciuc <ghennadi.procopciuc@nxp.com>
2025-01-14 13:02:51 +02:00
Ghennadi Procopciuc
008925861f feat(s32g274a): increase the number of MMU regions
Increase the maximum number of regions allocated by the translation
table library to accommodate the entries added in the next commits.

Change-Id: Ib0dd2d0dbc9b4a574367141a7c96d76dd08e2c7f
Signed-off-by: Ghennadi Procopciuc <ghennadi.procopciuc@nxp.com>
2025-01-14 13:02:51 +02:00
Ghennadi Procopciuc
a1e07b399b feat(s32g274a): add console mapping
Add on-demand mapping of the console registers.

Change-Id: I146af2306f167602710c57b637deb1845fd95aff
Signed-off-by: Ghennadi Procopciuc <ghennadi.procopciuc@nxp.com>
2025-01-14 13:02:51 +02:00
Boyan Karatotev
3b8021058a perf(psci): pass my_core_pos around instead of calling it repeatedly
On some platforms plat_my_core_pos is a nontrivial function that takes a
bit of time and the compiler really doesn't like to inline. In the PSCI
library, at least, we have no need to keep repeatedly calling it and we
can instead pass it around as an argument. This saves on a lot of
redundant calls, speeding the library up a bit.

Change-Id: I137f69bea80d7cac90d7a20ffe98e1ba8d77246f
Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com>
2025-01-14 10:02:00 +00:00
Mark Dykes
d0658e6086 Merge "fix(intel): handle cold reset via physical reset switch" into integration 2025-01-13 20:13:04 +01:00
Olivier Deprez
ee990d5217 Merge changes from topic "hob_creation_in_tf_a" into integration
* changes:
  feat(el3_spmc): ffa error handling in direct msg
  feat(ff-a): support FFA_MSG_SEND_DIRECT_REQ2/RESP2
  feat(ff-a): add FFA_MEM_PERM_GET/SET_SMC64
  feat(el3-spmc): support Hob list to boot S-EL0 SP
  feat(synquacer): add support Hob creation
  fix(fvp): exclude extend memory map TZC regions
  feat(fvp): add StandaloneMm manifest in fvp
  feat(spm): use xfer list with Hob list in SPM_MM
2025-01-13 20:02:39 +01:00
Manish Pandey
5e8509c22c Merge "feat(mt8196): link prebuilt library" into integration 2025-01-13 15:52:51 +01:00
Manish Pandey
4e59323c8f Merge "feat(mt8196): add Mediatek EMI stub implementation for mt8196" into integration 2025-01-13 15:52:22 +01:00
Gavin Liu
e033943661 feat(mt8196): link prebuilt library
If MTKLIB_PATH is provided, the build will use the library provided by
MTKLIB_PATH. Otherwise, it will use stub implementation.

Change-Id: I218e724231c8bbc6cc851a240c6bbc4f6f49f154
Signed-off-by: Gavin Liu <gavin.liu@mediatek.corp-partner.google.com>
2025-01-13 08:45:06 +01:00
Govindraj Raja
ea7bffdb85 Merge changes from topic "handoff_tpm_event_log" into integration
* changes:
  feat(qemu): hand off TPM event log via TL
  feat(handoff): common API for TPM event log handoff
  feat(handoff): transfer entry ID for TPM event log
  fix(qemu): fix register convention in BL31 for qemu
  fix(handoff): fix register convention in opteed
2025-01-09 20:20:41 +01:00
Jean-Philippe Brucker
d08dca4263 fix(qemu): fix RMM manifest checksum calculation
Commit 71c4443886ff ("fix(lib/rmm_el3_ifc): add console name to checksum
calculation") on TF-RMM updated the checksum calcualtion of the RMM
manifest to include the console names.

Include console names in the QEMU manifest to remain compatible with
RMM, just like commit aa99881d30 ("fix(rme): add console name to
checksum calculation") did for FVP.

Checksum calculation is done by adding together 64-bit values. Add a
helper that does this.

Change-Id: Ica6cab628160593830270bef1acdeb475d1c0c36
Signed-off-by: Jean-Philippe Brucker <jean-philippe@linaro.org>
2025-01-09 14:41:37 +00:00
Gavin Liu
39f5e27820 feat(mt8196): add Mediatek EMI stub implementation for mt8196
Implement stub functions for the EMI driver to ensure that the build
can pass when a prebuilt library is not available.

Change-Id: I296945a3df6766a3a133cd385a1e5038ca979403
Signed-off-by: Gavin Liu <gavin.liu@mediatek.corp-partner.google.com>
2025-01-09 09:16:00 +02:00
Govindraj Raja
79e11f5654 Merge changes I1f662f82,I59a3b297 into integration
* changes:
  fix(build): include platform mk earlier
  fix(arm): use EL3_PAS in MAP_BL2_TOTAL definition
2025-01-09 00:03:35 +01:00
Manish Pandey
001f22cdd4 Merge "feat(tc): print ni-tower discovery tree" into integration 2025-01-08 12:57:33 +01:00
Olivier Deprez
696ed16877 fix(build): include platform mk earlier
Move platform.mk inclusion in top level Makefile to permit a platform
specifying BRANCH_PROTECTION option.

Signed-off-by: Olivier Deprez <olivier.deprez@arm.com>
Change-Id: I1f662f82cd949eedfdbb61b9f66de15c46fb3106
2025-01-07 17:14:18 +01:00
Olivier Deprez
875423de49 fix(arm): use EL3_PAS in MAP_BL2_TOTAL definition
Similarly to BL1 and BL31, use EL3_PAS macro from xlat_tables header
(depends on ENABLE_RME) in BL2 to define MAP_BL2_TOTAL.

Signed-off-by: Olivier Deprez <olivier.deprez@arm.com>
Change-Id: I59a3b297efd2eacd082a297de6b579b7c9052883
2025-01-07 17:13:44 +01:00
Raymond Mao
cc58f08fe6 feat(qemu): hand off TPM event log via TL
If TRANSFER_LIST is enabled, hand off TPM event log via TL instead
of DT; otherwise fallback to legacy way if TRANSFER_LIST is off or
errors observed.

Moreover, for updating the TL from secure to non-secure
memory before existing EL3, replace memcpy with function
transfer_list_relocate() for more accuracy.

Change-Id: I1d6bcf573f91efe99380bc89195198a8583b1def
Signed-off-by: Raymond Mao <raymond.mao@linaro.org>
2025-01-07 07:15:30 -08:00
Jagdish Gediya
d87a856230 feat(tc): print ni-tower discovery tree
print ni-tower discovery tree to understand ni-tower hierarchy which
might be useful during debugging.

Change-Id: Ib49fef9c63f7740e04b4d8371c1083bd040f6e09
Signed-off-by: Jagdish Gediya <jagdish.gediya@arm.com>
Signed-off-by: Icen.Zeyada <Icen.Zeyada2@arm.com>
2025-01-07 14:42:25 +00:00
Jagdish Gediya
54289385f1 fix(tc): set console baurate to 38400 for fvp as well
Set console baurate to 38400 for fvp as well for code
simplicity.

Change-Id: I58ba6b7043541f6eb67e32257307da4eba0bb28a
Signed-off-by: Jagdish Gediya <jagdish.gediya@arm.com>
Signed-off-by: Icen.Zeyada <Icen.Zeyada2@arm.com>
2025-01-07 09:28:16 +00:00
Jagdish Gediya
25264e292c refactor(tc): remove redundant macro UARTCLK_FREQ
remove redundant macro UARTCLK_FREQ and replace it with TC_UARTCLK
in dts.

Change-Id: Id463a9ddc1588278e552ffca3dfb738676229ce7
Signed-off-by: Jagdish Gediya <jagdish.gediya@arm.com>
Signed-off-by: Icen.Zeyada <Icen.Zeyada2@arm.com>
2025-01-07 09:28:16 +00:00
Raymond Mao
4d8b4ca0f5 feat(handoff): common API for TPM event log handoff
Create a common BL2 API to add a TE for TPM event log.

Change-Id: I459e70f40069aa9ea0625977e0bad8ec316439e6
Signed-off-by: Raymond Mao <raymond.mao@linaro.org>
2025-01-06 07:20:37 -08:00
Raymond Mao
7ad6775bde fix(qemu): fix register convention in BL31 for qemu
The commit with Change-Id:Ie417e054a7a4c192024a2679419e99efeded1705
updated the register convention r1/x1 values but missing necessary
changes in BL31.
As a result, a system panic observed during setup for BL32 when
TRANSFER_LIST is enabled due to unexpected arguments.
This patch is to fix this issue for qemu.

Change-Id: I42e581c5026f0f66d3b114204b4dff167a9bc6ae
Signed-off-by: Raymond Mao <raymond.mao@linaro.org>
2025-01-06 07:10:53 -08:00
Levi Yun
357f28db6b feat(synquacer): add support Hob creation
When StandaloneMm used with SPM_MM, TF-A should create
PHIT Hob to boot it.
This patch supports Hob creation for StandaloneMm in synquacer platform.

Signed-off-by: Levi Yun <yeoreum.yun@arm.com>
Change-Id: Ifa3ae1f0aa37f389aabb14f48be307502ae6fc2c
2025-01-03 14:45:00 +00:00
Levi Yun
06cec933de fix(fvp): exclude extend memory map TZC regions
The commit
  1922875233 ("fix(spm-mm): carve out NS buffer TZC400 region")
removes overlaps of ns shared buffer in secure memory region.
Unfortunately, this separation increases 1 region and over maximum
number of TZC programmable regions when they include
extended memory map regions (DRAM3 to DRAM6).

This causes boot failure of StandaloneMm with spmc_el3 && sp_el0 with

    ASSERT: drivers/arm/tzc/tzc400.c:256.

To fix this, like SPM_MM, exclude setting extended memory map regions when
it uses SPMC_AT_EL3 && SPC_AT_EL3_SEL0_SP.

Signed-off-by: Levi Yun <yeoreum.yun@arm.com>
Change-Id: I2d40bea066ca030050dfe951218cd17171010676
2025-01-03 14:45:00 +00:00
Levi Yun
8416e7917f feat(fvp): add StandaloneMm manifest in fvp
Support StandaloneMm running with FF-A as S-EL0 SP
when TF-A is built with EL3 SPMC partition manager.

For this
    1. add manifest file describing StandaloneMm partition.
    2. add number of page mapping area.
    3. StandaloneMm should use SRAM with 512K.

while enabling, StandaloneMm, BL1 image requires more size:
   aarch64-none-elf/bin/ld: BL31 image has exceeded its limit.
   aarch64-none-elf/bin/ld: region `RAM' overflowed by 16384 bytes

So, when using SRAM size with 512K configuration,
increase size limit of BL1 binary.

Signed-off-by: Levi Yun <yeoreum.yun@arm.com>
Change-Id: Idaa1db510340ebb812cfd13588610b2eea941918
2025-01-03 14:45:00 +00:00
Chris Kay
bdcef87cf5 feat(aarch64): add DBGPRCR_EL1 register accessors
This is a small change adding accessor functions for the Debug Power
Control register (DBGPRCR_EL1) to the common architectural helpers.

Change-Id: I72261fbf0395d900347b46af320093ed946aa73d
Signed-off-by: Chris Kay <chris.kay@arm.com>
2025-01-02 11:23:55 +01:00
Ryan Everett
bd9b01c683 refactor(arm): rename ARM_ROTPK_HEADER_LEN
This variable had a misleading name, as it is the length
of the header only when the ROTPK is a hash.
Also rename arm_rotpk_header to match the new pattern.

Change-Id: I36c29998eebf50c356a6ca959ec9223c8837b540
Signed-off-by: Ryan Everett <ryan.everett@arm.com>
2024-12-30 12:32:34 +01:00