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feat(s32g274a): enable MMU for BL2 stage

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Enable the MMU and add two entries to map the BL2 code and data regions.
Additional mappings will be added dynamically, enhancing flexibility and
modularity during the porting process.

Change-Id: I107abf944dfdce9dcff47b08272a5001484de8a9
Signed-off-by: Ghennadi Procopciuc <ghennadi.procopciuc@nxp.com>
This commit is contained in:
Ghennadi Procopciuc 2024-11-26 16:55:30 +02:00
parent 507ce7ed6f
commit eb4d4185fa
4 changed files with 61 additions and 0 deletions
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12
plat/nxp/s32/s32g274ardb2/include/s32cc-bl-common.h Normal file
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@ -0,0 +1,12 @@
/*
* Copyright 2024 NXP
*
* SPDX-License-Identifier: BSD-3-Clause
*/
#ifndef S32CC_BL_COMMON_H
#define S32CC_BL_COMMON_H
int s32cc_bl_mmu_setup(void);
#endif /* S32CC_BL_COMMON_H */

8
plat/nxp/s32/s32g274ardb2/plat_bl2_el3_setup.c
View file

@ -5,6 +5,7 @@
*/
#include <errno.h>
#include <common/debug.h>
#include <common/desc_image_load.h>
#include <lib/mmio.h>
@ -12,7 +13,9 @@
#include <plat/common/platform.h>
#include <plat_console.h>
#include <s32cc-clk-drv.h>
#include <plat_io_storage.h>
#include <s32cc-bl-common.h>
#include <s32cc-ncore.h>
#define SIUL20_BASE UL(0x4009C000)
@ -80,6 +83,11 @@ void bl2_el3_early_platform_setup(u_register_t arg0, u_register_t arg1,
ncore_init();
ncore_caiu_online(A53_CLUSTER0_CAIU);
ret = s32cc_bl_mmu_setup();
if (ret != 0) {
panic();
}
ret = s32cc_init_early_clks();
if (ret != 0) {
panic();

1
plat/nxp/s32/s32g274ardb2/platform.mk
View file

@ -50,6 +50,7 @@ include ${PLAT_DRIVERS_PATH}/drivers.mk
BL_COMMON_SOURCES += \
${PLAT_S32G274ARDB2}/plat_console.c \
${PLAT_S32G274ARDB2}/plat_helpers.S \
${PLAT_S32G274ARDB2}/s32cc_bl_common.c \
${XLAT_TABLES_LIB_SRCS} \
BL2_SOURCES += \

40
plat/nxp/s32/s32g274ardb2/s32cc_bl_common.c Normal file
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@ -0,0 +1,40 @@
/*
* Copyright 2024 NXP
*
* SPDX-License-Identifier: BSD-3-Clause
*/
#include <errno.h>
#include <common/bl_common.h>
#include <lib/xlat_tables/xlat_tables_v2.h>
#include <s32cc-bl-common.h>
int s32cc_bl_mmu_setup(void)
{
const unsigned long code_start = BL_CODE_BASE;
const unsigned long rw_start = BL_CODE_END;
unsigned long code_size;
unsigned long rw_size;
if (code_start > BL_CODE_END) {
return -EINVAL;
}
if (rw_start > BL_END) {
return -EINVAL;
}
code_size = BL_CODE_END - code_start;
rw_size = BL_END - rw_start;
mmap_add_region(code_start, code_start, code_size,
MT_RO | MT_MEMORY | MT_SECURE);
mmap_add_region(rw_start, rw_start, rw_size,
MT_RW | MT_MEMORY | MT_SECURE);
init_xlat_tables();
enable_mmu_el3(0);
return 0;
}