When mcusys is off, rdist_ctx will save the rdist data of the last core.
In the case of the last core plug off, the data of other cores will be
inconsistent with the data in rdist_ctx.
Therefore, each core needs to use a dedicated context.
Signed-off-by: Runyang Chen <runyang.chen@mediatek.com>
Change-Id: Ic9501f4da219cf906c0e348982be3f550c3ba30b
We no longer maintain the device equipped with ES chip. Remove SPM
support for ES ship.
Signed-off-by: Wenzhen Yu <wenzhen.yu@mediatek.com>
Change-Id: I5b2d035ec384a9861239f33dbe6df54c17f1285c
Disable the debug flag from the driver to reduce debugging messages.
Change-Id: I9444f64acbf684debab56d8226b14c6c01200ea4
Signed-off-by: Gavin Liu <gavin.liu@mediatek.com>
These changes align the project with the latest directory structure
and ensure consistency in header references.
Signed-off-by: Wenzhen Yu <wenzhen.yu@mediatek.com>
Change-Id: I7f3c42cbd9a803064bbfed67cd8f309638da8441
Add MediaTek SMMU power driver. This driver tracks the reference
counter for power domain access on SMMU hardware, including
Multimedia SMMU and APU SMMU. The PM get/put commands may come from
linux(EL1) and hypervisor(EL2).
Change-Id: I60f83c4e3d87059b0549b2ed8c68367be3bfbbc5
Signed-off-by: Yong Wu <yong.wu@mediatek.com>
1. Turn on APU SMPU protection on MT8196.
2. Remove unused header file.
Change-Id: I58637b8dda4bf68253bc2329580963a8bd9cca8b
Signed-off-by: Karl Li <karl.li@mediatek.com>
Implement stub functions for the MMinfra (Multimedia Infrastructure)
driver to ensure that the build can pass when a prebuilt library is
not available.
Change-Id: Iadac654950c868d3743b13a1d6f7ab5d1015fb86
Signed-off-by: Yong Wu <yong.wu@mediatek.com>
- VCORE DVFS is the feature to change VCORE/DDR Freq for power saving
- When there are no requests for using Vcore/DRAM, Vcore DVFS will
- lower the voltage and frequency of Vcore/DRAM to achieve power saving.
Signed-off-by: Kunlong Wang <kunlong.wang@mediatek.com>
Change-Id: I1126311e8b3943cc54fb13e15973b9e1b74c129e
This patch provides common APIs for communication with other subsystems
as well as common APIs for collecting the clock and power status of
each subsystem.
Signed-off-by: Wenzhen Yu <wenzhen.yu@mediatek.com>
Change-Id: I1b907256f53578a58d74d66beec7140edf41f687
This patch mainly initializes the SPM and provides common APIs for SPM
to enable the use of its various features.
Signed-off-by: Wenzhen Yu <wenzhen.yu@mediatek.com>
Change-Id: I9facb6bf9962bb2d5fcacd945846bfaeb4c87a55
This patch mainly collects and organizes SPM state information to
facilitate debugging when issues arise.
Signed-off-by: Wenzhen Yu <wenzhen.yu@mediatek.com>
Change-Id: Ie51cffeb1d683d65d88701fc63c426b20b22492f
When the system is in idle or suspend state, SPM will turn off some
unused system resources. This patch enables this feature to achieve
power saving.
Signed-off-by: Wenzhen Yu <wenzhen.yu@mediatek.com>
Change-Id: Ia9764b91073c4765d41fe7fcd8e4a21372c290f1
During suspend, it is necessary to set some power rails of the PMIC
to enter low power mode to achieve power saving.
Signed-off-by: Wenzhen Yu <wenzhen.yu@mediatek.com>
Change-Id: Iaeadd15270e0209f027fab80f478ad621bd59ea7
Add MCDI driver to manage CPU idle states and optimize power consumption.
Signed-off-by: Kai Liang <kai.liang@mediatek.com>
Change-Id: I3a2e163730dd997dd72f2ebc1375dea38d728cb7
And mcusys drivers to enhance CPU power state control.
Signed-off-by: Kai Liang <kai.liang@mediatek.com>
Change-Id: I7d84407cebc16a5ab23359781574e9d02e90c58b
Add Centralized Power Control (CPC) module to manage CPU power states.
Signed-off-by: Kai Liang <kai.liang@mediatek.com>
Change-Id: I212155143018141c89427032f6a7d21243e750b7
Add topology module to support CPU power state control.
Signed-off-by: Kai Liang <kai.liang@mediatek.com>
Change-Id: I0cc1e5a426762b1b29bff1e940e077643da02e5e
Add SPMI and PMIF driver for PMIC communication
Change-Id: Iad1d90381d6dad6b3e92fd9d6a3ce02fa11d15f1
Signed-off-by: Hope Wang <hope.wang@mediatek.corp-partner.google.com>
Implement stub functions for the EMI driver to ensure that the build
can pass when a prebuilt library is not available.
Change-Id: I296945a3df6766a3a133cd385a1e5038ca979403
Signed-off-by: Gavin Liu <gavin.liu@mediatek.corp-partner.google.com>
Add APU SMMU hardware semaphore operations to make APU SMMU
able to sync the power status.
Change-Id: I1926cab990fba54a2ea694ac6d9e87135dfb19cf
Signed-off-by: Karl Li <karl.li@mediatek.com>
1. Add smpu protection for APU secure memory.
2. Move emi mpu protection for mt8188 to platform folder
Since the smpu driver has not upstream, we currently leave the interface
and do nothing until smpu driver is ready.
Change-Id: Id70162e90a7deb64befe90f09a841a0903535482
Signed-off-by: Karl Li <karl.li@mediatek.com>
APU RCX is a sub-domain in apusys, connecting several APU components.
The APU RCX DevAPC control lives in APU and can only be set after
APU is powered on.
The APUSYS kernel driver will trigger RCX DevAPC init by smc call.
Change-Id: I3a9b014ea1be7ee80fd6861ad088f1dec5410872
Signed-off-by: Karl Li <karl.li@mediatek.com>
Add APU kernel control operations to provide the bootup init functions.
1. Add software workaround for certain operations on mt8196.
2. Add APU logger operations.
3. Add function to clear mbox spare register, which is used in APU
booting process.
4. Add function to setup CE binary to make sure the CE binary version
is align with the APU firmware.
Change-Id: Ic99adba1409c020c72179ea135e0d4291fc3f384
Signed-off-by: Karl Li <karl.li@mediatek.com>
1. Add APU power on/off functions
2. Refine the APU power on/off interface for mt8188
3. Add dcm setup function to support mt8196
Change-Id: Ie1caca40f89de71caac037fabe7e7455ff2a1872
Signed-off-by: Karl Li <karl.li@mediatek.com>
APUMMU is the MMU in APU, which is responsible for inner address
mapping. The APU kernel driver will setup the APUMMU by SMC call.
Change-Id: Iad7532883e42c288aeb0d23ab419f4dc6d8630f2
Signed-off-by: Karl Li <karl.li@mediatek.com>
Enable mt8196 apusys mailbox mpu protection and
move the mt8188 setting to platform folder
Change-Id: I76b68318bb88e56b12cdacd9e2b998699ca6b48e
Signed-off-by: Karl Li <karl.li@mediatek.com>
Remap the request from domain 5, 7, 14 to domain 6 and setup security
sideband
Change-Id: I06d377f4bcc542bf22e0a04ffb45cf52b7528a75
Signed-off-by: Karl Li <karl.li@mediatek.com>
Apusys AO DevAPC is a set of control registers inside APU, controlling
the access permission of APU AO (Always On) domain.
This patch add the mt8196 APU AO DevAPC setting to setup the protection.
Change-Id: I975a92795031cd1813442302890e29b671ef16f1
Signed-off-by: Karl Li <karl.li@mediatek.com>
Add the APU (AI processing unit) power init flow to prepare the hardware
setting before using APU power functions.
Change-Id: I595b1d5100a4f083263de6527f920e5168700b7a
Signed-off-by: Karl Li <karl.li@mediatek.com>
It is excepted that kernel vcp can request the vcp hw do
some security setting via SMC call services.
Signed-off-by: Xiangzhi Tang <xiangzhi.tang@mediatek.corp-partner.google.com>
Change-Id: Ib5c01c1d72b3483262dcd821878e6e53ba9c681c
- MT8196 has 271 GPIO pins. Therefore, update id to a proper datatype.
- Add GPIO support for MT8196.
Signed-off-by: Cathy Xu <ot_cathy.xu@mediatek.com>
Change-Id: I283939684b54f79d1bba02f38e047e756a56f0c9
Introduce a common RNG driver along with the specific driver for MT8186
platform.
Change-Id: I9f4437b6a4b3e8564a035ff5abb681bcfe85bd1e
Signed-off-by: Suyuan Su <suyuan.su@mediatek.com>
Signed-off-by: Gavin Liu <gavin.liu@mediatek.com>
- Extend the SVP region number from 1 to 10
- Mapping one region each time
Change-Id: I2dd517127018c71174f3d52a2118463370caf569
Signed-off-by: Gavin Liu <gavin.liu@mediatek.com>
When SPD is set to none, it means we don't run any secure OS on the
system. We should make this memory region available to kernel.
Change-Id: Ia83ff4a7d25de38a5d845b7ee1367bafed43bbdd
Signed-off-by: Yidi Lin <yidilin@chromium.org>
In order to register DEV_IRQ as secure interrupt in OP-TEE, the the GICD
EnableGrp1S should be enabled for DEV_IRQ. Add mtk_interrupt_props in
MTK GIC driver to configure the interrupt properly.
Signed-off-by: Gavin Liu <gavin.liu@mediatek.com>
Change-Id: Id909a42b535088c6d0dcaf803d3f2faf312ae846
- Update SVP EMI-MPU region ID from 4 to 5 for resolving
the issue of duplicate region ID used by the DSP.
- For SVP EMI-MPU region, modify domain 1 and domain 6 APC from
FORBIDDEN to SEC_RW.
- Correct the calculation for the end address of SVP DRAM region.
- Add region 0 and region 1 for BL31 and BL32 memory protection.
- Add clear region protection API for SVP region.
Change-Id: Iaea348ad9be629e8a81cf579b148c6df66015b42
Signed-off-by: Haohao Sun <haohao.sun@mediatek.corp-partner.google.com>
- Reduce core0 memory usage from 41MB to 8MB.
- Increase core1 memory to 160MB to fulfill user-specific features.
Change-Id: I35547e2ac928945c244883d2333f921ce578bbd1
Signed-off-by: Jason Chen <Jason-ch.Chen@mediatek.com>
It is expected that kernel can control the flow of the TF-A operations.
This patch remove the apusys kernel handler usage constraints, making
the operations all controlled on kernel side.
Signed-off-by: Karl Li <karl.li@mediatek.com>
Change-Id: Idc205a2cf23e1ff5f1920658a3b089c823f0288a
1. Allow domain D8 (SCP c0) access to the region 0x50000000~0x528FFFFF.
2. Allow domain D8 (SCP c1) access to the region 0x70000000~0x729FFFFF.
3. Allow domain D4 (DSP) access to the region 0x60000000~0x610FFFFF.
Change-Id: Iea92eebaea4d7dd2968cf51f41d07c2479168e7e
Signed-off-by: Jason Chen <Jason-ch.Chen@mediatek.com>
