Commit graph

11981 commits

Author SHA1 Message Date
Sandrine Bailleux
af4fee04b9 Merge changes from topic "mb/tos-fw-config-load-refactor" into integration
* changes:
  feat(spmd): map SPMC manifest region as EL3_PAS
  feat(fvp): update device tree with load addresses of TOS_FW config
  refactor(fvp): rename the DTB info structure member
  feat(fconf): rename 'ns-load-address' to 'secondary-load-address'
2023-02-10 10:05:12 +01:00
Sandrine Bailleux
493de4df53 Merge "fix(cert-create): change WARN to VERBOSE" into integration 2023-02-10 09:58:37 +01:00
laurenw-arm
76a85cfa0a fix(cert-create): change WARN to VERBOSE
SAVE_KEYS is set to '0' by default, causing cert_create to
show the 'Key filename not specified' message on each run
even though this is perfectly normal. Show the message only
in the VERBOSE log level.

Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Change-Id: I472cdec2670055ab0edd99d172f79d01ad575972
2023-02-09 11:55:33 -06:00
Manish Pandey
35f81474fb Merge "chore: add encrypt_fw to gitignore" into integration 2023-02-08 18:37:44 +01:00
Manish V Badarkhe
c1dd9e63bf Merge changes I7bd311d7,Iea7dcfe3,I9d890934 into integration
* changes:
  refactor(allwinner): use fdt_node_is_enabled() in AXP driver
  fix(allwinner): check RSB availability in DT on H6
  refactor(fdt): introduce common fdt_node_is_enabled()
2023-02-08 15:20:10 +01:00
Sandrine Bailleux
c2ce57f519 Merge "feat(psa): interface with RSS for NV counters" into integration 2023-02-08 11:48:14 +01:00
laurenw-arm
8374508b00 feat(psa): interface with RSS for NV counters
Adding AP/RSS interface for retrieving and incrementing non-volatile
counters.

The read interface implements the psa_call:
psa_call(RSS_PLATFORM_SERVICE_HANDLE,
         RSS_PLATFORM_API_ID_NV_READ,
         in_vec, 1, out_vec, 1);

where the in_vec indicates which of the 3 counters we want, and the
out_vec stores the counter value we get back from RSS.

The increment interface implements the psa_call:
psa_call(RSS_PLATFORM_SERVICE_HANDLE,
         RSS_PLATFORM_API_ID_NV_INCREMENT,
         in_vec, 1, (psa_outvec *)NULL, 0);

where, again, in_vec indicates the counter to increment, and we don't
get any output parameter from RSS.

Through this service, we will be able to get/increment any of the 3 NV
counters used on a CCA platform:
- NV counter for CCA firmware (BL2, BL31, RMM).
- NV counter for secure firmware.
- NV counter for non-secure firmware.

Signed-off-by: Lauren Wehrmeister <lauren.wehrmeister@arm.com>
Signed-off-by: Raef Coles <raef.coles@arm.com>
Change-Id: I4c1c7f4837ebff30de16bb0ce7ecd416b70b1f62
2023-02-08 10:33:48 +02:00
Manish V Badarkhe
8c829a9240 feat(spmd): map SPMC manifest region as EL3_PAS
Mapped SPMC manifest region as EL3_PAS so that it will get
mapped as Root region in RME enabled system otherwise Secure
region.

Change-Id: I1af5344d7516e948d5b3664bcdb94cdfc367cd78
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>
2023-02-07 11:26:38 +00:00
Manish V Badarkhe
177976286e feat(fvp): update device tree with load addresses of TOS_FW config
Provided both the root and secure addresses for TOS_FW config
in case of RME enabled systems where root address is in Root
SRAM and secure address is in Trusted DRAM.

Non-RME systems are unaffected by this change.

Change-Id: Ifb927c90fa5a68fe5362980858b4ddc5403ac95b
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>
2023-02-07 11:26:38 +00:00
Manish V Badarkhe
f348aec1a8 refactor(fvp): rename the DTB info structure member
In line with the previous patch, the name of the member of the
hw_config DTB info structure has been renamed.

Change-Id: I6689e416fecd66faa515e820f1c4b23bcb65bfb1
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>
2023-02-07 11:26:38 +00:00
Manish V Badarkhe
05e5503021 feat(fconf): rename 'ns-load-address' to 'secondary-load-address'
The 'ns-load-address' property has been renamed to 'secondary-load-
address' in order to make it more generic. It can be used to copy
the configuration to any location, be it root, secure, or non-secure.

Change-Id: I122508e155ccd99082296be3f6b8db2f908be221
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>
2023-02-07 11:26:38 +00:00
Manish V Badarkhe
6264643a07 Merge "refactor(tc): update total compute gpu device node" into integration 2023-02-03 17:04:42 +01:00
Andre Przywara
06eb3e366b refactor(allwinner): use fdt_node_is_enabled() in AXP driver
The Allwinner AXP driver was using a private implementation of that
function, remove that in favour of our now common implementation.

Change-Id: I7bd311d73060d4bc83f93cff6bedf6c78dddd3ca
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2023-02-03 13:31:28 +00:00
Andre Przywara
658b3154d5 fix(allwinner): check RSB availability in DT on H6
At the moment we access the RSB bus on all Allwinner H6 boards
unconditionally, even though some boards do not have any PMIC at all,
while others have some I2C devices connected to the same pins.
The latter case is just fragile, but the first case leads to a hang on
at least one board, as reported by Jernej.

Scan the devicetree, to check for the availability of the RSB bus node.
Proceed only if the RSB DT node is actually enabled.

Change-Id: Iea7dcfe3e085e173334d098ec4ddcb6c4b085771
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reported-by: Jernej Skrabec <jernej.skrabec@gmail.com>
2023-02-03 13:31:28 +00:00
Andre Przywara
49b268ce30 refactor(fdt): introduce common fdt_node_is_enabled()
There are several users in the tree which want to check whether a given
FDT node is enabled or not: the "status" property holds that
information. So far all those users provide private implementations,
some of them having issues.

Export a generic implementation of that function in fdt_wrappers.h, as
a "static inline" function to not increase code size.
Also replace the existing implementation in Arm's fconf code, which had
a tiny bug in needlessly using the property length:
"status = [6f 6b 61 79 20];" would pass the check, where it should not.
The proper solution is also simpler: status must be a string, and
strings must be NUL-terminated in a DT. strcmp() would terminate on the
first NUL in *either* of the two strings it compares, so it would never
walk beyond the property boundary in the DTB.

Change-Id: I9d89093432f127c09add6cf5c93a725bc534e5de
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2023-02-03 13:31:22 +00:00
Rupinderjit Singh
cb3e9650f1 refactor(tc): update total compute gpu device node
updated gpu clocks and added gpu simple power model node

Signed-off-by: Rupinderjit Singh <rupinderjit.singh@arm.com>
Change-Id: Ia475f136bec8a569f764255eb87c212a692626dc
2023-02-03 12:53:38 +00:00
Joanna Farley
d9248e8514 Merge "fix(versal-net): populate gic v3 rdist data statically" into integration 2023-02-03 10:27:25 +01:00
Joanna Farley
8b47f87a5f Merge "feat(optee): add loading OP-TEE image via an SMC" into integration 2023-02-03 00:42:17 +01:00
Joanna Farley
1548e0e7b9 Merge changes from topic "xlnx_feat_chores" into integration
* changes:
  chore(xilinx): update print information
  feat(versal-net): add jtag dcc support
2023-02-02 16:53:37 +01:00
Yann Gautier
73f0e8ab99 chore: add encrypt_fw to gitignore
Add tools/encrypt_fw/encrypt_fw & tools/encrypt_fw/encrypt_fw.exe to
.gitignore file, to avoid git listing those binary files.

Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
Change-Id: I2f4ddbe1c11848513fe20f7c8b448a041988cc4f
2023-02-02 13:30:53 +01:00
Akshay Belsare
d6760c4da8 chore(xilinx): update print information
Remove company name from the console messages while printing only
relevant information for the platform.

Change-Id: Id8171326e0267eb6f3a26de4eb66143970de2dbd
Signed-off-by: Akshay Belsare <akshay.belsare@amd.com>
2023-02-02 09:46:05 +05:30
Soby Mathew
e3df3ffa11 Merge changes I1b092bc1,Ifc2461b4,I5176caa5 into integration
* changes:
  docs(rme): update RMM-EL3 Boot Manifest structure description
  feat(rme): read DRAM information from FVP DTB
  feat(rme): set DRAM information in Boot Manifest platform data
2023-02-01 17:03:22 +01:00
Jay Buddhabhatti
355dc3d4de fix(versal-net): populate gic v3 rdist data statically
Currently gicv3_rdistif_probe() is called per CPU. In case of maxcpus=1,
only 1 core is initialized and gicr_base_addrs initialized for CPU 0
only. Because of this assertion is raised during Linux system suspend.

During Linux suspend, platform callback saves GIC v3 state which
internally invokes arm_gicv3_distif_pre_save(). This function tries to use
gicr_base for all CPUs. Since GICR base address for secondary CPUs are not
initialized, it raises assertion.

To fix the issue, populate GIC v3 rdist data statically (similar to Versal)
instead of dynamically initializing GIC v3 rdist per CPU.

Signed-off-by: Jay Buddhabhatti <jay.buddhabhatti@amd.com>
Change-Id: I98c97c03e451d05f4ebac358e197617ab9d9b71f
2023-02-01 05:05:30 -08:00
Akshay Belsare
30e8bc365c feat(versal-net): add jtag dcc support
Add support for JTAG Debug Communication Channel(DCC), using the dcc
console driver, for Versal NET platform.
UART0/UART1 is not configured when the JTAG DCC is used as console for
the platform.
Though DCC is not using any UART, VERSAL_NET_UART_BASE needs
to be defined in the platform code. If its not defined, build errors
are observed.
Now VERSAL_NET_UART_BASE by default points to UART0 base.
Check for valid console(pl011, pl011_0, pl011_1, dcc) is
being done in the platform makefile, the error condition in
setting the value of VERSAL_NET_UART_BASE is redundant, thus the error
message is removed from the code.

Change-Id: I1085433055abea13526230cff4d4183ff7a01477
Signed-off-by: Akshay Belsare <akshay.belsare@amd.com>
2023-02-01 10:34:01 +05:30
Jeffrey Kardatzke
05c69cf75e feat(optee): add loading OP-TEE image via an SMC
This adds the ability to load the OP-TEE image via an SMC called from
non-secure userspace rather than loading it during boot. This should
only be utilized on platforms that can ensure security is maintained up
until the point the SMC is invoked as it breaks the normal barrier
between the secure and non-secure world.

Signed-off-by: Jeffrey Kardatzke <jkardatzke@google.com>
Change-Id: I21cfa9699617c493fa4190f01d1cbb714e7449cc
2023-01-31 10:38:16 -08:00
AlexeiFedorov
1db295cf4b docs(rme): update RMM-EL3 Boot Manifest structure description
This patch updates description of RMM-EL3 Boot Manifest
structure and its corresponding diagram and tables with DRAM
layout data.

Signed-off-by: AlexeiFedorov <Alexei.Fedorov@arm.com>
Change-Id: I1b092bc1ad5f1c7909d25c1a0dc89c2b210ada27
2023-01-31 16:56:04 +01:00
AlexeiFedorov
8268590498 feat(rme): read DRAM information from FVP DTB
This patch builds on the previous patch by implementing
support for reading NS DRAM layout of FVP model from
HW_CONFIG Device tree.

Macro _RMMD_MANIFEST_VERSION is renamed to
SET_RMMD_MANIFEST_VERSION to suppress MISRA-C
"rule MC3R1.D4.5: (advisory) Identifiers in
the same name space with overlapping visibility
should be typographically unambiguous" warning

Signed-off-by: AlexeiFedorov <Alexei.Fedorov@arm.com>
Change-Id: Ifc2461b4441a1efdd4b7c656ab4d15e62479f77b
2023-01-31 14:19:48 +02:00
Manish V Badarkhe
3c24d222a0 Merge "feat(morello): add support for HW_CONFIG" into integration 2023-01-30 16:55:55 +01:00
Madhukar Pappireddy
38d7fc7e15 Merge "perf(imx): speed-up console/uart TX using FIFO" into integration 2023-01-30 16:20:05 +01:00
Sandrine Bailleux
ed62dd21fc Merge "docs(measured-boot): fix few typos" into integration 2023-01-30 11:05:43 +01:00
Manish V Badarkhe
cca91b7ae5 docs(measured-boot): fix few typos
Fixed few typos in the measured boot POC document.

Change-Id: I122c069bbde51febed12c54e2c4a4985b009ef5f
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>
2023-01-30 09:06:35 +00:00
Loic Poulain
4be8c0993c perf(imx): speed-up console/uart TX using FIFO
The current putc version test for TXEMPTY bit set (#6) instead
of waiting for TXFULL bit clear (#4), that slows the global
boot time as we are not taking benefit of the 32-byte FIFO.

We then need to implement the flush function to be sure the
transmit is complete (FIFO and shift register empty).

Signed-off-by: Loic Poulain <loic.poulain@linaro.org>
Change-Id: I54873a5203e2afdc230e44ce73284e7a80985b4f
2023-01-27 17:34:15 +01:00
Patrik Berglund
be79071ef7 feat(morello): add support for HW_CONFIG
This patch add support to load HW_CONFIG in BL2 and pass it to
bootloader stages BL31 and BL33.

Signed-off-by: Patrik Berglund <patrik.berglund@arm.com>
Change-Id: I646fabed83dbca5322a59a399de5194cfef474ad
2023-01-27 15:54:56 +00:00
Lauren Wehrmeister
ae006cd3bd Merge "fix(cpus): workaround for Cortex-A78C erratum 2772121" into integration 2023-01-27 16:52:19 +01:00
Manish V Badarkhe
9dea6fa680 Merge "feat(plat/tc): enable MPAM functionality of L3 DSU cache" into integration 2023-01-27 12:50:27 +01:00
Davidson K
b45ec8cea4 feat(plat/tc): enable MPAM functionality of L3 DSU cache
The L3 cache in the DSU supports the Memory System Resources
Partitioning and Monitoring (MPAM). The MPAM specific registers in the
DSU are accessed through utility bus of DSU that are memory mapped from
0x1_0000_1000.

Signed-off-by: Davidson K <davidson.kumaresan@arm.com>
Change-Id: I2798181d599228e96dd4c0043a2ccd94668c7e20
2023-01-27 08:01:02 +01:00
Lauren Wehrmeister
1678bbb572 Merge "fix(cpus): workaround for Cortex-A510 erratum 2684597" into integration 2023-01-26 21:24:49 +01:00
Lauren Wehrmeister
fc3bdab985 Merge "fix(psci): tighten psci_power_down_wfi behaviour" into integration 2023-01-26 21:18:22 +01:00
Soby Mathew
d127d74764 Merge "docs(rme): improve OOB instruction for RME" into integration 2023-01-26 15:43:02 +01:00
Soby Mathew
d9c976b088 docs(rme): improve OOB instruction for RME
This patch reworks the existing OOB instructions for RME enabled
TF-A.

Signed-off-by: Soby Mathew <soby.mathew@arm.com>
Change-Id: Icaeaf48c7061feaad4b1bb92388954694705e45c
2023-01-26 15:59:06 +02:00
Harrison Mutai
aea4ccf8d9 fix(cpus): workaround for Cortex-A510 erratum 2684597
Cortex-A510 erratum 2684597 is a Cat B erratum that applies to revisions
r0p0, r0p1, r0p2, r0p3, r1p0, r1p1 and r1p2. It is fixed in r1p3. The
workaround is to execute a TSB CSYNC and DSB before executing WFI for
power down.

SDEN can be found here:
https://developer.arm.com/documentation/SDEN1873361/latest
https://developer.arm.com/documentation/SDEN1873351/latest

Change-Id: Ic0b24b600bc013eb59c797401fbdc9bda8058d6d
Signed-off-by: Harrison Mutai <harrison.mutai@arm.com>
2023-01-25 09:40:33 +00:00
Madhukar Pappireddy
aa61ff6c9f Merge changes from topic "fix_misra_partition_mmc" into integration
* changes:
  fix(mmc): align part config type
  fix(mmc): do not modify r_data in mmc_send_cmd()
  fix(mmc): explicitly check operators precedence
  fix(partition): add U suffix for unsigned numbers
  fix(partition): add missing curly braces
2023-01-24 17:29:28 +01:00
Sandrine Bailleux
b6d4d73b88 Merge "docs: change security advisories notification channel" into integration 2023-01-24 11:06:22 +01:00
Harrison Mutai
695a48b5b4 fix(psci): tighten psci_power_down_wfi behaviour
A processing element should never return from a wfi, however, due to a
hardware bug, certain CPUs may wake up because of an external event.
This patch tightens the behaviour of the common power down sequence, it
ensures the routine never returns by entering a wfi loop at its end. It
aligns with the behaviour of the platform implementations.

Change-Id: I36d8b0c64eccb71035bf164b4cd658d66ed7beb4
Signed-off-by: Harrison Mutai <harrison.mutai@arm.com>
2023-01-23 17:25:40 +00:00
Manish V Badarkhe
5a53c6c667 Merge "feat(fiptool): handle FIP in a disk partition" into integration 2023-01-23 13:57:39 +01:00
Sandrine Bailleux
872d86568a Merge "feat(rss): add TC platform UUIDs for RSS images" into integration 2023-01-23 12:47:15 +01:00
Antonio Borneo
06e69f7c94 feat(fiptool): handle FIP in a disk partition
When FIP is programmed in a disk partition, fiptool cannot be used
directly; this forces the user to temporarily copy the partition
to a file, apply fiptool and copy back the file. This is caused by
fstat() that returns zero file size on a block special file, thus
making fiptool commands info, update, unpack and remove to exit.

For either Linux host or Linux target, recover the partition size
with ioctl() and use it as FIP file size. E.g.:
	fiptool info /dev/disk/by-partlabel/fip-a
	fiptool info /dev/mtdblock4

While there, rework two identical error log messages to provide
more details about the failure and update the date in copyright.

Signed-off-by: Antonio Borneo <antonio.borneo@foss.st.com>
Change-Id: I7cab60e577422d94c24ba7e39458f58bcebc2336
2023-01-23 11:45:53 +01:00
Bipin Ravi
982f8e1997 Merge changes from topic "srm/errata" into integration
* changes:
  fix(cpus): workaround for Neoverse V1 errata 2779461
  fix(cpus): workaround for Cortex-A78 erratum 2779479
2023-01-20 20:37:07 +01:00
Madhukar Pappireddy
acf455b41f Merge changes from topic "fix_sparse_warnings" into integration
* changes:
  fix(libc): remove __putchar alias
  fix(console): correct scopes for console symbols
  fix(auth): use NULL instead of 0 for pointer check
  fix(io): compare function pointers with NULL
  fix(fdt-wrappers): use correct prototypes
2023-01-20 18:20:59 +01:00
Sona Mathew
2757da0614 fix(cpus): workaround for Neoverse V1 errata 2779461
Neoverse V1 erratum 2779461 is a Cat B erratum that applies to
all revisions <=r1p2 and is still open.

The workaround sets CPUACTLR3_EL1[47] bit to 1. Setting this
bit might have a small impact on power and negligible impact
on performance.

SDEN documentation:https://developer.arm.com/documentation/SDEN1401781/latest

Change-Id: I367cda1779684638063d7292fda20ca6734e6f10
Signed-off-by: Sona Mathew <SonaRebecca.Mathew@arm.com>
2023-01-19 12:14:39 -06:00