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Merge "fix(cpus): workaround for Cortex-A78C erratum 2772121" into integration
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commit
ae006cd3bd
3 changed files with 47 additions and 3 deletions
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@ -361,6 +361,10 @@ For Cortex-A78C, the following errata build flags are defined :
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Cortex-A78C CPU. This needs to be enabled for revisions r0p1 and r0p2. This
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erratum is still open.
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- ``ERRATA_A78C_2772121`` : This applies errata 2772121 workaround to
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Cortex-A78C CPU. This needs to be enabled for revisions r0p0, r0p1 and r0p2.
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This erratum is still open.
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For Cortex-X1 CPU, the following errata build flags are defined:
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- ``ERRATA_X1_1821534`` : This applies errata 1821534 workaround to Cortex-X1
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@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2021-2022, Arm Limited. All rights reserved.
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* Copyright (c) 2021-2023, Arm Limited. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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@ -117,13 +117,13 @@ func check_errata_2132064
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b cpu_rev_var_range
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endfunc check_errata_2132064
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/* --------------------------------------------------------------------
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/* ----------------------------------------------------------
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* Errata Workaround for A78C Erratum 2242638.
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* This applies to revisions r0p1 and r0p2 of the Cortex A78C
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* processor and is still open.
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* x0: variant[4:7] and revision[0:3] of current cpu.
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* Shall clobber: x0-x17
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* --------------------------------------------------------------------
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* ----------------------------------------------------------
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*/
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func errata_a78c_2242638_wa
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/* Compare x0 against revisions r0p1 - r0p2 */
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@ -152,6 +152,31 @@ func check_errata_2242638
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b cpu_rev_var_range
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endfunc check_errata_2242638
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/* ----------------------------------------------------------------
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* Errata Workaround for A78C Erratum 2772121.
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* This applies to revisions r0p0, r0p1 and r0p2 of the Cortex A78C
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* processor and is still open.
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* x0: variant[4:7] and revision[0:3] of current cpu.
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* Shall clobber: x0-x17
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* ----------------------------------------------------------------
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*/
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func errata_a78c_2772121_wa
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mov x17, x30
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bl check_errata_2772121
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cbz x0, 1f
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/* dsb before isb of power down sequence */
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dsb sy
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1:
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ret x17
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endfunc errata_a78c_2772121_wa
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func check_errata_2772121
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/* Applies to all revisions <= r0p2 */
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mov x1, #0x02
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b cpu_rev_var_ls
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endfunc check_errata_2772121
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func check_errata_cve_2022_23960
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#if WORKAROUND_CVE_2022_23960
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mov x0, #ERRATA_APPLIES
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@ -215,6 +240,12 @@ func cortex_a78c_core_pwr_dwn
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mrs x0, CORTEX_A78C_CPUPWRCTLR_EL1
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orr x0, x0, #CORTEX_A78C_CPUPWRCTLR_EL1_CORE_PWRDN_EN_BIT
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msr CORTEX_A78C_CPUPWRCTLR_EL1, x0
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#if ERRATA_A78C_2772121
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mov x15, x30
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bl cpu_get_rev_var
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bl errata_a78c_2772121_wa
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mov x30, x15
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#endif /* ERRATA_A78C_2772121 */
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isb
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ret
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endfunc cortex_a78c_core_pwr_dwn
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@ -237,6 +268,7 @@ func cortex_a78c_errata_report
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report_errata ERRATA_A78C_2242638, cortex_a78c, 2242638
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report_errata ERRATA_A78C_2376749, cortex_a78c, 2376749
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report_errata ERRATA_A78C_2395411, cortex_a78c, 2395411
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report_errata ERRATA_A78C_2772121, cortex_a78c, 2772121
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report_errata WORKAROUND_CVE_2022_23960, cortex_a78c, cve_2022_23960
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ldp x8, x30, [sp], #16
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@ -398,6 +398,10 @@ ERRATA_A78C_2376749 ?=0
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# to revisions r0p1 and r0p2 of the A78C cpu. It is still open.
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ERRATA_A78C_2395411 ?=0
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# Flag to apply erratum 2772121 workaround during powerdown. This erratum
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# applies to revisions r0p0, r0p1 and r0p2 of the A78C cpu. It is still open.
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ERRATA_A78C_2772121 ?=0
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# Flag to apply erratum 1821534 workaround during reset. This erratum applies
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# to revisions r0p0 - r1p0 of the X1 cpu and fixed in r1p1.
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ERRATA_X1_1821534 ?=0
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@ -1080,6 +1084,10 @@ $(eval $(call add_define,ERRATA_A78C_2376749))
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$(eval $(call assert_boolean,ERRATA_A78C_2395411))
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$(eval $(call add_define,ERRATA_A78C_2395411))
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# Process ERRATA_A78C_2772121 flag
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$(eval $(call assert_boolean,ERRATA_A78C_2772121))
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$(eval $(call add_define,ERRATA_A78C_2772121))
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# Process ERRATA_X1_1821534 flag
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$(eval $(call assert_boolean,ERRATA_X1_1821534))
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$(eval $(call add_define,ERRATA_X1_1821534))
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