Commit graph

438 commits

Author SHA1 Message Date
Manish Pandey
e8f4ec1ab0 Merge changes from topic "st_uart_updates" into integration
* changes:
  feat(stm32mp1): add early console in SP_min
  feat(st): properly manage early console
  feat(st-uart): manage STM32MP_RECONFIGURE_CONSOLE
  docs(st): introduce STM32MP_RECONFIGURE_CONSOLE
  feat(st): add trace for early console
  fix(stm32mp1): enable crash console in FIQ handler
  feat(st-uart): add initialization with the device tree
  refactor(stm32mp1): move DT_UART_COMPAT in include file
  feat(stm32mp1): configure the serial boot load address
  fix(stm32mp1): update the FIP load address for serial boot
  refactor(st): configure baudrate for UART programmer
  refactor(st-uart): compute the over sampling dynamically
2022-10-03 11:58:07 +02:00
Yann Gautier
0d33d38334 fix(st): add missing string.h include
Since patch on libc refactoring, there is a compilation error with
STM32MP_USB_PROGRAMMER=1:
plat/st/common/stm32cubeprogrammer_usb.c:81:35: error:
 implicit declaration of function 'strnlen'
 [-Werror=implicit-function-declaration]
      length += strnlen((char *)&dfu->buffer[GET_PHASE_LEN],

The string.h header file should be included.

Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
Change-Id: I1fbb2d9714cbc0d0640cb5e3c5ae8201dbfbe14e
2022-10-03 10:00:03 +02:00
Yann Gautier
14a070408d feat(stm32mp1): add early console in SP_min
Allow early console to be used at the beginning of SP_min, before
the clocks and UART have been reconfigured.

Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
Change-Id: I53d66938d42fcec830d9b81e5ef62b3790d0c3b3
2022-09-23 15:17:43 +02:00
Yann Gautier
5223d88032 feat(st): properly manage early console
The new flag STM32MP_RECONFIGURE_CONSOLE is managed in platform.mk.
It is used in stm32mp_setup_early_console() when calling
plat_crash_console_init(). This call is also under:
"#if defined(IMAGE_BL2)"
as this crash console init shouldn't be done by default in BL32.

Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
Change-Id: Ib6b89db83d80095b662a2016e18ceb3fa8668435
2022-09-23 15:17:43 +02:00
Yann Gautier
00606df012 feat(st): add trace for early console
When the early console is configured with STM32MP_EARLY_CONSOLE,
display a message indicating it is enabled.

Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
Change-Id: Iafdfa5afef27eba823d707841853a8a46de0b42d
2022-09-23 15:17:43 +02:00
Yann Gautier
484e846a03 fix(stm32mp1): enable crash console in FIQ handler
When a FIQ occurs and is trapped by SP_min, it is an unrecoverable
error. As kernel may have switched the UART console off, we should
re-enable it with plat_crash_console_init() for those failing states.

Signed-off-by: Yann Gautier <yann.gautier@st.com>
Change-Id: Ib02e1271b6213f8e383a062b74494abf8826188f
2022-09-23 15:17:43 +02:00
Patrick Delaunay
7d197d6281 refactor(stm32mp1): move DT_UART_COMPAT in include file
Move the definition of DT_UART_COMPAT in stm32mp1_def.h to be used
in several files.

Change-Id: I74d0350bcd971df9b15697f2b9ec04061d6a7656
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2022-09-23 15:17:43 +02:00
Patrick Delaunay
4b2f23e55f feat(stm32mp1): configure the serial boot load address
For product with 128MB DDR size, the OP-TEE is located at the end
of the DDR and the FIP can't be loaded at the default location
because it overlap the OP-TEE final location. So the default value
for DWL_BUFFER_BASE is invalid.

To avoid this conflict the serial boot load address = DWL_BUFFER_BASE
can be modified with a configuration flags.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Change-Id: Ie27b87c10c57fea5d4c6200ce4f624e775b9a080
2022-09-23 15:17:43 +02:00
Patrick Delaunay
32f2ca04bf fix(stm32mp1): update the FIP load address for serial boot
Update the FIP load address and size for serial boot to support
product with a DDR size = 128MB
1/ Move the FIP location at the end of the first 128MB
2/ Reduce the DWL_BUFFER_SIZE to 16MB, to be coherent with the value
   indicated in USB enumeration
   - for STM32MP13x: "@SSBL /0x03/1*16Me"
   - for STM32MP15x: "@Partition3 /0x03/1*16Me"

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Change-Id: Id93bf00c64832c17426bfd78e060861275677ecc
2022-09-23 15:17:43 +02:00
Patrick Delaunay
e7705e9afd refactor(st): configure baudrate for UART programmer
Add the possibility to configure the UART baudrate; reused the
console configuration, defined in STM32MP_UART_BAUDRATE.

The default value remains 115200.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Change-Id: Ifcf2b36e8ac929265405bc88e824ee78be3b5bbb
2022-09-23 15:17:43 +02:00
Patrick Delaunay
1258189515 refactor(st-uart): compute the over sampling dynamically
The parameter over_sampling of stm32_uart_init_s is not required
as it can be computed dynamically from clock rate of the serial
device and the requested baudrate.

Oversampling by 8 is allowed only for higher speed
(up to clock_rate / 8) to reduce the maximum receiver tolerance
to clock deviation.

This patch update the driver, the serial init struct and the
only user, the stm32cubeprogrammer over uart support.

Change-Id: I422731089730a288defeb7fa49886db65d0902b2
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2022-09-23 15:17:43 +02:00
Florian Lugou
dcb31ff790 feat(gic): add APIs to raise NS and S-EL1 SGIs
This patch adds two helper functions:
 - plat_ic_raise_ns_sgi to raise a NS SGI
 - plat_ic_raise_s_el1_sgi to raise a S-EL1 SGI

Signed-off-by: Florian Lugou <florian.lugou@provenrun.com>
Change-Id: I6f262dd1da1d77fec3f850eb74189e726b8e24da
2022-09-14 16:08:29 +02:00
Yann Gautier
e7cb4a86b8 fix(st): add max size for FIP in eMMC boot part
When putting FIP binary in eMMC boot partition (with STM32MP_EMMC_BOOT),
the FIP max size should be precised. If it is not, an assert fails in
io_block driver, as cur->size will be zero.
For this length, we then use the size of the eMMC boot partition minus
STM32MP_EMMC_BOOT_FIP_OFFSET.

Signed-off-by: Yann Gautier <yann.gautier@st.com>
Change-Id: I48b7635cff64f52d4b337a4c8c3becd9a0be72e8
2022-09-07 09:36:48 +02:00
Lionel Debieve
e0bbc190d5 feat(stm32mp1): allow to override MTD base offset
Add an external parameter STM32MP_FORCE_MTD_START_OFFSET that allows to
override the default FIP offset used to read the first programmed image.
It can be used for NOR, RAW_NAND or SPI_NAND boot device.

Signed-off-by: Lionel Debieve <lionel.debieve@st.com>
Change-Id: Ibe664aae0e5ee90dd6629e544c9e034d751fffed
2022-08-30 09:20:20 +02:00
Yann Gautier
d3434dca0b feat(stm32mp1): manage second NAND OTP on STM32MP13
On STM32MP13, 2 OTP fuses can be used to configure NAND devices.
By default OTP CFG9 is used for sNAND. A new OTP (CFG10) is used
to configure raw NAND. Thanks to bit 0 of CFG10 OTP, this default
configuration can be switched.
For sNAND on STM32MP13, the NAND_PARAM_STORED_IN_OTP is not used.
The sNAND parameters have to be taken from OTP bits.

Change-Id: Ib95e0f9b9e66179a58b07f723ea01dce68b96475
Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
2022-08-30 09:20:20 +02:00
Lionel Debieve
9ee2510b62 feat(stm32mp1): add define for external scratch buffer for nand devices
Override the default platform function to use an external buffer
on STM32MP13 platform.
It allows to use a temporary buffer located at the SRAM1 memory end.

Signed-off-by: Lionel Debieve <lionel.debieve@foss.st.com>
Change-Id: Ibd84bb336c60af24608268916b3a18bb5a0fa3db
2022-08-30 09:20:20 +02:00
Yann Gautier
a3f97f66c3 feat(stm32mp1): manage STM32MP13 rev.Y
The new SoC version for STM32MP13 is the revision Y. The register
SYSCFG_IDC is updated for this new version with the value 0x1003.
The function stm32mp_get_soc_name() should also be updated to manage
this new SoC revision.

Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
Change-Id: I4f2fa5f1503f17db93d8413c79c2b7a18d279f9b
2022-08-17 17:25:45 +02:00
Yann Gautier
53d5b8ff50 feat(st): enable MMC_FLAG_SD_CMD6 for SD-cards
This flag allows switching to High-Speed mode on SD-cards.
The gain is ~44ms when using SP_min, and ~55ms with OP-TEE.

Change-Id: Ic396c6a14201580b5e5627e6174b85b437b87cae
Signed-off-by: Yann Gautier <yann.gautier@st.com>
2022-08-16 15:58:22 +02:00
Lauren Wehrmeister
c152276829 Merge changes from topic "st_fip_uuid" into integration
* changes:
  feat(stm32mp1): retrieve FIP partition by type UUID
  feat(guid-partition): allow to find partition by type UUID
  refactor(stm32mp1): update PLAT_PARTITION_MAX_ENTRIES
2022-08-01 16:45:49 +02:00
Yann Gautier
de1ab9fe05 fix(stm32mp13): correct USART addresses
On STM32MP13, USART1 and USART2 addresses are 0x4C000000 and 0x4C001000.
Whereas on STM32MP15, the addresses were 0x5C000000 and 0x4000E000.
Use dedicated flags to choose the correct address, that could be use
for early or crash console.

Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
Change-Id: I98bd97a0ac8b0408a50376801e2a1961b241a3d6
2022-07-05 17:03:24 +02:00
Patrick Delaunay
10f6dc7893 feat(stm32mp13): change BL33 memory mapping
U-Boot is loaded at the beginning of the DDR:
STM32MP_DDR_BASE = 0xC0000000.

This patch remove the need to use the 0x100000 offset, reserved
on STM32MP15 for flashlayout.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Change-Id: I8d0a93f4db411cf59838e635a315c729cccee269
2022-07-05 17:03:19 +02:00
Lionel Debieve
1dab28f99d feat(stm32mp1): retrieve FIP partition by type UUID
Modify the function to retrieve the FIP partition looking
the UUID type define for FIP. If not defined, compatibility
used to find the FIP partition by name.

Signed-off-by: Lionel Debieve <lionel.debieve@foss.st.com>
Change-Id: I76634dea891f51d913a549fb9a077cf7284d5cb2
2022-07-05 14:46:10 +02:00
Yann Gautier
8fc6fb5cae refactor(stm32mp1): update PLAT_PARTITION_MAX_ENTRIES
Fix the maximum partition number to a default value. It must
also take care of the extra partition when FWU feature is enabled.

Change-Id: Ib64b1f19f1f0514f7e89d35fc367facd6df54bed
Signed-off-by: Lionel Debieve <lionel.debieve@foss.st.com>
Signed-off-by: Yann Gautier <yann.gautier@st.com>
2022-07-05 14:39:30 +02:00
Yann Gautier
722ca35ecc feat(stm32mp15): manage OP-TEE shared memory
On STM32MP15, there is currently an OP-TEE shared memory area at the end
of the DDR. But this area will in term be removed. To allow a smooth
transition, a new flag is added (STM32MP15_OPTEE_RSV_SHM). It reflects
the OP-TEE flag: CFG_CORE_RESERVED_SHM. The flag is enabled by default
(no behavior change). It will be set to 0 when OP-TEE is aligned, and
then later be removed.

Signed-off-by: Yann Gautier <yann.gautier@st.com>
Change-Id: I91146cd8a26a24be22143c212362294c1e880264
2022-06-30 14:19:45 +02:00
Manish Pandey
caca0e57b8 Merge "feat(stm32mp1): save boot auth status and partition info" into integration 2022-06-28 10:53:01 +02:00
Igor Opaniuk
ab2b325c1a feat(stm32mp1): save boot auth status and partition info
Introduce a functionality for saving/restoring boot auth status
and partition used for booting (FSBL partition on which the boot
was successful).

Signed-off-by: Igor Opaniuk <igor.opaniuk@foundries.io>
Change-Id: I4d7f153b70dfc49dad8c1c3fa71111a350caf1ee
2022-06-27 18:56:55 +03:00
Yann Gautier
c4dbcb8852 feat(stm32mp1): optionally use paged OP-TEE
STM32MP13 can encrypt the DDR. OP-TEE is then fully in DDR, and there
is no need for paged image on STM32MP13. The management of the paged
OP-TEE is made conditional, and will be kept only for STM32MP15.

Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
Change-Id: I85ac7aaf6a172c4ee529736113ed40fe66835fd7
2022-06-22 14:51:03 +02:00
Madhukar Pappireddy
925ce79136 Merge changes from topic "stm32mp-emmc-boot-fip" into integration
* changes:
  feat(stm32mp1): extend STM32MP_EMMC_BOOT support to FIP format
  refactor(mmc): replace magic value with new PART_CFG_BOOT_PARTITION_NO_ACCESS
  refactor(mmc): export user/boot partition switch functions
2022-06-08 00:14:59 +02:00
Yann Gautier
b14d3e22b4 feat(st): search pinctrl node by compatible
Instead of searching pinctrl node with its name, search with its
compatible. This will be necessary before pin-controller name changes
to pinctrl due to kernel yaml changes.

Signed-off-by: Yann Gautier <yann.gautier@st.com>
Change-Id: I00590414fa65e193c6a72941a372bcecac673f60
2022-06-07 15:36:24 +02:00
Ahmad Fatoum
95e4908e17 feat(stm32mp1): extend STM32MP_EMMC_BOOT support to FIP format
STM32MP_EMMC_BOOT allowed placing SSBL into the eMMC boot
partition along with FSBL. This allows atomic update of both
FSBL and SSBL at the same time. Previously, this was only
possible for the FSBL, as the eMMC layout expected by TF-A
had a single SSBL GPT partition in the eMMC user area.
TEE binaries remained in dedicated GPT partitions whether
STM32MP_EMMC_BOOT was on or off.

The new FIP format collects SSBL and TEE partitions into
a single binary placed into a GPT partition.
Extend STM32MP_EMMC_BOOT, so eMMC-booted TF-A first uses
a FIP image placed at offset 256K into the active eMMC boot
partition. If no FIP magic is detected at that offset or if
STM32MP_EMMC_BOOT is disabled, the GPT on the eMMC user area
will be consulted as before.

This allows power fail-safe update of all firmware using the
built-in eMMC boot selector mechanism, provided it fits into
the boot partition - SZ_256K. SZ_256K was chosen because it's
the same offset used with the legacy format and because it's
the size of the on-chip SRAM, where the STM32MP15x BootROM
loads TF-A into. As such, TF-A may not exceed this size limit
for existing SoCs.

Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
Change-Id: Id7bec45652b3a289ca632d38d4b51316c5efdf8d
2022-06-02 17:28:33 +02:00
Rohit Ner
7da7f1f0b0 build(stm32mp1): platform changes for verifying gpt header crc
This change makes the necessary additions to makefile of
platforms using partition driver.

Signed-off-by: Rohit Ner <rohitner@google.com>
Change-Id: I66f6daaa0deac984b0aa5f2a182385410189ba8a
2022-05-18 06:11:17 -07:00
Manish V Badarkhe
570c71b20a fix(stm32mp1): include assert.h to fix build failure
stm32mp1 platform build failed with the error [1] in the coverity, to
fix it included assert.h file.

Including bl32/sp_min/sp_min.mk
plat/st/stm32mp1/plat_image_load.c: In function
'plat_get_bl_image_load_info':
plat/st/stm32mp1/plat_image_load.c:30:2: error: implicit declaration of
function 'assert' [-Werror=implicit-function-declaration]
   30 |  assert(bl33 != NULL);
      |  ^~~~~~
plat/st/stm32mp1/plat_image_load.c:9:1: note: 'assert' is defined in
header '<assert.h>'; did you forget to '#include <assert.h>'?
    8 | #include <plat/common/platform.h>
  +++ |+#include <assert.h>
    9 |
cc1: all warnings being treated as errors

Signed-off-by: Manish V Badarkhe <manish.badarkhe@arm.com>
Change-Id: I486bd695298798c05008158545668020babb3eca
2022-05-17 16:34:02 +01:00
Manish Pandey
f41a85e9cb Merge "fix(st): add missing header include" into integration 2022-05-10 14:36:46 +02:00
Yann Gautier
b1391b294c fix(st): add missing header include
This issue is triggered when enabling -Wmissing-prototypes:
plat/st/common/bl2_io_storage.c:114:5: warning: no previous prototype
 for 'open_fip' [-Wmissing-prototypes]
  114 | int open_fip(const uintptr_t spec)
      |     ^~~~~~~~
plat/st/common/bl2_io_storage.c:119:5: warning: no previous prototype
 for 'open_storage' [-Wmissing-prototypes]
  119 | int open_storage(const uintptr_t spec)
      |     ^~~~~~~~~~~~

Add missing stm32mp_io_storage.h header include, where those functions
prototypes are defined.

Signed-off-by: Yann Gautier <yann.gautier@st.com>
Change-Id: I2af69fadfc4780553f41b338cd93b731210672a6
2022-05-06 15:52:38 +02:00
Yann Gautier
2deff904a9 fix(st): fix NULL pointer dereference issues
The get_bl_mem_params_node() function could return NULL. Add asserts to
check the return value is not NULL.
This corrects coverity issues:
	pager_mem_params = get_bl_mem_params_node(BL32_EXTRA1_IMAGE_ID);
>>>     CID 378360:    (NULL_RETURNS)
>>>     Dereferencing "pager_mem_params", which is known to be "NULL".

	paged_mem_params = get_bl_mem_params_node(BL32_EXTRA2_IMAGE_ID);
>>>     CID 378360:    (NULL_RETURNS)
>>>     Dereferencing "paged_mem_params", which is known to be "NULL".

	tos_fw_mem_params = get_bl_mem_params_node(TOS_FW_CONFIG_ID);
>>>     CID 378360:    (NULL_RETURNS)
>>>     Dereferencing "tos_fw_mem_params", which is known to be "NULL".


Do the same for other occurrences of get_bl_mem_params_node() return not
checked, in the functions plat_get_bl_image_load_info() and
bl2_plat_handle_pre_image_load().

Signed-off-by: Yann Gautier <yann.gautier@st.com>
Change-Id: I79165b1628fcee3da330f2db4ee5e1dafcb1b21f
2022-05-06 11:00:15 +02:00
Manish V Badarkhe
26850d71ec refactor(st): update set_config_info function call
Pass NS-load address as ~0UL to the 'set_config_info' function while
updating FW_CONFIG device tree information since it is always loaded
into secure memory.

Change-Id: Ieeaf9c97085128d7b7339d34495bdd58cd9fcf8a
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>
2022-03-16 13:51:26 +00:00
Madhukar Pappireddy
5b44657a97 Merge changes from topic "st_fwu_bkp_reg" into integration
* changes:
  feat(stm32mp1): retry 3 times FWU trial boot
  refactor(stm32mp1): update backup reg for FWU
2022-04-25 19:28:33 +02:00
Yann Gautier
429f10e336 fix(stm32mp1): correct dtc version check
Depending on the shell used, the grep command can fail, leading to
a wrong dtc version detection. Correct that by adding quotes.

Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
Change-Id: I329ec929559c94bf1bf99b127662c9d978e067cf
2022-04-22 13:23:22 +02:00
Manish Pandey
dfc59a7b82 Merge changes from topic "st_nvmem_layout" into integration
* changes:
  refactor(stm32mp1-fdts): remove nvmem_layout node
  refactor(stm32mp1): drop the "st,stm32-nvmem-layout" node
  refactor(st): remove useless includes
2022-04-19 16:11:24 +02:00
Yann Gautier
03d20776ef fix(st): remove extra chars from dtc version
In some implementations of dtc tool (e.g. with yocto), there can be a 'v'
at the beginning of the version, and a '+' at the end. Just keep numbers
then, with a grep -o.

Signed-off-by: Yann Gautier <yann.gautier@st.com>
Change-Id: I180e97ab75ba3e5ceacb4b1961a1f22788b428a3
2022-04-05 08:58:16 +02:00
Nicolas Toromanoff
f87de907c8 feat(stm32mp1): retry 3 times FWU trial boot
If we reboot 3 times in trial mode, BL2 will select previous boot image.

Signed-off-by: Nicolas Toromanoff <nicolas.toromanoff@foss.st.com>
Change-Id: I82b423cc84f0471fdb6fa7c393fc5fe411d25c06
2022-03-30 15:44:40 +02:00
Yann Gautier
e633f9c52f refactor(stm32mp1): update backup reg for FWU
Change the backup register used to store FWU parameters from 21 to 10.
This is chosen to have a Read/Write secure and Read non-secure register.
The mapping is also changed: only the first 4 bits will be used to store
the FWU index. The 4 next bits will be used to store count info. The
other bits are reserved.

Signed-off-by: Yann Gautier <yann.gautier@st.com>
Signed-off-by: Nicolas Toromanoff <nicolas.toromanoff@foss.st.com>
Change-Id: I9249768287ec5688ba2d8711ce04d429763543d7
2022-03-30 13:34:59 +02:00
Patrick Delaunay
c5bf1b0971 refactor(stm32mp1): drop the "st,stm32-nvmem-layout" node
Simplify the DT parsing by removing the parsing of the nvmem layout node
with "st,stm32-nvmem-layout" compatible.

The expected OTP NAME can directly be found in a sub-node named
NAME@ADDRESS of the BSEC node, the NVMEM provider node.

This patch also removes this specific binding introduced for TF-A.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Change-Id: Ic703385fad1bec5bef1cee583fbe9fbbf6aea216
2022-03-28 18:29:59 +02:00
Yann Gautier
b9a6dbc1ba refactor(st): remove useless includes
The stm32mp_dt.c file does not need anything from DDR header files.

Signed-off-by: Yann Gautier <yann.gautier@st.com>
Change-Id: Ibfe23204d68ee2e863cd2eda3d725baa830b729a
2022-03-28 18:29:59 +02:00
Yann Gautier
99a5d8d01d feat(stm32mp1): select platform compilation either by flag or DT
To choose either STM32MP13 or STM32MP15, one of the two flags can be
set to 1 in the make command line. Or the platform selection can be
done with device tree name, if it begins with stm32mp13 or stm32mp15.

Change-Id: I72f42665c105b71a84b4952ef3fcd6c06ae4598c
Signed-off-by: Lionel Debieve <lionel.debieve@foss.st.com>
Signed-off-by: Yann Gautier <yann.gautier@st.com>
2022-03-22 09:09:23 +01:00
Nicolas Le Bayon
e6fddbc995 feat(stm32mp1-fdts): add DDR support for STM32MP13
Add dedicated device tree files for STM32MP13.
Add new DDR compatible for STM32MP13x.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com>
Change-Id: Ib1bb9ad8cb2ab9f5f81549635d6604093aeb99d3
2022-03-22 09:09:23 +01:00
Yann Gautier
d38eaf99d3 feat(stm32mp1): updates for STM32MP13 device tree compilation
Add stm32mp13_bl2.dtsi files.
Update compilation variables for STM32MP13.

Change-Id: Ia3aa3abfe09c04c1a57541e565c212aa094e285c
Signed-off-by: Yann Gautier <yann.gautier@st.com>
2022-03-22 09:09:23 +01:00
Nicolas Toromanoff
296ac8012b feat(stm32mp1): add "Boot mode" management for STM32MP13
Add new APIs to enter and exit "boot mode".

In this mode a potential tamper won't block access or reset
the secure IPs needed while boot, without this mode a dead
lock may occurs.

Change-Id: Iad60d4a0420ec125b842a285f73a20eb54cd1828
Signed-off-by: Nicolas Toromanoff <nicolas.toromanoff@st.com>
2022-03-22 09:09:23 +01:00
Yann Gautier
fca10a8f1b feat(stm32mp1): manage HSLV on STM32MP13
On STM32MP13, the high speed mode for pads in low voltage is different
from STM32MP15. Each peripheral supporting the feature has its own
register.
Special care is taken for SDMMC peripherals. The HSLV mode is enabled
only if the max voltage for the pads is lower or equal to 1.8V.

Change-Id: Id94d2cca17dd4aca4d764230a643b2bb9a5f3342
Signed-off-by: Yann Gautier <yann.gautier@st.com>
2022-03-22 09:09:23 +01:00
Yann Gautier
3331d3637c feat(stm32mp1): add sdmmc compatible in platform define
Add DT_SDMMC2_COMPAT define in stm32mp1_def.h file in platform.
It allows the use of the compatible in platform code.

Change-Id: I535ad67dd133bab59cf81881adaef42d8e88632c
Signed-off-by: Yann Gautier <yann.gautier@st.com>
2022-03-22 09:09:23 +01:00