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https://github.com/ARM-software/arm-trusted-firmware.git
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Merge changes from topic "st_nvmem_layout" into integration
* changes: refactor(stm32mp1-fdts): remove nvmem_layout node refactor(stm32mp1): drop the "st,stm32-nvmem-layout" node refactor(st): remove useless includes
This commit is contained in:
commit
dfc59a7b82
7 changed files with 6 additions and 127 deletions
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@ -26,26 +26,6 @@
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};
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};
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nvmem_layout: nvmem_layout@0 {
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compatible = "st,stm32-nvmem-layout";
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nvmem-cells = <&cfg0_otp>,
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<&part_number_otp>,
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<&monotonic_otp>,
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<&nand_otp>,
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<&nand2_otp>,
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<&uid_otp>,
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<&hw2_otp>;
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nvmem-cell-names = "cfg0_otp",
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"part_number_otp",
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"monotonic_otp",
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"nand_otp",
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"nand2_otp",
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"uid_otp",
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"hw2_otp";
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};
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clocks {
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clk_csi: clk-csi {
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#clock-cells = <0>;
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@ -175,28 +175,6 @@
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status = "okay";
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};
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&nvmem_layout {
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nvmem-cells = <&cfg0_otp>,
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<&part_number_otp>,
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<&monotonic_otp>,
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<&nand_otp>,
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<&nand2_otp>,
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<&uid_otp>,
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<&hw2_otp>,
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<&pkh_otp>,
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<&board_id>;
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nvmem-cell-names = "cfg0_otp",
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"part_number_otp",
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"monotonic_otp",
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"nand_otp",
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"nand2_otp",
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"uid_otp",
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"hw2_otp",
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"pkh_otp",
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"board_id";
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};
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&pka {
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secure-status = "okay";
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};
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@ -24,26 +24,6 @@
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};
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};
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nvmem_layout: nvmem_layout@0 {
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compatible = "st,stm32-nvmem-layout";
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nvmem-cells = <&cfg0_otp>,
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<&part_number_otp>,
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<&monotonic_otp>,
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<&nand_otp>,
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<&uid_otp>,
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<&package_otp>,
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<&hw2_otp>;
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nvmem-cell-names = "cfg0_otp",
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"part_number_otp",
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"monotonic_otp",
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"nand_otp",
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"uid_otp",
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"package_otp",
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"hw2_otp";
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};
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psci {
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compatible = "arm,psci-1.0";
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method = "smc";
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@ -195,26 +195,6 @@
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status = "okay";
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};
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&nvmem_layout {
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nvmem-cells = <&cfg0_otp>,
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<&part_number_otp>,
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<&monotonic_otp>,
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<&nand_otp>,
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<&uid_otp>,
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<&package_otp>,
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<&hw2_otp>,
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<&board_id>;
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nvmem-cell-names = "cfg0_otp",
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"part_number_otp",
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"monotonic_otp",
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"nand_otp",
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"uid_otp",
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"package_otp",
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"hw2_otp",
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"board_id";
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};
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&pwr_regulators {
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vdd-supply = <&vdd>;
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vdd_3v3_usbfs-supply = <&vdd_usb>;
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@ -183,26 +183,6 @@
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secure-status = "okay";
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};
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&nvmem_layout {
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nvmem-cells = <&cfg0_otp>,
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<&part_number_otp>,
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<&monotonic_otp>,
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<&nand_otp>,
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<&uid_otp>,
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<&package_otp>,
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<&hw2_otp>,
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<&board_id>;
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nvmem-cell-names = "cfg0_otp",
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"part_number_otp",
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"monotonic_otp",
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"nand_otp",
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"uid_otp",
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"package_otp",
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"hw2_otp",
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"board_id";
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};
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&pwr_regulators {
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vdd-supply = <&vdd>;
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vdd_3v3_usbfs-supply = <&vdd_usb>;
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@ -11,8 +11,6 @@
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#include <common/fdt_wrappers.h>
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#include <drivers/st/regulator.h>
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#include <drivers/st/stm32_gpio.h>
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#include <drivers/st/stm32mp1_ddr.h>
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#include <drivers/st/stm32mp1_ram.h>
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#include <libfdt.h>
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#include <platform_def.h>
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@ -328,48 +326,32 @@ const char *dt_get_board_model(void)
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int dt_find_otp_name(const char *name, uint32_t *otp, uint32_t *otp_len)
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{
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int node;
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int index, len;
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int len;
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const fdt32_t *cuint;
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if ((name == NULL) || (otp == NULL)) {
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return -FDT_ERR_BADVALUE;
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}
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node = fdt_node_offset_by_compatible(fdt, -1, DT_NVMEM_LAYOUT_COMPAT);
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node = fdt_node_offset_by_compatible(fdt, -1, DT_BSEC_COMPAT);
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if (node < 0) {
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return node;
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}
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index = fdt_stringlist_search(fdt, node, "nvmem-cell-names", name);
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if (index < 0) {
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return index;
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}
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cuint = fdt_getprop(fdt, node, "nvmem-cells", &len);
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if (cuint == NULL) {
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return -FDT_ERR_NOTFOUND;
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}
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if ((index * (int)sizeof(uint32_t)) > len) {
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return -FDT_ERR_BADVALUE;
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}
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cuint += index;
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node = fdt_node_offset_by_phandle(fdt, fdt32_to_cpu(*cuint));
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node = fdt_subnode_offset(fdt, node, name);
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if (node < 0) {
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ERROR("Malformed nvmem_layout node: ignored\n");
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ERROR("nvmem node %s not found\n", name);
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return node;
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}
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cuint = fdt_getprop(fdt, node, "reg", &len);
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if ((cuint == NULL) || (len != (2 * (int)sizeof(uint32_t)))) {
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ERROR("Malformed nvmem_layout node: ignored\n");
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ERROR("Malformed nvmem node %s: ignored\n", name);
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return -FDT_ERR_BADVALUE;
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}
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if (fdt32_to_cpu(*cuint) % sizeof(uint32_t)) {
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ERROR("Misaligned nvmem_layout element: ignored\n");
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ERROR("Misaligned nvmem %s element: ignored\n", name);
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return -FDT_ERR_BADVALUE;
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}
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@ -621,7 +621,6 @@ static inline uintptr_t tamp_bkpr(uint32_t idx)
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#define DT_DDR_COMPAT "st,stm32mp1-ddr"
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#endif
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#define DT_IWDG_COMPAT "st,stm32mp1-iwdg"
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#define DT_NVMEM_LAYOUT_COMPAT "st,stm32-nvmem-layout"
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#define DT_PWR_COMPAT "st,stm32mp1,pwr-reg"
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#if STM32MP13
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#define DT_RCC_CLK_COMPAT "st,stm32mp13-rcc"
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