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refactor(stm32mp1): update backup reg for FWU
Change the backup register used to store FWU parameters from 21 to 10. This is chosen to have a Read/Write secure and Read non-secure register. The mapping is also changed: only the first 4 bits will be used to store the FWU index. The 4 next bits will be used to store count info. The other bits are reserved. Signed-off-by: Yann Gautier <yann.gautier@st.com> Signed-off-by: Nicolas Toromanoff <nicolas.toromanoff@foss.st.com> Change-Id: I9249768287ec5688ba2d8711ce04d429763543d7
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1 changed files with 14 additions and 3 deletions
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@ -46,7 +46,16 @@
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#define TAMP_BOOT_MODE_ITF_MASK U(0x0000FF00)
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#define TAMP_BOOT_MODE_ITF_SHIFT 8
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#define TAMP_BOOT_COUNTER_REG_ID U(21)
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/*
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* Backup register to store fwu update information.
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* It should be writeable only by secure world, but also readable by non secure
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* (so it should be in Zone 2).
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*/
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#define TAMP_BOOT_FWU_INFO_REG_ID U(10)
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#define TAMP_BOOT_FWU_INFO_IDX_MSK U(0xF)
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#define TAMP_BOOT_FWU_INFO_IDX_OFF U(0)
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#define TAMP_BOOT_FWU_INFO_CNT_MSK U(0xF0)
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#define TAMP_BOOT_FWU_INFO_CNT_OFF U(4)
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#if defined(IMAGE_BL2)
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#define MAP_SEC_SYSRAM MAP_REGION_FLAT(STM32MP_SYSRAM_BASE, \
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@ -733,8 +742,10 @@ void stm32_get_boot_interface(uint32_t *interface, uint32_t *instance)
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void stm32mp1_fwu_set_boot_idx(void)
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{
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clk_enable(RTCAPB);
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mmio_write_32(tamp_bkpr(TAMP_BOOT_COUNTER_REG_ID),
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plat_fwu_get_boot_idx());
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mmio_clrsetbits_32(tamp_bkpr(TAMP_BOOT_FWU_INFO_REG_ID),
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TAMP_BOOT_FWU_INFO_IDX_MSK,
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(plat_fwu_get_boot_idx() << TAMP_BOOT_FWU_INFO_IDX_OFF) &
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TAMP_BOOT_FWU_INFO_IDX_MSK);
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clk_disable(RTCAPB);
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}
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#endif /* !STM32MP_USE_STM32IMAGE && PSA_FWU_SUPPORT */
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