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feat(stm32mp1): retry 3 times FWU trial boot
If we reboot 3 times in trial mode, BL2 will select previous boot image. Signed-off-by: Nicolas Toromanoff <nicolas.toromanoff@foss.st.com> Change-Id: I82b423cc84f0471fdb6fa7c393fc5fe411d25c06
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parent
e633f9c52f
commit
f87de907c8
4 changed files with 72 additions and 12 deletions
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@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2015-2021, ARM Limited and Contributors. All rights reserved.
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* Copyright (c) 2015-2022, ARM Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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@ -485,22 +485,46 @@ int plat_get_image_source(unsigned int image_id, uintptr_t *dev_handle,
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#if (STM32MP_SDMMC || STM32MP_EMMC) && PSA_FWU_SUPPORT
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/*
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* Eventually, this function will return the
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* boot index to be passed on to the Update
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* Agent after performing certain checks like
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* a watchdog timeout, or Auth failure while
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* trying to load from a certain bank.
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* For now, since we do not have that logic
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* implemented, just pass the active_index
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* read from the metadata.
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* In each boot in non-trial mode, we set the BKP register to
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* FWU_MAX_TRIAL_REBOOT, and return the active_index from metadata.
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*
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* As long as the update agent didn't update the "accepted" field in metadata
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* (i.e. we are in trial mode), we select the new active_index.
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* To avoid infinite boot loop at trial boot we decrement a BKP register.
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* If this counter is 0:
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* - an unexpected TAMPER event raised (that resets the BKP registers to 0)
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* - a power-off occurs before the update agent was able to update the
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* "accepted' field
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* - we already boot FWU_MAX_TRIAL_REBOOT times in trial mode.
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* we select the previous_active_index.
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*/
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#define INVALID_BOOT_IDX 0xFFFFFFFF
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uint32_t plat_fwu_get_boot_idx(void)
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{
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const struct fwu_metadata *metadata;
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/*
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* Select boot index and update boot counter only once per boot
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* even if this function is called several times.
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*/
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static uint32_t boot_idx = INVALID_BOOT_IDX;
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const struct fwu_metadata *data;
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metadata = fwu_get_metadata();
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data = fwu_get_metadata();
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return metadata->active_index;
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if (boot_idx == INVALID_BOOT_IDX) {
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boot_idx = data->active_index;
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if (fwu_is_trial_run_state()) {
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if (stm32_get_and_dec_fwu_trial_boot_cnt() == 0U) {
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WARN("Trial FWU fails %u times\n",
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FWU_MAX_TRIAL_REBOOT);
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boot_idx = data->previous_active_index;
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}
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} else {
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stm32_set_max_fwu_trial_boot_cnt();
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}
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}
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return boot_idx;
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}
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static void *stm32_get_image_spec(const uuid_t *img_type_uuid)
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@ -129,6 +129,8 @@ void stm32_get_boot_interface(uint32_t *interface, uint32_t *instance);
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#if !STM32MP_USE_STM32IMAGE && PSA_FWU_SUPPORT
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void stm32mp1_fwu_set_boot_idx(void);
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uint32_t stm32_get_and_dec_fwu_trial_boot_cnt(void);
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void stm32_set_max_fwu_trial_boot_cnt(void);
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#endif /* !STM32MP_USE_STM32IMAGE && PSA_FWU_SUPPORT */
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#endif /* STM32MP_COMMON_H */
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@ -511,6 +511,9 @@ enum ddr_type {
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/* UID OTP */
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#define UID_WORD_NB U(3)
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/* FWU configuration (max supported value is 15) */
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#define FWU_MAX_TRIAL_REBOOT U(3)
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/*******************************************************************************
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* STM32MP1 TAMP
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******************************************************************************/
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@ -748,4 +748,35 @@ void stm32mp1_fwu_set_boot_idx(void)
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TAMP_BOOT_FWU_INFO_IDX_MSK);
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clk_disable(RTCAPB);
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}
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uint32_t stm32_get_and_dec_fwu_trial_boot_cnt(void)
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{
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uintptr_t bkpr_fwu_cnt = tamp_bkpr(TAMP_BOOT_FWU_INFO_REG_ID);
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uint32_t try_cnt;
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clk_enable(RTCAPB);
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try_cnt = (mmio_read_32(bkpr_fwu_cnt) & TAMP_BOOT_FWU_INFO_CNT_MSK) >>
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TAMP_BOOT_FWU_INFO_CNT_OFF;
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assert(try_cnt <= FWU_MAX_TRIAL_REBOOT);
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if (try_cnt != 0U) {
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mmio_clrsetbits_32(bkpr_fwu_cnt, TAMP_BOOT_FWU_INFO_CNT_MSK,
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(try_cnt - 1U) << TAMP_BOOT_FWU_INFO_CNT_OFF);
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}
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clk_disable(RTCAPB);
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return try_cnt;
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}
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void stm32_set_max_fwu_trial_boot_cnt(void)
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{
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uintptr_t bkpr_fwu_cnt = tamp_bkpr(TAMP_BOOT_FWU_INFO_REG_ID);
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clk_enable(RTCAPB);
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mmio_clrsetbits_32(bkpr_fwu_cnt, TAMP_BOOT_FWU_INFO_CNT_MSK,
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(FWU_MAX_TRIAL_REBOOT << TAMP_BOOT_FWU_INFO_CNT_OFF) &
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TAMP_BOOT_FWU_INFO_CNT_MSK);
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clk_disable(RTCAPB);
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}
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#endif /* !STM32MP_USE_STM32IMAGE && PSA_FWU_SUPPORT */
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