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feat(stm32mp13): change BL33 memory mapping
U-Boot is loaded at the beginning of the DDR: STM32MP_DDR_BASE = 0xC0000000. This patch remove the need to use the 0x100000 offset, reserved on STM32MP15 for flashlayout. Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Change-Id: I8d0a93f4db411cf59838e635a315c729cccee269
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@ -182,7 +182,12 @@ enum ddr_type {
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#endif
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#endif
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#if STM32MP13
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#define STM32MP_BL33_BASE STM32MP_DDR_BASE
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#endif
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#if STM32MP15
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#define STM32MP_BL33_BASE (STM32MP_DDR_BASE + U(0x100000))
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#endif
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#define STM32MP_BL33_MAX_SIZE U(0x400000)
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/* Define maximum page size for NAND devices */
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