* changes:
feat(stm32mp2): use early traces
feat(st-bsec): use early traces
refactor(st): replace STM32MP_EARLY_CONSOLE with EARLY_CONSOLE
feat(console): introduce EARLY_CONSOLE
feat(bl32): create an sp_min_setup function
S32G274ARDB2 is a development board to showcase the capabilities of the
S32G2 SoC. It includes 4 ARM Cortex-A53 cores running at 1.0GHz, 4GBs
of DDR, accelerators for automotive networking and many other
peripherals.
The added support is minimal and only includes the BL2 stage, with no
MMU enabled. The FIP is preloaded by the BootROM in SRAM, and BL2 copies
BL31 and BL33 from FIP to their designated addresses.
Change-Id: Iedda23302768ab70d63787117c5f6f3c21eb9842
Signed-off-by: Bogdan Hamciuc <bogdan.hamciuc@nxp.com>
Signed-off-by: Dan Nica <dan.nica@nxp.com>
Signed-off-by: Andra-Teodora Ilie <andra.ilie@nxp.com>
Signed-off-by: Bogdan Roman <bogdan-gabriel.roman@nxp.com>
Signed-off-by: Ghennadi Procopciuc <ghennadi.procopciuc@nxp.com>
As RD-N1-Edge is not planned to be deprecated in the upcoming release
cycles, remove it from the deprecated list.
Change-Id: I6af06e7bd162747aab72384185951d218b388ed3
Signed-off-by: Rohit Mathew <rohit.mathew@arm.com>
As SGI-575 is not planned to be deprecated in the upcoming release
cycles, remove it from the deprecated list.
Change-Id: Ic9171a3e1bec198d9305e75ac5cae4b40498537e
Signed-off-by: Rohit Mathew <rohit.mathew@arm.com>
Now that EARLY_CONSOLE is generic, use it instead of the ST flag.
Remove stm32mp_setup_early_console() calls as it is done in common TF-A
code.
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Change-Id: Icac29b62a6267303cb5c679d15847c013ead1d23
The Arm FVP documentation has grown organically over the years. As a
result, it has become a big document, which can be difficult to digest.
Also, the organization of some of the sections does not make sense. In
particular, all "Running on the ... FVP" sections live under a section
named "Booting a preloaded kernel image (Base FVP)". To illustrate this,
here is the current table of contents:
Arm Fixed Virtual Platforms (FVP)
Fixed Virtual Platform (FVP) Support
Arm FVP Platform Specific Build Options
Booting Firmware Update images
Booting an EL3 payload
Booting a preloaded kernel image (Base FVP)
Obtaining the Flattened Device Treesp
Running on the Foundation FVP with reset to BL1 entrypoint
Running on the AEMv8 Base FVP with reset to BL1 entrypoint
Running on the AEMv8 Base FVP (AArch32) with reset to BL1 entrypoint
Running on the Cortex-A57-A53 Base FVP with reset to BL1 entrypoint
Running on the Cortex-A32 Base FVP (AArch32) with reset to BL1 entrypoint
Running on the AEMv8 Base FVP with reset to BL31 entrypoint
Running on the AEMv8 Base FVP (AArch32) with reset to SP_MIN entrypoint
Running on the Cortex-A57-A53 Base FVP with reset to BL31 entrypoint
Running on the Cortex-A32 Base FVP (AArch32) with reset to SP_MIN entrypoint
This patch breaks down this document in sub-documents, which are now
included from the index file. The table of contents (ToC) reflects the
new documents hierarchy. The depth of the ToC has been reduced to
simplify the index page. Here is what it looks like now:
Arm Fixed Virtual Platforms (FVP)
Fixed Virtual Platform (FVP) Support
Arm FVP Platform Specific Build Options
Running on the Foundation FVP
Running on the AEMv8 Base FVP
Running on the Cortex-A57-A53 Base FVP
Running on the Cortex-A32 Base FVP (AArch32)
Booting Firmware Update images
Booting an EL3 payload
Booting a preloaded kernel image (Base FVP)
Apart from moving information around in separate files, this patch also
makes the following minor changes to the contents:
- Add a brief introduction about FVPs in the index page.
- Change some of the titles names for conciseness.
Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>
Change-Id: Icb650e0ec2c7a86ccd6e7eea4e16a84c41442c96
Since the TC1 platform has been eliminated from the TF-A source code
and CI script repository, updated the deprecation table to remove its
entry.
Change-Id: I93ae03e1f810666e9a6d0c6172a322ff1e960c71
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>
* changes:
feat(rpi): add Raspberry Pi 5 support
fix(rpi): consider MT when calculating core index from MPIDR
refactor(rpi): move register definitions out of rpi_hw.h
refactor(rpi): add platform macro for the crash UART base address
refactor(rpi): split out console registration logic
refactor(rpi): move more platform-specific code into common
Recommend OP-TEE as the default BL32 for STMicroelectronics platforms.
SP_MIN is no more supported in STMicroelectronics software [1].
It will then no more receive new features, but should still remain
as it is in the TF-A code.
[1]: https://wiki.st.com/stm32mpu/wiki/STM32_MPU_OpenSTLinux_release_note_-_v5.0.0#TF-A
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Change-Id: Ic49338dbba3fdcebcb1e477e6a1dbde32783482b
Due to embedded SRAM used to load BL2 and BL31 or BL32 has a limited
size, only one storage device or serial device flag should be selected
in TF-A build command line for ST platforms.
This is in line with STMicroelectionics recommendation [1] about those
compilation flags.
[1]: https://wiki.st.com/stm32mpu/wiki/How_to_configure_TF-A_BL2#Build_command_details
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Change-Id: I6f6ab17d45d00289989a606d15c143e5710c64ce
The Raspberry Pi 5 is a single-board computer based on BCM2712 that
contains four Arm Cortex-A76 cores.
This change introduces minimal BL31 support with PSCI that has been
validated to boot Linux and a private EDK2 build.
It's a drop-in replacement for the custom TF-A armstub now included in
the EEPROM images.
Change-Id: Id72a0370f54e71ac97c3daa1bacedacb7dec148f
Signed-off-by: Mario Bălănică <mariobalanica02@gmail.com>
* changes:
refactor(sgi): replace references to "SGI"/"sgi" for neoverse_rd
refactor(sgi): rename "CSS_SGI"" macro prefixes to "NRD"
refactor(sgi): move apis and types to "nrd" prefix
refactor(sgi): replace build-option prefix to "NRD"
refactor(sgi): move neoverse_rd out of css
refactor(sgi): move from "sgi" to "neoverse_rd"
feat(sgi): remove unused SGI_PLAT build-option
fix(sgi): align to misra rule for braces
feat(rde1edge): remove support for RD-E1-Edge
fix(rdn2): populate TOS_CONFIG only when SPMC_AT_EL3 is enabled
fix(board): update spi_id max for sgi multichip platforms
Updated documentation for SMC SiP calling conventions for IPI,
PM, and SiP Service queries.
Signed-off-by: Prasad Kummari <prasad.kummari@amd.com>
Change-Id: I4bd71dd8e16c7adf3f9c5cb202f36aa2e275d03a
Updated documentation for SMC SiP calling conventions for IPI,
PM, and SiP Service queries.
Signed-off-by: Prasad Kummari <prasad.kummari@amd.com>
Change-Id: Ic232551bb09152124da5226673c88e1a34a384c4
Updated documentation for SMC SiP calling conventions for IPI,
PM, and SiP Service queries.
Signed-off-by: Prasad Kummari <prasad.kummari@amd.com>
Change-Id: I8904628d41b47596257f06791bffb7cde35879de
As of now, CSS_SGI_PLATFORM_VARIANT and CSS_SGI_CHIP_COUNT are the
external build option that "sgi" platforms support. As "sgi" has been
renamed to "neoverse_rd" and the source files have been migrated out of
the css directory, replace the prefix "CSS_SGI" with "NRD".
Signed-off-by: Rohit Mathew <Rohit.Mathew@arm.com>
Change-Id: I27989ff42404d823dd2a8cd22ff485497ccb62d4
As RD-E1_Edge is no longer actively supported and has been in the
deprecated list for a while, remove its support.
Signed-off-by: Rohit Mathew <Rohit.Mathew@arm.com>
Change-Id: Iff66ad498dd99e44e2e6b79251ba2cbefbd5f3eb
Update the FVP TC2 model version and build (11.23/17) to match
the version used for testing in TF-A OpenCI.
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>
Change-Id: Ic7411ee4863428b7dfbe43cf39abfc2269f3c3ae
This model has been subsumed by the `FVP_Base` model, which is now
available publicly. We no longer have a need to test the Foundation
model, and can shave off a few minutes of CI time by removing it.
Change-Id: Iaa0f23f2efd9ba431d06c8da2be14b76f6974b0a
Signed-off-by: Chris Kay <chris.kay@arm.com>
On receiving CPU power down callback, TF-A raises SGI interrupt to all active
cores to power down each active cores. Add handler for this SGI IRQ.
By default TF-A uses SGI 6 for CPU power down request. This can be
configurable through CPU_PWRDWN_SGI build flag.
e.g., If user wants to use SGI 7 instead of SGI 6 then provide build
flag CPU_PWRDWN_SGI=7
Signed-off-by: Jay Buddhabhatti <jay.buddhabhatti@amd.com>
Change-Id: Id0df32187d1de3f0af4486eb4d4930cb3ab01dbd
Add information about Versal platform for ERRATA_ABI_SUPPORT and
provide the build commands.
Signed-off-by: Prasad Kummari <prasad.kummari@amd.com>
Change-Id: I8466ea446814f888ae56f5cbb7bbdc06099d54f8
Arm has made the strategic decision to deprecate the TC1 platform.
Consequently, software development and the creation of fast models
for the TC1 platform have been officially discontinued.
The TC1 platform, now considered obsolete, has been succeeded by
the TC2 platform. It's noteworthy that the TC2 platform is already
integrated and supported in both TF-A and CI repositories.
Change-Id: Ia196a5fc975b4dbf3c913333daf595199968d95d
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>
This change updates the model versions that we claim to be testing with
to reflect what the reality in the CI.
Change-Id: Ieb44f3f21cd0ba7149d47f7688698831c9eab487
Signed-off-by: Chris Kay <chris.kay@arm.com>
CryptoCell-712 and CryptoCell-713 drivers have been deprecated since
TF-A v2.9 and their removal was announced for TF-A v2.10 release.
See [1].
As the release is approaching, this patch deletes these drivers' code as
well as all references to them in the documentation and Arm platforms
code (Nuvoton platform is taken care in a subsequent patch). Associated
build options (ARM_CRYPTOCELL_INTEG and PLAT_CRYPTOCELL_BASE) have also
been removed and thus will have no effect if defined.
This is a breaking change for downstream platforms which use these
drivers.
[1] https://trustedfirmware-a.readthedocs.io/en/v2.9/about/release-information.html#removal-of-deprecated-drivers
Note that TF-A v3.0 release later got renumbered into v2.10.
Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>
Change-Id: Idabbc9115f6732ac1a0e52b273d3380677a39813
Add information about Versal NET platform for TSP and provide
the build commands.
Change-Id: Id7c9d75f8a42813ca2bfd18494bfc6b73df0af52
Signed-off-by: Prasad Kummari <prasad.kummari@amd.com>
Add information about Versal platform for TSP and provide
the build commands.
Change-Id: I7106ab477a881c58e1c45863bd6854d188982282
Signed-off-by: Prasad Kummari <prasad.kummari@amd.com>
Updated the 'Deprecated Platforms' table to reflect that the
deletion of sgi575 and rdn1Edge is still unconfirmed.
Change-Id: Ie8e8af55a735f624f5ee604d75bb497d870620cd
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>
Update version and release schedule for the upcoming TF-A
release v2.10.
Signed-off-by: Olivier Deprez <olivier.deprez@arm.com>
Change-Id: I505fbb034a74ce1cc6bc20efdd26803e6fb8c0c1
Revise the AST2700 boot flow to the RESET_TO_BL31 scheme.
The execution of BL1/2 can be saved from ARM CA35 while most
low level platform initialization are moved to a preceding MCU.
This patch updates the build configuration and also adds
the SMP mailbox setup code to hold secondary cores until
they are being waken up.
Signed-off-by: Chia-Wei Wang <chiawei_wang@aspeedtech.com>
Change-Id: I7e0aa6416b92b97036153db1d9a26baaa41b7b18
MULTI_CONSOLE_API have been removed long time ago by commit 5b6ebeec9c
("Remove MULTI_CONSOLE_API flag and references to it") that's why remove
references in platform.mk files and also in one rst which is not valid
anymore.
Change-Id: I45f8e7db0a14ce63de62509100d8159b7aca2657
Signed-off-by: Michal Simek <michal.simek@amd.com>
STM32MP2x is a new family of microprocessors designed by
STMicroelectronics and based on Arm Cortex-A35.
Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
Change-Id: I741ed0a701a614817a4d0b65d3d6f4e6a79da6a9
In order to ease introduction of new STM32 MPUs platforms, a dedicated
ST sub-menu (and directory) is created.
The old page is kept, but with an orphan parameter to avoid build
issues with the docs, and to avoid listing it in the menu. It is
updated to just have links with the new pages.
A new page STM32 MPUs is created to group common options for all STM32
MPUs.
Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
Change-Id: I799b57967d76a985835c7a3d9d6ab21beb44ba40
Move documentation related to Arm(R) Ethos(TM)-N NPU driver from
docs/plat/arm/arm-build-options.rst to
docs/getting_started/build-options.rst.
Signed-off-by: Rajasekaran Kalidoss <rajasekaran.kalidoss@arm.com>
Change-Id: I388e8dcd3950b11bc3305f5e6396ee2e49c04493
Document the new platform build options for the MSM8916 port which now
supports multiple similar Qualcomm SoCs:
- Snapdragon 410 (PLAT=msm8916) as before
- Snapdragon 615 (PLAT=msm8939)
- Snapdragon 210 (PLAT=msm8909)
- Snapdragon X5 Modem (PLAT=mdm9607)
The latter two use AArch32-only ARM Cortex-A7 cores that only support
using BL32/SP_MIN and not BL31 on AArch64.
Change-Id: I9fffe60dd0ad2acc18f006f11e91854b9e8dcb8f
Signed-off-by: Stephan Gerhold <stephan@gerhold.net>
