Boyan Karatotev bb801857ea feat(cpus): add sysreg_bit_toggle ... Introduce a new helper to toggle bits in assembly. This allows us to call the workaround twice, with the first call setting the workaround and second undoing it. This allows the (errata) workaround functions to be used to both apply and undo the mitigation. This is applied to functions where the undo part will be required in follow-up patches. Change-Id: I058bad58f5949b2d5fe058101410e33b6be1b8ba Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com>		2025-02-03 07:37:58 +00:00
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a64fx.S	refactor(cpus): remove cpu specific errata funcs	2024-07-26 11:19:52 +01:00
aem_generic.S	refactor(cpus): remove cpu specific errata funcs	2024-07-26 11:19:52 +01:00
cortex_a35.S	refactor(cpus): remove cpu specific errata funcs	2024-07-26 11:19:52 +01:00
cortex_a53.S	refactor(cpus): remove cpu specific errata funcs	2024-07-26 11:19:52 +01:00
cortex_a55.S	refactor(cpus): remove cpu specific errata funcs	2024-07-26 11:19:52 +01:00
cortex_a57.S	chore(cpus): optimise runtime errata applications	2024-10-16 13:59:57 +01:00
cortex_a65.S	refactor(cpus): remove cpu specific errata funcs	2024-07-26 11:19:52 +01:00
cortex_a65ae.S	refactor(cpus): remove cpu specific errata funcs	2024-07-26 11:19:52 +01:00
cortex_a72.S	refactor(cpus): remove cpu specific errata funcs	2024-07-26 11:19:52 +01:00
cortex_a73.S	refactor(cpus): remove cpu specific errata funcs	2024-07-26 11:19:52 +01:00
cortex_a75.S	fix(cpus): modify the fix for Cortex-A75 erratum 764081	2024-10-03 10:07:47 -05:00
cortex_a75_pubsub.c	chore: update to use Arm word across TF-A	2023-08-08 15:12:30 +01:00
cortex_a76.S	chore(cpus): optimise runtime errata applications	2024-10-16 13:59:57 +01:00
cortex_a76ae.S	refactor(cpus): remove cpu specific errata funcs	2024-07-26 11:19:52 +01:00
cortex_a77.S	fix(cpus): workaround for CVE-2024-5660 for Cortex-A77	2024-12-17 10:28:09 -06:00
cortex_a78.S	fix(cpus): workaround for CVE-2024-5660 for Cortex-A78	2024-12-17 10:28:09 -06:00
cortex_a78_ae.S	fix(cpus): workaround for CVE-2024-5660 for Cortex-A78_AE	2024-12-17 10:28:09 -06:00
cortex_a78c.S	fix(cpus): workaround for CVE-2024-5660 for Cortex-A78C	2024-12-17 10:28:09 -06:00
cortex_a510.S	refactor(cpus): remove cpu specific errata funcs	2024-07-26 11:19:52 +01:00
cortex_a520.S	Merge changes from topic "clean-up-errata-compatibility" into integration	2024-08-27 16:23:58 +02:00
cortex_a710.S	feat(cpus): add sysreg_bit_toggle	2025-02-03 07:37:58 +00:00
cortex_a715.S	refactor(cpus): remove cpu specific errata funcs	2024-07-26 11:19:52 +01:00
cortex_a720.S	Merge changes from topic "clean-up-errata-compatibility" into integration	2024-08-27 16:23:58 +02:00
cortex_a720_ae.S	feat(cpus): add support for cortex-a720ae	2024-10-21 15:20:34 +01:00
cortex_a725.S	refactor(cpus): remove cpu specific errata funcs	2024-07-26 11:19:52 +01:00
cortex_alto.S	feat(cpus): add support for Alto CPU	2024-12-05 16:22:29 +01:00
cortex_arcadia.S	feat(cpus): add support for arcadia cpu	2024-10-17 09:34:03 -05:00
cortex_gelas.S	feat(cpus): add sysreg_bit_toggle	2025-02-03 07:37:58 +00:00
cortex_x1.S	fix(cpus): workaround for CVE-2024-5660 for Cortex-X1	2024-12-17 10:28:09 -06:00
cortex_x2.S	fix(cpus): workaround for CVE-2024-5660 for Cortex-X2	2024-12-17 10:28:09 -06:00
cortex_x3.S	feat(cpus): add sysreg_bit_toggle	2025-02-03 07:37:58 +00:00
cortex_x4.S	fix(security): apply SMCCC_ARCH_WORKAROUND_4 to affected cpus	2025-01-30 16:45:35 -06:00
cortex_x925.S	fix(security): apply SMCCC_ARCH_WORKAROUND_4 to affected cpus	2025-01-30 16:45:35 -06:00
cpu_helpers.S	fix(security): apply SMCCC_ARCH_WORKAROUND_4 to affected cpus	2025-01-30 16:45:35 -06:00
cpuamu.c	Sanitise includes across codebase	2019-01-04 10:43:17 +00:00
cpuamu_helpers.S	chore: update to use Arm word across TF-A	2023-08-08 15:12:30 +01:00
denver.S	refactor(cpus): remove cpu specific errata funcs	2024-07-26 11:19:52 +01:00
dsu_helpers.S	feat(rockchip): add RK3566/RK3568 Socs support	2024-06-07 11:59:46 +02:00
generic.S	refactor(cpus): remove cpu specific errata funcs	2024-07-26 11:19:52 +01:00
neoverse_e1.S	refactor(cpus): remove cpu specific errata funcs	2024-07-26 11:19:52 +01:00
neoverse_n1.S	chore(cpus): optimise runtime errata applications	2024-10-16 13:59:57 +01:00
neoverse_n1_pubsub.c	chore: update to use Arm word across TF-A	2023-08-08 15:12:30 +01:00
neoverse_n2.S	feat(cpus): add sysreg_bit_toggle	2025-02-03 07:37:58 +00:00
neoverse_n3.S	refactor(cpus): remove cpu specific errata funcs	2024-07-26 11:19:52 +01:00
neoverse_n_common.S	Add support for Neoverse-N2 CPUs.	2020-11-30 19:12:56 +00:00
neoverse_v1.S	fix(cpus): workaround for CVE-2024-5660 for Neoverse-V1	2024-12-17 10:28:09 -06:00
neoverse_v2.S	fix(security): apply SMCCC_ARCH_WORKAROUND_4 to affected cpus	2025-01-30 16:45:35 -06:00
neoverse_v3.S	fix(security): apply SMCCC_ARCH_WORKAROUND_4 to affected cpus	2025-01-30 16:45:35 -06:00
nevis.S	refactor(cpus): remove cpu specific errata funcs	2024-07-26 11:19:52 +01:00
qemu_max.S	refactor(cpus): remove cpu specific errata funcs	2024-07-26 11:19:52 +01:00
rainier.S	refactor(cpus): remove cpu specific errata funcs	2024-07-26 11:19:52 +01:00
travis.S	feat(cpus): add sysreg_bit_toggle	2025-02-03 07:37:58 +00:00
wa_cve_2017_5715_bpiall.S	chore: update to use Arm word across TF-A	2023-08-08 15:12:30 +01:00
wa_cve_2017_5715_mmu.S	chore: update to use Arm word across TF-A	2023-08-08 15:12:30 +01:00
wa_cve_2022_23960_bhb.S	chore: update to use Arm word across TF-A	2023-08-08 15:12:30 +01:00
wa_cve_2022_23960_bhb_vector.S	fix(security): workaround for CVE-2022-23960	2022-03-10 23:57:14 -06:00