This corrects the MISRA violation C2012-15.6:
The body of an iteration-statement or a selection-statement shall
be a compound-statement.
Enclosed statement body within the curly braces.
Change-Id: I7c1474a2aa5c940433b88be75c88b4ffa5833b57
Signed-off-by: Nithin G <nithing@amd.com>
Signed-off-by: Maheedhar Bollapalli <maheedharsai.bollapalli@amd.com>
This corrects the MISRA violation C2012-15.6:
The body of an iteration-statement or a selection-statement shall
be a compound-statement.
Enclosed statement body within the curly braces.
Change-Id: If8e77b291380fa7d9d95cab5836235790404b620
Signed-off-by: Nithin G <nithing@amd.com>
Signed-off-by: Maheedhar Bollapalli <maheedharsai.bollapalli@amd.com>
This corrects the MISRA violation C2012-15.6:
The body of an iteration-statement or a selection-statement shall
be a compound-statement.
Enclosed statement body within the curly braces.
Change-Id: I66f957467bdee13052847f3e8c5ad6ae258c4222
Signed-off-by: Nithin G <nithing@amd.com>
Signed-off-by: Maheedhar Bollapalli <maheedharsai.bollapalli@amd.com>
This corrects the MISRA violation C2012-15.6:
The body of an iteration-statement or a selection-statement shall
be a compound-statement.
Enclosed statement body within the curly braces.
Change-Id: I934b0f5c3b2500940054360611a035fcefa6a690
Signed-off-by: Nithin G <nithing@amd.com>
Signed-off-by: Maheedhar Bollapalli <maheedharsai.bollapalli@amd.com>
This corrects the MISRA violation C2012-15.6:
The body of an iteration-statement or a selection-statement shall
be a compound-statement.
Enclosed statement body within the curly braces.
Change-Id: I1327a206782ccd341c0c7eaa3f26078150458ed0
Signed-off-by: Nithin G <nithing@amd.com>
Signed-off-by: Maheedhar Bollapalli <maheedharsai.bollapalli@amd.com>
* changes:
feat(ras): add eabort get helper function
feat(ras): add asynchronous error type corrected
fix(ras): fix typo in uncorrectable error type UEO
fix(ras): fix status synchronous error type fields
Add EABORT get field helper function to obtain SET, AET (UET) values
from esr_el3/disr_el1 based on PE error state recording in the exception
syndrome refer to RAS PE architecture in
https://developer.arm.com/documentation/ddi0487/latest/
Change-Id: I0011f041a3089c9bbf670275687ad7c3362a07f9
Signed-off-by: Vinoj Soundararajan <vinojs@google.com>
Add asynchronous error type Corrected (CE) to error status
AET based on PE error state recording in the exception syndrome
Refer to https://developer.arm.com/documentation/ddi0487/latest/
RAS PE architecture.
Change-Id: I9f2525411b94c8fd397b4a0b8cf5dc47457a2771
Signed-off-by: Vinoj Soundararajan <vinojs@google.com>
Fix spelling for UEO from restable to restartable
based on PE error state recording in the exception syndrome
Refer to https://developer.arm.com/documentation/ddi0487/latest/
RAS PE architecture.
Change-Id: I4da419f2120a7385853d4da78b409c675cdfe1c8
Signed-off-by: Vinoj Soundararajan <vinojs@google.com>
Based on SET bits of ISS encoding for an exception from Data or
Instruction Abort. (Refer to ESR_EL3)
1. Fix Synchronous error type restartable value from 1 to 3
2. Remove corrected CE field which is not applicable to SET
Change-Id: If357da9881bee962825bc3b9423ba7fc107f9b1d
Signed-off-by: Vinoj Soundararajan <vinojs@google.com>
* changes:
fix(build): run sp_mk_gen.py with poetry
feat(sptool): add StMM memory region descriptor
feat(sptool): specify endianness for HOB bin
feat(fvp): increase cactus-tertiary size
feat(sptool): include HOB file in the TL pkg
feat(sptool): invoke the HOB list creation code
feat(sptool): add the HOB list creation script
chore: add fdt dependencies to poetry
If Poetry is available in the build environment, use Poetry when
running sp_mk_gen.py script. This ensures dependencies that are needed
to run the script are accounted for.
Needed to successfully run the following config:
spm-l2-boot-tests/fvp-default,fvp-spm-optee-sp,fvp-default: \
fvp-spm.optee.sp
Change-Id: Icca4249dab929f1bcf5f4454d472cf6923e3ee17
Signed-off-by: Kathleen Capella <kathleen.capella@arm.com>
StandaloneMM partition requires that the first memory region in its list
of reserved memory regions describe the full partition layout. Hafnium
SPMC checks that memory regions in FF-A manifest do not overlap.
Therefore, this region is added directly in HOB generation code rather
than as a memory region in the FF-A manifest for the StMM partition.
Signed-off-by: Kathleen Capella <kathleen.capella@arm.com>
Change-Id: Ia22174d755a5776e20ecf9639584f3c08cf9e60e
Specify endianness encoding when packing HOB binary. Little-endian is
used as target platforms are expected to be little-endian.
Signed-off-by: Kathleen Capella <kathleen.capella@arm.com>
Change-Id: I28d7b302f79482ed142c1964409c310f713a9b8c
Increase the size of cactus-tertiary partition to match update in
manifest. Part of effort to use cactus-tertiary partition in StMM/HOB
testing.
Dependent on
https://review.trustedfirmware.org/c/TF-A/tf-a-tests/+/35383
Signed-off-by: Kathleen Capella <kathleen.capella@arm.com>
Signed-off-by: J-Alves <joao.alves@arm.com>
Change-Id: I5b91400848e2cf5d04d1c7442874a7a4b9847399
If the "hob_path" has been introduced in the `args`
dictionary, use it when creating a Transfer List
type of package.
Create a HOB entry in the transfer list with the
respective transfer entry type.
Signed-off-by: Kathleen Capella <kathleen.capella@arm.com>
Signed-off-by: J-Alves <joao.alves@arm.com>
Change-Id: Ie5fefe90205cf89ee26c3683048bf42229cb4bee
Add an SP setup function that invokes the HOB creation
utilities.
It introduces an argument "hob_path" to the shared dictionary of args
with the location of the generated binary containing the HOB list.
Signed-off-by: Kathleen Capella <kathleen.capella@arm.com>
Signed-off-by: J-Alves <joao.alves@arm.com>
Change-Id: I26a07027b6344c9d7ba732d022932736a62e2505
Add python library to build the Handoff Block list (HOB list) for an SP
at build time.
Signed-off-by: Kathleen Capella <kathleen.capella@arm.com>
Change-Id: I17d46f7ed21ce42a83f33dfdc4fad038653d1ec3
The FDT python dependency is needed for the script:
`sp_mk_generator.py'.
It is used to obtain information from DT files.
Signed-off-by: J-Alves <joao.alves@arm.com>
Change-Id: Id98b93f8ab77d4864dd392fdb70bfd932b78c246
The `memmap` build system target was recently migrated over to an
independent Poetry project, but its build system target was not updated
to install its dependencies.
Change-Id: If46e2a4609d47467cac07426c1cde65e2e0944cb
Signed-off-by: Chris Kay <chris.kay@arm.com>
* changes:
feat(fvp): set defaults for build commandline
docs(arm): enable Linux boot from fip as BL33
feat(arm): enable Linux boot from fip as BL33
docs(fvp): update fvp build time options
docs(arm): add initrd props to dtb at build time
feat(arm): add initrd props to dtb at build time
The function got renamed to pwr_domain_pwr_down() but have a reference
to it for anyone wondering where it went.
Change-Id: Ica5fa11b9f18a7446c188e37b9f1d5508f4cf749
Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com>
When using ARM_LINUX_KERNEL_AS_BL33, set defaults for the below for
increased build time efficiency:
PRELOADED_BL33_BASE=0x80080000
This address supports older kernels before v5.7
ARM_PRELOADED_DTB_BASE=0x87F00000 (only in RESET_TO_BL31)
1MiB before the address 0x88000000 in FVP. 1MiB seems enough for the
device tree blob (DTB).
Change-Id: I0396b597485e163b43f7c6677c04fcc08db55aa8
Signed-off-by: Salman Nabi <salman.nabi@arm.com>
Document additional functionality of TF-A to package the Linux kernel in
the fip image as a BL33 and boot it. A ramdisk is used as a file system.
The ramdisk properties are injected in to the device tree at build time.
Change-Id: I326f920fdac4bd20572f6f0da07d012def114274
Signed-off-by: Salman Nabi <salman.nabi@arm.com>
Disable the reliance of ARM_LINUX_KERNEL_AS_BL33 on PRELOADED_BL33_BASE
so that a Linux Kernel can be loaded and booted from the fip as BL33.
Change-Id: I0437eec852cf17e0ed37a7ff77fcc4e66b1cea7a
Signed-off-by: Salman Nabi <salman.nabi@arm.com>
Add new fvp specific build time options. Specifically the below:
- INITRD_SIZE
- INITRD_PATH
- INITRD_BASE
Change-Id: Ieadf01fce7a0a0a8e9e7582d7b7e371b247207c2
Signed-off-by: Salman Nabi <salman.nabi@arm.com>
Document the ability of the FVP platform to boot a Linux Kernel as a
preloaded image. A preloaded Linux Kernel can be booted in a normal
flow as well as in RESET_TO_BL31. This is made possible by updating
the device tree with initrd properties at build time.
Change-Id: I4e1d8c24f82510d21b2afa06b429a18da4d623bd
Signed-off-by: Salman Nabi <salman.nabi@arm.com>
Add initrd properties to the device tree blob at build time, giving
users the ability to run a linux kernel and successfully boot it to
the terminal. Users can boot a linux kernel in a normal flow as well
as in RESET_TO_BL31. This function is an extension of the build time
option "ARM_LINUX_KERNEL_AS_BL33=1".
The build time options INITRD_SIZE or INITRD_PATH will trigger the
insertion of initrd properties in to the DTB. If both options are
provided then the INITRD_SIZE will take precedence.
The available options are:
INITRD_SIZE: Provide the initrd size in dec or hex (hex format must
precede with '0x'.
Example: INITRD_SIZE=0x1000000
INITRD_PATH: Provide an initrd path for the build time to find its
exact size.
INITRD_BASE: A required build time option that sets the initrd base
address in hex format. A default value can be set by the platform.
Example: INITRD_BASE=0x90000000
Change-Id: Ief8de5f00c453509bcc6e978e0a95d768f1f509c
Signed-off-by: Salman Nabi <salman.nabi@arm.com>
ESR_EL3 value is updated when an exception is taken to EL3 and its value
does not change until a new exception is taken to EL3. We need to save
ESR in context memory only when we expect nested exception in EL3.
The scenarios where we would expect nested EL3 execution are related
with FFH_SUPPORT, namely
1.Handling pending async EAs at EL3 boundry
- It uses CTX_SAVED_ESR_EL3 to preserve origins esr_el3
2.Double fault handling
- Introduce an explicit storage (CTX_DOUBLE_FAULT_ESR) for esr_el3
to take care of DobuleFault.
As the ESR context has been removed, read the register directly instead
of its context value in RD platform.
Signed-off-by: Manish Pandey <manish.pandey2@arm.com>
Change-Id: I7720c5f03903f894a77413a235e3cc05c86f9c17
This patch replaces the for loops to sero individual tables or entries
in the translation table context with zeromem to improve the boot time.
On Tegra platforms, this patch has proved to save 10ms during boot.
Signed-off-by: Bhavesh Parekh <bparekh@nvidia.com>
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Change-Id: Iea9fb2c18ae7a1aef4fe42c4151a321fb3f8660e
* changes:
feat(drtm): retrieve DLME image authentication features
feat(drtm): log No-Action Event in Event Log for DRTM measurements
feat(fvp): add stub function to retrieve DLME image auth features
feat(drtm): introduce plat API for DLME authentication features
feat(drtm): ensure event types aligns with DRTM specification v1.1
fix(drtm): add missing DLME data regions for min size requirement
feat(fvp): add stub platform function to get ACPI table region size
feat(drtm): add platform API to retrieve ACPI tables region size
This change refactors the memmap tool into a Poetry project, with its
own dependencies. You can continue to run it manually with:
poetry run memory <args>
Change-Id: I346283df1b8bfad4babc1f5a3861dab94d4a006a
Signed-off-by: Chris Kay <chris.kay@arm.com>
`CTX_INCLUDE_SVE_REGS` should not be enabled when building with
SPD=spmd and SPMD_SPM_AT_SEL2=1 both been used.
Unfortunately a check at top level makefile ignored this, now its been
fixed at top level makefile. Ensure correct combination are handled,
otherwise it will lead to build failures.
Change-Id: Ib84fc0096c92d9b3d56366c0e1d77b6d83098221
Signed-off-by: Govindraj Raja <govindraj.raja@arm.com>
Currently the top level Makefile checks any invalid SPD build flags
before parsing platform makefile thus any invalid combination enabled
in platform makefile will go unnoticed.
Move handling of all invalid SPD build option checks after platform level makefile is parsed.
Change-Id: Ib3b384ca99403ebaf34f6ce662c93480827e2136
Signed-off-by: Govindraj Raja <govindraj.raja@arm.com>
