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fix(rdv3): handle invalid build combination
`CTX_INCLUDE_SVE_REGS` should not be enabled when building with SPD=spmd and SPMD_SPM_AT_SEL2=1 both been used. Unfortunately a check at top level makefile ignored this, now its been fixed at top level makefile. Ensure correct combination are handled, otherwise it will lead to build failures. Change-Id: Ib84fc0096c92d9b3d56366c0e1d77b6d83098221 Signed-off-by: Govindraj Raja <govindraj.raja@arm.com>
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1 changed files with 12 additions and 2 deletions
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@ -144,7 +144,7 @@ FDT_SOURCES += ${RDV3_BASE}/fdts/${PLAT}_fw_config.dts \
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${RDV3_BASE}/fdts/${PLAT}_nt_fw_config.dts
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ifeq (${SPMD_SPM_AT_SEL2}, 1)
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BL32_CONFIG_DTS := ${RDV3_BASE}/fdts/${PLAT}_spmc_sp_manifest.dts
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BL32_CONFIG_DTS := ${RDV3_BASE}/fdts/${PLAT}_spmc_sp_manifest.dts
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FDT_SOURCES += ${BL32_CONFIG_DTS}
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TOS_FW_CONFIG := ${BUILD_PLAT}/fdts/$(notdir $(basename ${BL32_CONFIG_DTS})).dtb
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endif
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@ -169,4 +169,14 @@ override ENABLE_FEAT_MTE2 := 2
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# FEAT_SVE related flags
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override SVE_VECTOR_LEN := 128
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override CTX_INCLUDE_SVE_REGS := 1
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override CTX_INCLUDE_SVE_REGS := 1
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# Enabling CTX_INCLUDE_SVE_REGS along with SPMD_SPM_AT_SEL2=1 is a invalid
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# combination and will lead to build failure, use them only when SPMD_SPM_AT_SEL2=0
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# In this combination its SPMC responsbility to save SVE regs.
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ifeq (${SPD},spmd)
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ifeq (${SPMD_SPM_AT_SEL2},1)
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override CTX_INCLUDE_SVE_REGS := 0
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endif
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endif
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