Merge changes Ie8c83c92,I9cca19fd into integration

* changes:
  feat(stm32mp2): disable PIE by default on STM32MP2 platform
  refactor(stm32mp2): remove useless STM32MP_SEC_SYSRAM_SIZE
This commit is contained in:
Govindraj Raja 2025-02-27 16:10:04 +01:00 committed by TrustedFirmware Code Review
commit 9da0ba8e83
3 changed files with 16 additions and 10 deletions

View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 2023-2024, STMicroelectronics - All Rights Reserved
* Copyright (c) 2023-2025, STMicroelectronics - All Rights Reserved
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@ -73,8 +73,15 @@
/*******************************************************************************
* BL31 specific defines.
******************************************************************************/
#if ENABLE_PIE
#define BL31_BASE 0
#define BL31_LIMIT (STM32MP_SEC_SYSRAM_SIZE / 2)
#else
#define BL31_BASE STM32MP_SYSRAM_BASE
#endif
#define BL31_LIMIT (BL31_BASE + (STM32MP_SYSRAM_SIZE / 2))
#define BL31_PROGBITS_LIMIT (BL31_BASE + STM32MP_BL31_SIZE)
/*******************************************************************************
* BL33 specific defines.

View file

@ -1,5 +1,5 @@
#
# Copyright (c) 2023-2024, STMicroelectronics - All Rights Reserved
# Copyright (c) 2023-2025, STMicroelectronics - All Rights Reserved
#
# SPDX-License-Identifier: BSD-3-Clause
#
@ -11,9 +11,12 @@ STM32_EXTRA_PARTS := 6
include plat/st/common/common.mk
CRASH_REPORTING := 1
ENABLE_PIE := 1
# Disable PIE by default. To re-enable it, uncomment next line.
#ENABLE_PIE := 1
PROGRAMMABLE_RESET_ADDRESS := 1
ifeq ($(ENABLE_PIE),1)
BL2_IN_XIP_MEM := 1
endif
STM32MP_BL33_EL1 ?= 1
ifeq ($(STM32MP_BL33_EL1),1)

View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 2023-2024, STMicroelectronics - All Rights Reserved
* Copyright (c) 2023-2025, STMicroelectronics - All Rights Reserved
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@ -76,8 +76,6 @@
#define RETRAM_BASE U(0x0E080000)
#define RETRAM_SIZE U(0x00020000)
#define STM32MP_SEC_SYSRAM_SIZE STM32MP_SYSRAM_SIZE
/* DDR configuration */
#define STM32MP_DDR_BASE U(0x80000000)
#define STM32MP_DDR_MAX_SIZE UL(0x100000000) /* Max 4GB */
@ -113,11 +111,9 @@ enum ddr_type {
#define STM32MP_BL2_SIZE U(0x00029000) /* 164 KB for BL2 */
/* Allocate remaining sysram to BL31 Binary only */
#define STM32MP_BL31_SIZE (STM32MP_SEC_SYSRAM_SIZE - \
#define STM32MP_BL31_SIZE (STM32MP_SYSRAM_SIZE - \
STM32MP_BL2_SIZE)
#define BL31_PROGBITS_LIMIT STM32MP_BL31_SIZE
#define STM32MP_BL2_BASE (STM32MP_SYSRAM_BASE + \
STM32MP_SYSRAM_SIZE - \
STM32MP_BL2_SIZE)