Continuing the refactoring of the various definitions for the first
generation of platforms (A75/N1/V1), refactor the definitions in the
nrd_soc_platform_def.h file into the following files as appropriate.
- nrd_ros_def1.h: includes RoS hardware related definitions
- nrd_ros_fw_def1.h: includes RoS firmware related definitions
- nrd_plat_arm_def1.h: includes platform port related definitions
RoS (Rest Of System) is used to refer to the part of the reference
design platform that excludes CSS.
The file inclusions in the platform_def.h file of the platforms have
been updated accordingly.
Signed-off-by: Rohit Mathew <rohit.mathew@arm.com>
Change-Id: I081d2a225a32c15f65d8d86f81104ba12d284406
The nrd_base_platform_def.h file includes CSS, RoS, firmware and
platform port related definitions. This approach of consolidating the
various definitions for multiple generation of platforms into the
nrd_base_platform_def.h file is not scaling well.
So in preparation of moving away from the use of nrd_base_platform_def.h
file for first generation of reference design platforms (A75/N1/V1),
split the definitions in this file into multiple include files. The new
files into which the definitions are refactored are -
- nrd_css_def1.h: includes CSS hardware related definitions
- nrd_css_fw_def1.h: includes CSS firmware related definitions
- nrd_ros_fw_def1.h: includes RoS firmware related definitions
- nrd_plat_arm_def1.h: includes platform port related definitions
RoS (Rest Of System) is used to refer to the part of the reference
design platform that excludes CSS.
The definitions that are only relavant to the first generation of
reference design platforms have been refactored from the
nrd_base_platform_def.h file.
Signed-off-by: Rohit Mathew <rohit.mathew@arm.com>
Change-Id: Ie730d913235221488c385f9ddf1da46a2b760816
The platform_def.h file includes the nrd_base_platform_def.h file in its
hierarchy of file inclusions. So the source files that include
platform_def.h file do not have to include the nrd_base_platform_def.h
file. So remove such explicit inclusion of nrd_base_platform_def.h from
the source files. The scope of this change is limited to only the first
generation of the reference design platforms, that is, the A75, N1 and
V1 based platforms.
Signed-off-by: Rohit Mathew <rohit.mathew@arm.com>
Change-Id: I088b9f0ccfd9f94b5bb3c8ed91c23e8994484c7c
Presently, platforms such as SGI-575, RD-N1-Edge single and dual chip,
RD_V1 single and multi-chip utilize nrd_soc_platform_def.h and
nrd_soc_css_def.h for all css and soc-related defines. So move these
two header files into a new directory named 'nrd1'. This new directory
will serve as the container of header files that are specific to
SGI-575, RD-N1 and RD-V1 platform and its variants.
Signed-off-by: Rohit Mathew <rohit.mathew@arm.com>
Change-Id: I9d70659c6f5000ad6c1cfc0738f9e81f03238f5f
As sgi has migrated to neoverse_rd, the scope variables would need
update. Therefore, remove the deprecated 'sgi' scope variable and
introduce the new scope variable 'neoverse-rd' to be used for any common
platform changes associated with Neoverse Reference Design platforms.
Change-Id: I5052e4573bdc7df3e6f4257146d716edd2585452
Signed-off-by: Rohit Mathew <rohit.mathew@arm.com>
* changes:
docs(maintainers): add missing ST files
docs(maintainers): add Maxime as co-maintainer for ST platforms
docs(maintainers): update ST platform ports title
docs(maintainers): sort github aliases
Replace ERROR message with EARLY_ERROR for OTP driver probe, as this
will be called before default console is enabled.
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Change-Id: I756a04727c494d5f681a45d47d01189dff07dbe7
Replace trace macros with their corresponding EARLY_* macros.
Add some early traces in bsec2 driver.
Change-Id: I65e2feee6e7ba2524fb0a334557aa6e883672765
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Now that EARLY_CONSOLE is generic, use it instead of the ST flag.
Remove stm32mp_setup_early_console() calls as it is done in common TF-A
code.
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Change-Id: Icac29b62a6267303cb5c679d15847c013ead1d23
This is a generic porting of what was done on ST platforms with flag
STM32MP_EARLY_CONSOLE. It creates the flag and the prototype for
plat_setup_early_console(). This function depends on platform
implementation. This function call is added at the beginning of each BL
image early setup function.
The patch also introduce an extra log macro: EARLY_ERROR. This can
replace ERROR macro in code that will only be executed before the
default console is enabled, and will do nothing when the EARLY_CONSOLE
is not enabled. This can then save some space in memory.
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Change-Id: I77bf0a0c4289b4c7df94e4bfb783a938e05bf023
This new C function will call sp_min_early_platform_setup2() and
sp_min_plat_arch_setup(). At this step the C environment is already
enabled, and it allows adding function like the one for early console
for which r9-r12 registers could be clobbered.
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Change-Id: I4cbf2f6acea769d595ff40b2e2b4ca5d29672878
The ordering of the setup guide is quite confusing, primarly because the
min requirements section is overly verbose. Reconcile this information
into a single table, and present the most important information at the
start of the document i.e. how to get the source, and the tools to
compile.
Change-Id: I1c4d708259e152b101c7282dad19e467d6c36519
Signed-off-by: Harrison Mutai <harrison.mutai@arm.com>
Cortex-X4 erratum 2763018 is a Cat B erratum that is present
in revisions r0p0, r0p1 and is fixed in r0p2.
The workaround is to set bit[47] of CPUACTLR3_EL1 register.
Setting this chicken bit might have a small impact on power
and negligible impact on performance.
SDEN documentation:
https://developer.arm.com/documentation/SDEN2432808/latest
Change-Id: Ia188e08c2eb2952923ec72e2a56efdeea836fe1e
Signed-off-by: Sona Mathew <sonarebecca.mathew@arm.com>
When loading OPTEE via an SMC after we start Linux, we end up changing
the interrupt settings which is a violation of the Linux kernel's
policies. This change sets the interrupt handler before we proceed to
starting the kernel and ignores any incoming interrupts that occur
before OPTEE is loaded.
Signed-off-by: Jeffrey Kardatzke<jkardatzke@google.com>
Change-Id: I7da5334498e14f4a703e8cc3eeff386e3ecc0882
Update the RMM manifest to v0.3: pass the console information to RMM.
Signed-off-by: Jean-Philippe Brucker <jean-philippe@linaro.org>
Change-Id: I55093cd0c12f9c6a7569d7e524f7d301acbb2a45
TC3 and TC4 SCP makes use of the system timer interrupt as its own
timer. Previously, this timer was marked as a G1S interrupt which
routes the interrupt to the secure world and also enables it. This
causes spurious interrupts once the SCP has unmasked the interrupt in
the timer control itself.
Note that we move the inclusion of the timer interrupt from
CSS_G1S_INT_PROPS to CSS_G1S_IRQ_PROPS as the former is only used by TC.
This will also result in removing the timer interrupt from TC2. This is
not an issue as it does not make use of this interrupt in either the SCP
or AP.
Change-Id: I5cc88e2adffbc93fc3c9d9d41b5ba7235dbc39d9
Signed-off-by: Jackson Cooper-Driver <jackson.cooper-driver@arm.com>
Signed-off-by: Leo Yan <leo.yan@arm.com>
From QEMU change:
> In previous versions of the Arm architecture, the frequency of the
> generic timers as reported in CNTFRQ_EL0 could be any IMPDEF value,
> and for QEMU we picked 62.5MHz, giving a timer tick period of 16ns.
> In Armv8.6, the architecture standardized this frequency to 1GHz.
This change stops TF-A from hardcoding 62.5MHz frequency. Instead value
stored in CNTFRQ_EL0 would be used. As a result we get 62.5MHz on older
cores and 1GHz on newer ones.
Change-Id: I7d414ce6d3708e598bbb5a6f79eb2d4ec8e15ac4
Signed-off-by: Marcin Juszkiewicz <marcin.juszkiewicz@linaro.org>
Add a section under release for capturing and populating
build options that are deprecated and removed.
Various fixes and refactor[1] led to removal of certain MTE
build options so capture this part in build-options docs.
[1]: https://review.trustedfirmware.org/q/topic:%22mte_fixes%22
Change-Id: I74a82f6f73f7f1dceea65a295ad2df60301ad838
Signed-off-by: Govindraj Raja <govindraj.raja@arm.com>
The system counter macros are defined duplicatedly in the header file.
As the macros must be defined before arm_def.h, this patch removes the
redundant definitions afterwards.
Change-Id: Id74a8ef1b9cec4a978366b6db69981cfc30dffb6
Signed-off-by: Leo Yan <leo.yan@arm.com>
Changes all occurrences of "RSS" and "rss" in the code and build files
to "RSE" and "rse".
Signed-off-by: Tamas Ban <tamas.ban@arm.com>
Change-Id: I66a6c87c158b14e18cba25ea6c6e0809e30008ca
Changes all occurrences of "RSS" and "rss" in the code and build files
to "RSE" and "rse".
Signed-off-by: Tamas Ban <tamas.ban@arm.com>
Change-Id: I2c6840f6f3f2f8f64595a0e0aa6e12084a37ce6e
Changes all occurrences of "RSS" and "rss" in the code and build files
to "RSE" and "rse".
Signed-off-by: Tamas Ban <tamas.ban@arm.com>
Change-Id: I36b8e498f3226fc72d21634aae2cc9328d00711d
Changes all occurrences of "RSS" and "rss" in the code and build files
to "RSE" and "rse".
Signed-off-by: Tamas Ban <tamas.ban@arm.com>
Change-Id: I8982c203375250d6c709a26f33fb88673d69da50
Changes all occurrences of "RSS" and "rss" in the code and build files
to "RSE" and "rse".
Signed-off-by: Tamas Ban <tamas.ban@arm.com>
Change-Id: I606e2663fb3719edf6372d6ffa4f1982eef45994
Changes all occurrences of "RSS" and "rss" in the code and build files
to "RSE" and "rse".
Signed-off-by: Tamas Ban <tamas.ban@arm.com>
Change-Id: Idec0bf7a90ae381f5bc968e1bb167daace24a11f
Changes all occurrences of "RSS" and "rss" in the documentation
to "RSE" and "rse".
Signed-off-by: Tamas Ban <tamas.ban@arm.com>
Change-Id: Ia42078f5faa1db331b1e5a35f01faeaf1afacb5f
Changes all occurrences of "RSS" and "rss" in the code and build files
to "RSE" and "rse".
Signed-off-by: Tamas Ban <tamas.ban@arm.com>
Change-Id: I8c2fcbdf1de1c75f9969d28bc15e0b3500071404
Changes all occurrences of "RSS" and "rss" in the code and build files
to "RSE" and "rse".
Signed-off-by: Tamas Ban <tamas.ban@arm.com>
Change-Id: I9f72ad36ec233d7eaac3ce9e2f2b010130e1fa94
Document bindings for TB_FW_CONFIG that are common between platforms.
Since the information this device tree type contains pertains to
firmware specific properties, we do not expect that the document will
cover all uses, nor do we promise backward compatiblity.
Change-Id: I0e850c13b77cc62940ab5020a15bf8e503568ed8
Signed-off-by: Harrison Mutai <harrison.mutai@arm.com>
The Arm FVP documentation has grown organically over the years. As a
result, it has become a big document, which can be difficult to digest.
Also, the organization of some of the sections does not make sense. In
particular, all "Running on the ... FVP" sections live under a section
named "Booting a preloaded kernel image (Base FVP)". To illustrate this,
here is the current table of contents:
Arm Fixed Virtual Platforms (FVP)
Fixed Virtual Platform (FVP) Support
Arm FVP Platform Specific Build Options
Booting Firmware Update images
Booting an EL3 payload
Booting a preloaded kernel image (Base FVP)
Obtaining the Flattened Device Treesp
Running on the Foundation FVP with reset to BL1 entrypoint
Running on the AEMv8 Base FVP with reset to BL1 entrypoint
Running on the AEMv8 Base FVP (AArch32) with reset to BL1 entrypoint
Running on the Cortex-A57-A53 Base FVP with reset to BL1 entrypoint
Running on the Cortex-A32 Base FVP (AArch32) with reset to BL1 entrypoint
Running on the AEMv8 Base FVP with reset to BL31 entrypoint
Running on the AEMv8 Base FVP (AArch32) with reset to SP_MIN entrypoint
Running on the Cortex-A57-A53 Base FVP with reset to BL31 entrypoint
Running on the Cortex-A32 Base FVP (AArch32) with reset to SP_MIN entrypoint
This patch breaks down this document in sub-documents, which are now
included from the index file. The table of contents (ToC) reflects the
new documents hierarchy. The depth of the ToC has been reduced to
simplify the index page. Here is what it looks like now:
Arm Fixed Virtual Platforms (FVP)
Fixed Virtual Platform (FVP) Support
Arm FVP Platform Specific Build Options
Running on the Foundation FVP
Running on the AEMv8 Base FVP
Running on the Cortex-A57-A53 Base FVP
Running on the Cortex-A32 Base FVP (AArch32)
Booting Firmware Update images
Booting an EL3 payload
Booting a preloaded kernel image (Base FVP)
Apart from moving information around in separate files, this patch also
makes the following minor changes to the contents:
- Add a brief introduction about FVPs in the index page.
- Change some of the titles names for conciseness.
Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>
Change-Id: Icb650e0ec2c7a86ccd6e7eea4e16a84c41442c96
