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GICv3: GIC-600: Detect GIC-600 at runtime
The only difference between GIC-500 and GIC-600 relevant to TF-A is the differing power management sequence. A certain GIC implementation is detectable at runtime, for instance by checking the IIDR register. Let's add that test before initiating the GIC-600 specific sequence, so the code can be used on both GIC-600 and GIC-500 chips alike, without deciding on a GIC chip at compile time. This means that the GIC-500 "driver" is now redundant. To allow minimal platform support, add a switch to disable GIC-600 support. Change-Id: I17ea97d9fb05874772ebaa13e6678b4ba3415557 Signed-off-by: Andre Przywara <andre.przywara@arm.com>
This commit is contained in:
parent
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commit
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12 changed files with 73 additions and 71 deletions
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@ -711,8 +711,10 @@ GICv3 driver files are included using directive:
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The driver can be configured with the following options set in the platform
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makefile:
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- ``GICV3_IMPL``: Selects between GIC-500 and GIC-600 variants of GICv3.
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This option can take values GIC500 and GIC600 with default set to GIC500.
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- ``GICV3_SUPPORT_GIC600``: Add support for the GIC-600 variants of GICv3.
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Enabling this option will add runtime detection support for the
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GIC-600, so is safe to select even for a GIC500 implementation.
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This option defaults to 0.
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- ``GICV3_IMPL_GIC600_MULTICHIP``: Selects GIC-600 variant with multichip
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functionality. This option defaults to 0
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@ -116,7 +116,6 @@ Arm FVP Platform Specific Build Options
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- ``FVP_USE_GIC_DRIVER`` : Selects the GIC driver to be built. Options:
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- ``FVP_GIC600`` : The GIC600 implementation of GICv3 is selected
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- ``FVP_GICV2`` : The GICv2 only driver is selected
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- ``FVP_GICV3`` : The GICv3 only driver is selected (default option)
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@ -5,8 +5,9 @@
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*/
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/*
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* Driver for GIC-600 specific features. This driver only overrides
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* APIs that are different to those generic ones in GICv3 driver.
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* Driver for GIC-500 and GIC-600 specific features. This driver only
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* overrides APIs that are different to those generic ones in GICv3
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* driver.
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*
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* GIC-600 supports independently power-gating redistributor interface.
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*/
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@ -19,7 +20,8 @@
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#include "gicv3_private.h"
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/* GIC-600 specific register offsets */
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#define GICR_PWRR 0x24
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#define GICR_PWRR 0x24
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#define IIDR_MODEL_ARM_GIC_600 0x0200043b
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/* GICR_PWRR fields */
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#define PWRR_RDPD_SHIFT 0
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@ -39,6 +41,8 @@
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#define PWRR_ON (0 << PWRR_RDPD_SHIFT)
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#define PWRR_OFF (1 << PWRR_RDPD_SHIFT)
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#if GICV3_SUPPORT_GIC600
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/* GIC-600 specific accessor functions */
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static void gicr_write_pwrr(uintptr_t base, unsigned int val)
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{
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@ -93,6 +97,29 @@ static void gic600_pwr_off(uintptr_t base)
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}
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}
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static uintptr_t get_gicr_base(unsigned int proc_num)
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{
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uintptr_t gicr_base;
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assert(gicv3_driver_data);
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assert(proc_num < gicv3_driver_data->rdistif_num);
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assert(gicv3_driver_data->rdistif_base_addrs);
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gicr_base = gicv3_driver_data->rdistif_base_addrs[proc_num];
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assert(gicr_base);
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return gicr_base;
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}
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static bool gicv3_is_gic600(uintptr_t gicr_base)
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{
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uint32_t reg = mmio_read_32(gicr_base + GICR_IIDR);
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return (reg & IIDR_MODEL_MASK) == IIDR_MODEL_ARM_GIC_600;
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}
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#endif
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void gicv3_distif_pre_save(unsigned int proc_num)
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{
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arm_gicv3_distif_pre_save(proc_num);
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@ -103,38 +130,33 @@ void gicv3_distif_post_restore(unsigned int proc_num)
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arm_gicv3_distif_post_restore(proc_num);
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}
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/*
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* Power off GIC-600 redistributor
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* Power off GIC-600 redistributor (if configured and detected)
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*/
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void gicv3_rdistif_off(unsigned int proc_num)
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{
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uintptr_t gicr_base;
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assert(gicv3_driver_data);
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assert(proc_num < gicv3_driver_data->rdistif_num);
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assert(gicv3_driver_data->rdistif_base_addrs);
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gicr_base = gicv3_driver_data->rdistif_base_addrs[proc_num];
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assert(gicr_base);
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#if GICV3_SUPPORT_GIC600
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uintptr_t gicr_base = get_gicr_base(proc_num);
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/* Attempt to power redistributor off */
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gic600_pwr_off(gicr_base);
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if (gicv3_is_gic600(gicr_base)) {
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gic600_pwr_off(gicr_base);
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}
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#endif
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}
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/*
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* Power on GIC-600 redistributor
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* Power on GIC-600 redistributor (if configured and detected)
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*/
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void gicv3_rdistif_on(unsigned int proc_num)
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{
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uintptr_t gicr_base;
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assert(gicv3_driver_data);
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assert(proc_num < gicv3_driver_data->rdistif_num);
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assert(gicv3_driver_data->rdistif_base_addrs);
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gicr_base = gicv3_driver_data->rdistif_base_addrs[proc_num];
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assert(gicr_base);
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#if GICV3_SUPPORT_GIC600
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uintptr_t gicr_base = get_gicr_base(proc_num);
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/* Power redistributor on */
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gic600_pwr_on(gicr_base);
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if (gicv3_is_gic600(gicr_base)) {
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gic600_pwr_on(gicr_base);
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}
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#endif
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}
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@ -1,22 +0,0 @@
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/*
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* Copyright (c) 2017, ARM Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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/*
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* Driver for GIC500-specific features. This driver only overrides APIs that are
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* different to those generic ones in GICv3 driver.
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*/
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#include "gicv3_private.h"
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void gicv3_distif_pre_save(unsigned int proc_num)
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{
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arm_gicv3_distif_pre_save(proc_num);
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}
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void gicv3_distif_post_restore(unsigned int proc_num)
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{
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arm_gicv3_distif_post_restore(proc_num);
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}
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@ -5,7 +5,7 @@
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#
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# Default configuration values
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GICV3_IMPL ?= GIC500
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GICV3_SUPPORT_GIC600 ?= 0
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GICV3_IMPL_GIC600_MULTICHIP ?= 0
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GICV3_OVERRIDE_DISTIF_PWR_OPS ?= 0
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GIC_ENABLE_V4_EXTN ?= 0
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@ -20,19 +20,14 @@ ifeq (${GICV3_OVERRIDE_DISTIF_PWR_OPS}, 0)
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GICV3_SOURCES += drivers/arm/gic/v3/arm_gicv3_common.c
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endif
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# Either GIC-600 or GIC-500 can be selected at one time
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ifeq (${GICV3_IMPL}, GIC600)
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# GIC-600 sources
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GICV3_SOURCES += drivers/arm/gic/v3/gic600.c
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GICV3_SOURCES += drivers/arm/gic/v3/gic-x00.c
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ifeq (${GICV3_IMPL_GIC600_MULTICHIP}, 1)
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GICV3_SOURCES += drivers/arm/gic/v3/gic600_multichip.c
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endif
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else ifeq (${GICV3_IMPL}, GIC500)
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# GIC-500 sources
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GICV3_SOURCES += drivers/arm/gic/v3/gic500.c
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else
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$(error "Incorrect GICV3_IMPL value ${GICV3_IMPL}")
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endif
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# Set GIC-600 support
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$(eval $(call assert_boolean,GICV3_SUPPORT_GIC600))
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$(eval $(call add_define,GICV3_SUPPORT_GIC600))
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# Set GICv4 extension
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$(eval $(call assert_boolean,GIC_ENABLE_V4_EXTN))
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@ -222,6 +222,14 @@
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#define TYPER_PPI_NUM_SHIFT U(27)
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#define TYPER_PPI_NUM_MASK U(0x1f)
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/* GICR_IIDR bit definitions */
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#define IIDR_PRODUCT_ID_MASK 0xff000000
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#define IIDR_VARIANT_MASK 0x000f0000
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#define IIDR_REVISION_MASK 0x0000f000
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#define IIDR_IMPLEMENTER_MASK 0x00000fff
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#define IIDR_MODEL_MASK (IIDR_PRODUCT_ID_MASK | \
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IIDR_IMPLEMENTER_MASK)
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/*******************************************************************************
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* GICv3 and 3.1 CPU interface registers & constants
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******************************************************************************/
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@ -70,8 +70,8 @@ else
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lib/cpus/aarch64/cortex_a75.S
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endif
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# GIC-600 configuration
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GICV3_IMPL := GIC600
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# Allow detection of GIC-600
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GICV3_SUPPORT_GIC600 := 1
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# Include GICv3 driver files
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include drivers/arm/gic/v3/gicv3.mk
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@ -49,13 +49,10 @@ endif
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$(eval $(call add_define,FVP_INTERCONNECT_DRIVER))
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# Choose the GIC sources depending upon the how the FVP will be invoked
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ifeq (${FVP_USE_GIC_DRIVER},$(filter ${FVP_USE_GIC_DRIVER},FVP_GICV3 FVP_GIC600))
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# GIC500 is the default option in case GICV3_IMPL is not set
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ifeq (${FVP_USE_GIC_DRIVER}, FVP_GIC600)
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GICV3_IMPL := GIC600
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endif
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ifeq (${FVP_USE_GIC_DRIVER}, FVP_GICV3)
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# The GIC model (GIC-600 or GIC-500) will be detected at runtime
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GICV3_SUPPORT_GIC600 := 1
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GICV3_OVERRIDE_DISTIF_PWR_OPS := 1
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# Include GICv3 driver files
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@ -15,7 +15,7 @@ PLAT_INCLUDES := -I${N1SDP_BASE}/include
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N1SDP_CPU_SOURCES := lib/cpus/aarch64/neoverse_n1.S
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# GIC-600 configuration
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GICV3_IMPL := GIC600
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GICV3_SUPPORT_GIC600 := 1
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GICV3_IMPL_GIC600_MULTICHIP := 1
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# Include GICv3 driver files
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@ -25,7 +25,8 @@ USE_COHERENT_MEM := 0
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GIC_ENABLE_V4_EXTN := 1
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# GIC-600 configuration
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GICV3_IMPL := GIC600
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GICV3_SUPPORT_GIC600 := 1
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# Include GICv3 driver files
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include drivers/arm/gic/v3/gicv3.mk
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@ -23,7 +23,7 @@ INTERCONNECT_SOURCES := ${CSS_ENT_BASE}/sgi_interconnect.c
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PLAT_INCLUDES += -I${CSS_ENT_BASE}/include
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# GIC-600 configuration
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GICV3_IMPL := GIC600
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GICV3_SUPPORT_GIC600 := 1
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# Include GICv3 driver files
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include drivers/arm/gic/v3/gicv3.mk
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INTERCONNECT_SOURCES := ${CSS_SGM_BASE}/sgm_interconnect.c
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# GIC-600 configuration
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GICV3_IMPL := GIC600
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GICV3_SUPPORT_GIC600 := 1
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# Include GICv3 driver files
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include drivers/arm/gic/v3/gicv3.mk
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