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b4ad365a46
The only difference between GIC-500 and GIC-600 relevant to TF-A is the differing power management sequence. A certain GIC implementation is detectable at runtime, for instance by checking the IIDR register. Let's add that test before initiating the GIC-600 specific sequence, so the code can be used on both GIC-600 and GIC-500 chips alike, without deciding on a GIC chip at compile time. This means that the GIC-500 "driver" is now redundant. To allow minimal platform support, add a switch to disable GIC-600 support. Change-Id: I17ea97d9fb05874772ebaa13e6678b4ba3415557 Signed-off-by: Andre Przywara <andre.przywara@arm.com>
162 lines
3.7 KiB
C
162 lines
3.7 KiB
C
/*
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* Copyright (c) 2017-2019, ARM Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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/*
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* Driver for GIC-500 and GIC-600 specific features. This driver only
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* overrides APIs that are different to those generic ones in GICv3
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* driver.
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*
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* GIC-600 supports independently power-gating redistributor interface.
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*/
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#include <assert.h>
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#include <arch_helpers.h>
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#include <drivers/arm/gicv3.h>
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#include "gicv3_private.h"
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/* GIC-600 specific register offsets */
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#define GICR_PWRR 0x24
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#define IIDR_MODEL_ARM_GIC_600 0x0200043b
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/* GICR_PWRR fields */
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#define PWRR_RDPD_SHIFT 0
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#define PWRR_RDAG_SHIFT 1
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#define PWRR_RDGPD_SHIFT 2
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#define PWRR_RDGPO_SHIFT 3
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#define PWRR_RDPD (1 << PWRR_RDPD_SHIFT)
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#define PWRR_RDAG (1 << PWRR_RDAG_SHIFT)
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#define PWRR_RDGPD (1 << PWRR_RDGPD_SHIFT)
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#define PWRR_RDGPO (1 << PWRR_RDGPO_SHIFT)
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/*
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* Values to write to GICR_PWRR register to power redistributor
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* for operating through the core (GICR_PWRR.RDAG = 0)
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*/
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#define PWRR_ON (0 << PWRR_RDPD_SHIFT)
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#define PWRR_OFF (1 << PWRR_RDPD_SHIFT)
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#if GICV3_SUPPORT_GIC600
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/* GIC-600 specific accessor functions */
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static void gicr_write_pwrr(uintptr_t base, unsigned int val)
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{
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mmio_write_32(base + GICR_PWRR, val);
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}
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static uint32_t gicr_read_pwrr(uintptr_t base)
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{
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return mmio_read_32(base + GICR_PWRR);
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}
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static void gicr_wait_group_not_in_transit(uintptr_t base)
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{
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/* Check group not transitioning: RDGPD == RDGPO */
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while (((gicr_read_pwrr(base) & PWRR_RDGPD) >> PWRR_RDGPD_SHIFT) !=
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((gicr_read_pwrr(base) & PWRR_RDGPO) >> PWRR_RDGPO_SHIFT))
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;
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}
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static void gic600_pwr_on(uintptr_t base)
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{
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do { /* Wait until group not transitioning */
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gicr_wait_group_not_in_transit(base);
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/* Power on redistributor */
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gicr_write_pwrr(base, PWRR_ON);
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/*
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* Wait until the power on state is reflected.
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* If RDPD == 0 then powered on.
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*/
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} while ((gicr_read_pwrr(base) & PWRR_RDPD) != PWRR_ON);
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}
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static void gic600_pwr_off(uintptr_t base)
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{
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/* Wait until group not transitioning */
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gicr_wait_group_not_in_transit(base);
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/* Power off redistributor */
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gicr_write_pwrr(base, PWRR_OFF);
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/*
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* If this is the last man, turning this redistributor frame off will
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* result in the group itself being powered off and RDGPD = 1.
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* In that case, wait as long as it's in transition, or has aborted
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* the transition altogether for any reason.
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*/
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if ((gicr_read_pwrr(base) & PWRR_RDGPD) != 0) {
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/* Wait until group not transitioning */
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gicr_wait_group_not_in_transit(base);
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}
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}
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static uintptr_t get_gicr_base(unsigned int proc_num)
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{
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uintptr_t gicr_base;
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assert(gicv3_driver_data);
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assert(proc_num < gicv3_driver_data->rdistif_num);
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assert(gicv3_driver_data->rdistif_base_addrs);
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gicr_base = gicv3_driver_data->rdistif_base_addrs[proc_num];
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assert(gicr_base);
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return gicr_base;
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}
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static bool gicv3_is_gic600(uintptr_t gicr_base)
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{
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uint32_t reg = mmio_read_32(gicr_base + GICR_IIDR);
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return (reg & IIDR_MODEL_MASK) == IIDR_MODEL_ARM_GIC_600;
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}
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#endif
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void gicv3_distif_pre_save(unsigned int proc_num)
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{
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arm_gicv3_distif_pre_save(proc_num);
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}
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void gicv3_distif_post_restore(unsigned int proc_num)
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{
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arm_gicv3_distif_post_restore(proc_num);
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}
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/*
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* Power off GIC-600 redistributor (if configured and detected)
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*/
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void gicv3_rdistif_off(unsigned int proc_num)
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{
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#if GICV3_SUPPORT_GIC600
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uintptr_t gicr_base = get_gicr_base(proc_num);
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/* Attempt to power redistributor off */
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if (gicv3_is_gic600(gicr_base)) {
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gic600_pwr_off(gicr_base);
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}
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#endif
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}
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/*
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* Power on GIC-600 redistributor (if configured and detected)
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*/
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void gicv3_rdistif_on(unsigned int proc_num)
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{
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#if GICV3_SUPPORT_GIC600
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uintptr_t gicr_base = get_gicr_base(proc_num);
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/* Power redistributor on */
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if (gicv3_is_gic600(gicr_base)) {
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gic600_pwr_on(gicr_base);
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}
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#endif
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}
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