Test that we don't have a /chosen/kaslr-seed property if we measure the
device-tree.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Update all required Python packages to current release.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
It is useful when structure is also used for saving vendor data covered
by CRC32.
Signed-off-by: Michal Simek <michal.simek@amd.com>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
There is confusion in this function between the flag and state_mask
parameters, which prevents the boot from actually happening. Correct
this by using state_mask instead of flag for deciding which states to go
through.
This fixes booting of some 32-bit Debian kernels.
Note: Some sort of CI for this is in the works.
Fixes: 228c6722d4 ("x86: zboot: Avoid iteration in do_zboot_states()")
Signed-off-by: Simon Glass <sjg@chromium.org>
In case when either gpt_verify_headers() or gpt_verify_partitions()
fails, the memory allocated for gpt_pte will be freed in those functions
internally, but gpt_pte will still contain non-NULL dangling pointer.
The attempt to free it in those cases in gpt_verify() leads to "use
after free" error, which leads to a "Synchronous abort" exception.
This issue was found by running the next command on the device with
incorrect partition table:
=> gpt verify mmc 0 $partitions
which results to:
No partition list provided - only basic check
"Synchronous Abort" handler, esr 0x96000021, far 0xba247bff
....
Fix the issue by only freeing gpt_pte if none of those functions failed.
Fixes: bbb9ffac60 ("gpt: command: Extend gpt command to support GPT table verification")
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
After adding the U_BOOT_LONGHELP macro some new commands came in still
that were not making use if it. Switch these cases over and in a few
places add missing newlines as well.
Signed-off-by: Tom Rini <trini@konsulko.com>
The property isn't useful in VPL/SPL/TPL as it is only for U-Boot proper
pre-reloc, which has its own DTB.
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
The last usage of the DV_TIMER_ and DV_WDT_ definitions were removed in
commits 8d77576371 ("ARM: davinci: remove support for cam_enc_4xx")
and cef443c166 ("arm: davinci: remove leftover code for dm* SoCs"),
respectively.
Signed-off-by: Emil Kronborg <emil.kronborg@protonmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
The davinci_hw_watchdog_ functions are defined but never called from
anywhere. Commit 881ae794b9 ("calimain: remove board") eliminated the
last call to these functions.
Signed-off-by: Emil Kronborg <emil.kronborg@protonmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Fix btrfs_read/read_and_truncate_page write out of bounds of destination
buffer. Old behavior break bootstd malloc'd buffers of exact file size.
Previously this OOB write have not been noticed because distroboot usually
read files into huge static memory areas.
Signed-off-by: Alex Shumsky <alexthreed@gmail.com>
Fixes: e342718 ("fs: btrfs: Implement btrfs_file_read()")
Reviewed-by: Qu Wenruo <wqu@suse.com>
Dhruva Gole <d-gole@ti.com> says:
Add symlinks for both tiboot3.bin and tispl.bin because a user has to
anyway rename these files to get the platform to boot up.
Also update the documentation to reflect above change.
Rename the boot bins as the _unsigned postfixes are not longer
required. We have symlinks in place for having generic names for all the
boot bins now.
Signed-off-by: Dhruva Gole <d-gole@ti.com>
Add symlinks for both tiboot3.bin and tispl.bin because a user has to
anyway rename these files to get the platform to boot up.
This just makes it more intuitive and convenient.
Reviewed-by: Manorit Chawdhry <m-chawdhry@ti.com>
Signed-off-by: Dhruva Gole <d-gole@ti.com>
The Kernel Image and DTB files are supposed to be picked from the rootfs
of the SD Card, this fails in legacy boot flow because bootpart is set
to 1:1. Fix it.
Fixes: a200f428b5 ("board: ti: am62x: Add am62x_beagleplay_* defconfigs and env file")
Reviewed-by: Nishanth Menon <nm@ti.com>
Acked-by: Chirag Shilwant <c-shilwant@ti.com>
Signed-off-by: Dhruva Gole <d-gole@ti.com>
MCU_CLKOUT0 output can be driven by two different clock inputs:
one at 25 MHz and another at 50 MHz. Currently, the 25 MHz input
clock is not selectable due to a duplication of the 50 MHz clock input
in the mux configuration. This commit corrects the parent clock mux
configuration, making the 25 MHz input clock selectable.
Signed-off-by: Emanuele Ghidoli <emanuele.ghidoli@toradex.com>
Reviewed-by: Bryan Brattlof <bb@ti.com>
Tom Rini <trini@konsulko.com> says:
This fixes a number of small issues with the structure of the Azure jobs
and then ensures that we will build all of the possible boards that we
know about, in this CI run.
Now that we have each stage of the world build using variables to define
what it will attempt to build, and that we have added in missing
machines, add a job to make sure that we would always be building
everything.
Signed-off-by: Tom Rini <trini@konsulko.com>
As part of commit 9aeac898da ("Azure: Rework build the world jobs") I
made a few mistakes. An errant '_' meant that we built neither at91 nor
kirkwood platforms. Further, the non-freescale (NXP) "LS1xxx" platforms
were also not being built. Adjust some jobs to have these be built
again.
Fixes: 9aeac898da ("Azure: Rework build the world jobs")
Signed-off-by: Tom Rini <trini@konsulko.com>
In order to get the list of boards that will be done in a "dry run"
build we need to have something listed and not just an exclude list.
Populate the job with all architecture directories except arm and
powerpc.
Signed-off-by: Tom Rini <trini@konsulko.com>
Instead of defining BUILDMAN to the value we'll build in each part of
the matrix job, define a variable with that name and have it list what
to build. This will allow us to reference these multiple times
consistently later on.
Signed-off-by: Tom Rini <trini@konsulko.com>
At this point noting that we have a split in our job similar to TravisCI
(which we have not used in years) isn't helpful, and is also not true
anymore either. Instead, explain that we split the world up in to 10
jobs as that's the maximum we can have going in parallel on the free
tier of Azure.
Signed-off-by: Tom Rini <trini@konsulko.com>
Caleb Connolly <caleb.connolly@linaro.org> says:
MMU issues are some of the most frustrating to debug. To make this
slightly less unbearable, introduce a software pagetable walker for
ARMv8. This can be called to dump a pagetable with the default
formatter, or a custom callback can be provided to implement more
complicated parsing.
This can also be useful to dump the pagetable used by a previous
bootloader stage (by reading out the ttbr register).
Here is an example of the output when walking U-Boot's own memory map
on a Qualcomm RB3 board:
Walking pagetable at 000000017df90000, va_bits: 36. Using 3 levels
[0x17df91000] | Table | |
[0x17df92000] | Table | |
[0x000001000 - 0x000200000] | Pages | Device-nGnRnE | Non-shareable
[0x000200000 - 0x040000000] | Block | Device-nGnRnE | Non-shareable
[0x040000000 - 0x080000000] | Block | Device-nGnRnE | Non-shareable
[0x080000000 - 0x140000000] | Block | Normal | Inner-shareable
[0x17df93000] | Table | |
[0x140000000 - 0x17de00000] | Block | Normal | Inner-shareable
[0x17df94000] | Table | |
[0x17de00000 - 0x17dfa0000] | Pages | Normal | Inner-shareable
Add some brief documentation on using dump_pagetables() to print out
U-Boot's pagetables during boot.
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
Add a basic software implementation of the ARM64 pagetable walker. This
can be used for debugging U-Boot's pagetable, as well as dumping the
pagetable from the previous bootloader stage if it used one (by reading
out the ttbr address).
One can either call dump_pagetable() to print the pagetable to the
console with the default formatter, or implement their own pagetable
handler using walke_pagetable() with a custom pte_walker_cb_t callback.
All of the added code is discarded when unused, hence there is no need
to add an additional Kconfig option for this.
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
The APTable attribute is two bits wide according to the ARMv8-A
architecture reference manual. Fix the macro accordingly.
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/21310
- Enable SPL DTO application support for i.MX8MP DHCOM PDK2.
- Migrate imx8mn_bsh_smm_s2 and imx6ulz_bsh_smm_m2 to OF_UPSTREAM.
- Drop redundant imports with dts/upstream.
- Miscellaneous improvements for Gateworks i.MX8M boards.
Enable Quality of Service (QoS) blocks for Display SubSystem (DSS), by
servicing the DSS - DDR traffic from the Real-Time (RT) queue. This is
done by setting the DSS DMA orderID to greater than 9.
Before setting up the QoS, the ORDERID needs to be mapped to VBUSM sources
using setup_navss_nb() function call that sets the threadmap for NBSS
registers. (Section 10.2.9.2.10 "Quality of Service" in TRM[0])
Section 3.2.1 "Quality of Service (QoS)" in the TRM[0] provide more
details.
[0]: https://www.ti.com/lit/zip/spruj52
Signed-off-by: Jayesh Choudhary <j-choudhary@ti.com>
Enable Quality of Service (QoS) blocks for Display SubSystem (DSS), by
servicing the DSS - DDR traffic from the Real-Time (RT) queue. This is
done by setting the DSS DMA orderID to greater than 9.
Before setting up the QoS, the ORDERID needs to be mapped to VBUSM sources
using setup_navss_nb() function call that sets the threadmap for NBSS
registers. (Section 10.2.9.2.10 "Quality of Service" in TRM[0])
Section 3.2.1 "Quality of Service (QoS)" in the TRM[0] provide more
details.
[0]: https://www.ti.com/lit/zip/spruj28
Signed-off-by: Jayesh Choudhary <j-choudhary@ti.com>
Enable Quality of Service (QoS) blocks for Display SubSystem (DSS), by
servicing the DSS - DDR traffic from the Real-Time (RT) queue. This is
done by setting the DSS DMA orderID to greater than 7.
Before setting up the QoS, the ORDERID needs to be mapped to VBUSM sources
using setup_navss_nb() function call that sets the threadmap for NBSS
registers. (Section 10.2.10.1.2 "NB Parameters" in TRM[0])
Section 3.3.2 "Quality of Service (QoS)" in the TRM[0] provide more
details.
[0]: https://www.ti.com/lit/zip/spruil1
Signed-off-by: Jayesh Choudhary <j-choudhary@ti.com>
Reviewed-by: Andrew Davis <afd@ti.com>
For the QOS registers, instead of using the raw values for calculation
for each reg field, use a defined macro which takes in argument for all
the reg fields to get the desired value.
Do the similar simplification for QOS register and group registers and
make the corresponding changes for am62a_qos_uboot file.
Suggested-by: Andrew Davis <afd@ti.com>
Signed-off-by: Jayesh Choudhary <j-choudhary@ti.com>
Acked-by: Andrew Davis <afd@ti.com>
QoS bit mapping are common across all K3 SoCs so move those defines
to common header file (k3_qos.h).
This ensures that we do not define these for each SoC.
Signed-off-by: Jayesh Choudhary <j-choudhary@ti.com>
general use some prototypes changed from returning efi_status_t to int,
which is more appropriate for the non-EFI APIs. However, some of the
EFI callsites never changed and we ended up assigning the int value to
efi_status_t.
This is unlikely to cause any problems, apart from returning invalid
values on failures and violating the EFI spec.
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Merge tag 'tpm-master-24062024' of https://source.denx.de/u-boot/custodians/u-boot-tpm
When the EFI TCG measurement code moved from EFI to the TPM subsystem for
general use some prototypes changed from returning efi_status_t to int,
which is more appropriate for the non-EFI APIs. However, some of the
EFI callsites never changed and we ended up assigning the int value to
efi_status_t.
This is unlikely to cause any problems, apart from returning invalid
values on failures and violating the EFI spec.
Enable SPL DTO support to apply matching SoM specific DTOs to cater
for the SoM differences in DH i.MX8MP DHCOM PDK2 configuration. This
is already enabled in DH i.MX8MP DHCOM PDK3 configuration so align
the two configurations.
Fixes: ad1158c50e ("arm64: dts: imx8mp: Switch to DT overlays for i.MX8MP DHCOM SoM")
Signed-off-by: Marek Vasut <marex@denx.de>
With DM enabled, there is no need for board code to initialize
the Ethernet interfaces.
Specifically board_interface_eth_init will handle the configuration of
GPR1.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
The assigned-clock no longer have to be dropped, the clock are now
defined in clk-imx8mp.c and used by DWMAC driver to configure the
DWMAC clock. Drop the workarounds from U-Boot specific DT extras.
Having the clocks dropped causes the EQoS to be non-functional.
See commit c7ea9612df ("arm64: dts: imx8mp: Drop EQoS clock
workaround").
Fixes: 48c6f9777c ("board: gateworks: venice: add imx8mp-gw7905-2x support")
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
The GW74xx USB1 controller connects to a dual-role connector using a GPIO
for role detection via the usb-connector Linux driver (usb-conn-gpio.c).
This drive does not exist yet in U-Boot so for now we will just default
USB1 to host mode.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Due to supply chain issues Venice boards use either a DP83867 or a
GPY111 RGMII PHY. We already print an identifier for the DP83867 so add
one for the GPY111 to better identify what PHY is on a board:
Example:
Net: GPY111 eth0: ethernet@30be0000 [PRIME]
Net: DP83867 eth0: ethernet@30be0000 [PRIME]
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Extensive testing has shown that at higher temperatures operating
without a GSC backup battery, the GSC needs a small delay after
releasing the I2C SDA/SCL pins before it is ready to handle I2C
requests.
Add a delay to avoid errors such as:
wait_for_sr_state: Arbitration lost sr=93 cr=80 state=2020
i2c_init_transfer: failed for chip 0x20 retry=0
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
The Gateworks System Controller (GSC) has a voltage supervisor which is
disabled by default. On older boards we want to maintian this but on
newer boards we wish to enable the voltage supervisor.
The Gateworks System Controller (GSC) can disable the board primary
power supply by driving a pin to a FET high. On older board models
the leakage of the GSC may exceed the leakage of the FET causing this
signal slowly rise when the GSC battery is low and the board is in a
powered down state resulting in the board being kept in a disabled
state.
Newer boards have a hardware fix to avoid this leakage and thus should
enable the voltage supervisor.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Drop redundant header imports with dts/upstream already providing
updated headers which have been checked to be backwards compatibility.
The imx headers which aren't present in dts/upstream are as follows:
- include/dt-bindings/clock/imxrt1020-clock.h
- include/dt-bindings/clock/imx8qm-clock.h
- include/dt-bindings/clock/imxrt1170-clock.h
- include/dt-bindings/clock/imx8qxp-clock.h
- include/dt-bindings/memory/imxrt-sdram.h
- include/dt-bindings/pinctrl/pads-imx8qxp.h
- include/dt-bindings/pinctrl/pads-imx8qm.h
- include/dt-bindings/soc/imx8_pd.h
- include/dt-bindings/soc/imx_rsrc.h
hence these aren't dropped yet but there was an unused header:
- include/dt-bindings/pinctrl/pins-imx8mq.h
which has been dropped as well. There shouldn't be any funtional impact
with this change but it rather allows iMX platforms to use upstream
dt-bindings headers in a backwards compatible manner.
Signed-off-by: Sumit Garg <sumit.garg@linaro.org>
Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com>
