mirror of
https://github.com/u-boot/u-boot.git
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Merge patch series "arm64: add a software pagetable walker"
Caleb Connolly <caleb.connolly@linaro.org> says:
MMU issues are some of the most frustrating to debug. To make this
slightly less unbearable, introduce a software pagetable walker for
ARMv8. This can be called to dump a pagetable with the default
formatter, or a custom callback can be provided to implement more
complicated parsing.
This can also be useful to dump the pagetable used by a previous
bootloader stage (by reading out the ttbr register).
Here is an example of the output when walking U-Boot's own memory map
on a Qualcomm RB3 board:
Walking pagetable at 000000017df90000, va_bits: 36. Using 3 levels
[0x17df91000] | Table | |
[0x17df92000] | Table | |
[0x000001000 - 0x000200000] | Pages | Device-nGnRnE | Non-shareable
[0x000200000 - 0x040000000] | Block | Device-nGnRnE | Non-shareable
[0x040000000 - 0x080000000] | Block | Device-nGnRnE | Non-shareable
[0x080000000 - 0x140000000] | Block | Normal | Inner-shareable
[0x17df93000] | Table | |
[0x140000000 - 0x17de00000] | Block | Normal | Inner-shareable
[0x17df94000] | Table | |
[0x17de00000 - 0x17dfa0000] | Pages | Normal | Inner-shareable
This commit is contained in:
Tom Rini
commit
42276c3658
3 changed files with 351 additions and 1 deletions
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@ -396,6 +396,251 @@ static int count_ranges(void)
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return count;
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}
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#define ALL_ATTRS (3 << 8 | PMD_ATTRINDX_MASK)
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#define PTE_IS_TABLE(pte, level) (pte_type(&(pte)) == PTE_TYPE_TABLE && (level) < 3)
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enum walker_state {
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WALKER_STATE_START = 0,
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WALKER_STATE_TABLE,
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WALKER_STATE_REGION, /* block or page, depending on level */
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};
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/**
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* __pagetable_walk() - Walk through the pagetable and call cb() for each memory region
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*
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* This is a software implementation of the ARMv8-A MMU translation table walk. As per
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* section D5.4 of the ARMv8-A Architecture Reference Manual. It recursively walks the
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* 4 or 3 levels of the page table and calls the callback function for each discrete
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* region of memory (that being the discovery of a new table, a collection of blocks
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* with the same attributes, or of pages with the same attributes).
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*
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* U-Boot picks the smallest number of virtual address (VA) bits that it can based on the
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* memory map configured by the board. If this is less than 39 then the MMU will only use
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* 3 levels of translation instead of 3 - skipping level 0.
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*
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* Each level has 512 entries of 64-bits each. Each entry includes attribute bits and
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* an address. When the attribute bits indicate a table, the address is the physical
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* address of the table, so we can recursively call _pagetable_walk() on it (after calling
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* @cb). If instead they indicate a block or page, we record the start address and attributes
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* and continue walking until we find a region with different attributes, or the end of the
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* table, in either case we call @cb with the start and end address of the region.
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*
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* This approach can be used to fully emulate the MMU's translation table walk, as per
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* Figure D5-25 of the ARMv8-A Architecture Reference Manual.
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*
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* @addr: The address of the table to walk
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* @tcr: The TCR register value
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* @level: The current level of the table
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* @cb: The callback function to call for each region
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* @priv: Private data to pass to the callback function
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*/
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static void __pagetable_walk(u64 addr, u64 tcr, int level, pte_walker_cb_t cb, void *priv)
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{
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u64 *table = (u64 *)addr;
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u64 attrs, last_attrs = 0, last_addr = 0, entry_start = 0;
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int i;
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u64 va_bits = 64 - (tcr & (BIT(6) - 1));
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static enum walker_state state[4] = { 0 };
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static bool exit;
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if (!level) {
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exit = false;
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if (va_bits < 39)
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level = 1;
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}
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state[level] = WALKER_STATE_START;
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/* Walk through the table entries */
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for (i = 0; i < MAX_PTE_ENTRIES; i++) {
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u64 pte = table[i];
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u64 _addr = pte & GENMASK_ULL(va_bits, PAGE_SHIFT);
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if (exit)
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return;
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if (pte_type(&pte) == PTE_TYPE_FAULT)
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continue;
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attrs = pte & ALL_ATTRS;
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/* If we're currently inside a block or set of pages */
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if (state[level] > WALKER_STATE_START && state[level] != WALKER_STATE_TABLE) {
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/*
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* Continue walking if this entry has the same attributes as the last and
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* is one page/block away -- it's a contiguous region.
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*/
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if (attrs == last_attrs && _addr == last_addr + (1 << level2shift(level))) {
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last_attrs = attrs;
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last_addr = _addr;
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continue;
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} else {
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/* We either hit a table or a new region */
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exit = cb(entry_start, last_addr + (1 << level2shift(level)),
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va_bits, level, priv);
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if (exit)
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return;
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state[level] = WALKER_STATE_START;
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}
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}
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last_attrs = attrs;
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last_addr = _addr;
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if (PTE_IS_TABLE(pte, level)) {
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/* After the end of the table might be corrupted data */
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if (!_addr || (pte & 0xfff) > 0x3ff)
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return;
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state[level] = WALKER_STATE_TABLE;
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/* Signify the start of a table */
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exit = cb(pte, 0, va_bits, level, priv);
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if (exit)
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return;
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/* Go down a level */
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__pagetable_walk(_addr, tcr, level + 1, cb, priv);
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state[level] = WALKER_STATE_START;
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} else if (pte_type(&pte) == PTE_TYPE_BLOCK || pte_type(&pte) == PTE_TYPE_PAGE) {
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/* We foud a block or page, start walking */
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entry_start = pte;
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state[level] = WALKER_STATE_REGION;
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}
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}
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if (state[level] > WALKER_STATE_START)
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exit = cb(entry_start, last_addr + (1 << level2shift(level)), va_bits, level, priv);
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}
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static void pretty_print_pte_type(u64 pte)
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{
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switch (pte_type(&pte)) {
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case PTE_TYPE_FAULT:
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printf(" %-5s", "Fault");
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break;
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case PTE_TYPE_BLOCK:
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printf(" %-5s", "Block");
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break;
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case PTE_TYPE_PAGE:
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printf(" %-5s", "Pages");
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break;
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default:
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printf(" %-5s", "Unk");
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}
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}
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static void pretty_print_table_attrs(u64 pte)
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{
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int ap = (pte & PTE_TABLE_AP) >> 61;
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printf(" | %2s %10s",
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(ap & 2) ? "RO" : "",
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(ap & 1) ? "!EL0" : "");
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printf(" | %3s %2s %2s",
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(pte & PTE_TABLE_PXN) ? "PXN" : "",
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(pte & PTE_TABLE_XN) ? "XN" : "",
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(pte & PTE_TABLE_NS) ? "NS" : "");
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}
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static void pretty_print_block_attrs(u64 pte)
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{
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u64 attrs = pte & PMD_ATTRINDX_MASK;
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switch (attrs) {
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case PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE):
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printf(" | %-13s", "Device-nGnRnE");
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break;
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case PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRE):
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printf(" | %-13s", "Device-nGnRE");
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break;
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case PTE_BLOCK_MEMTYPE(MT_DEVICE_GRE):
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printf(" | %-13s", "Device-GRE");
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break;
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case PTE_BLOCK_MEMTYPE(MT_NORMAL_NC):
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printf(" | %-13s", "Normal-NC");
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break;
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case PTE_BLOCK_MEMTYPE(MT_NORMAL):
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printf(" | %-13s", "Normal");
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break;
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default:
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printf(" | %-13s", "Unknown");
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}
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}
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static void pretty_print_block_memtype(u64 pte)
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{
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u64 share = pte & (3 << 8);
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switch (share) {
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case PTE_BLOCK_NON_SHARE:
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printf(" | %-16s", "Non-shareable");
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break;
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case PTE_BLOCK_OUTER_SHARE:
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printf(" | %-16s", "Outer-shareable");
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break;
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case PTE_BLOCK_INNER_SHARE:
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printf(" | %-16s", "Inner-shareable");
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break;
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default:
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printf(" | %-16s", "Unknown");
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}
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}
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static void print_pte(u64 pte, int level)
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{
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if (PTE_IS_TABLE(pte, level)) {
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printf(" %-5s", "Table");
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pretty_print_table_attrs(pte);
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} else {
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pretty_print_pte_type(pte);
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pretty_print_block_attrs(pte);
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pretty_print_block_memtype(pte);
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}
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printf("\n");
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}
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/**
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* pagetable_print_entry() - Callback function to print a single pagetable region
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*
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* This is the default callback used by @dump_pagetable(). It does some basic pretty
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* printing (see example in the U-Boot arm64 documentation). It can be replaced by
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* a custom callback function if more detailed information is needed.
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*
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* @start_attrs: The start address and attributes of the region (or table address)
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* @end: The end address of the region (or 0 if it's a table)
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* @va_bits: The number of bits used for the virtual address
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* @level: The level of the region
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* @priv: Private data for the callback (unused)
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*/
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static bool pagetable_print_entry(u64 start_attrs, u64 end, int va_bits, int level, void *priv)
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{
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u64 _addr = start_attrs & GENMASK_ULL(va_bits, PAGE_SHIFT);
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int indent = va_bits < 39 ? level - 1 : level;
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printf("%*s", indent * 2, "");
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if (PTE_IS_TABLE(start_attrs, level))
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printf("[%#011llx]%14s", _addr, "");
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else
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printf("[%#011llx - %#011llx]", _addr, end);
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printf("%*s | ", (3 - level) * 2, "");
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print_pte(start_attrs, level);
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return false;
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}
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void walk_pagetable(u64 ttbr, u64 tcr, pte_walker_cb_t cb, void *priv)
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{
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__pagetable_walk(ttbr, tcr, 0, cb, priv);
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}
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void dump_pagetable(u64 ttbr, u64 tcr)
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{
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u64 va_bits = 64 - (tcr & (BIT(6) - 1));
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printf("Walking pagetable at %p, va_bits: %lld. Using %d levels\n", (void *)ttbr,
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va_bits, va_bits < 39 ? 3 : 4);
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walk_pagetable(ttbr, tcr, pagetable_print_entry, NULL);
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}
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/* Returns the estimated required size of all page tables */
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__weak u64 get_page_table_size(void)
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{
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@ -51,7 +51,7 @@
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#define PTE_TABLE_PXN (1UL << 59)
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#define PTE_TABLE_XN (1UL << 60)
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#define PTE_TABLE_AP (1UL << 61)
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#define PTE_TABLE_AP (3UL << 61)
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#define PTE_TABLE_NS (1UL << 63)
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/*
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@ -129,6 +129,62 @@ static inline void set_ttbr_tcr_mair(int el, u64 table, u64 tcr, u64 attr)
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asm volatile("isb");
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}
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static inline void get_ttbr_tcr_mair(int el, u64 *table, u64 *tcr, u64 *attr)
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{
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if (el == 1) {
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asm volatile("mrs %0, ttbr0_el1" : "=r" (*table));
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asm volatile("mrs %0, tcr_el1" : "=r" (*tcr));
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asm volatile("mrs %0, mair_el1" : "=r" (*attr));
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} else if (el == 2) {
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asm volatile("mrs %0, ttbr0_el2" : "=r" (*table));
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asm volatile("mrs %0, tcr_el2" : "=r" (*tcr));
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asm volatile("mrs %0, mair_el2" : "=r" (*attr));
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} else if (el == 3) {
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asm volatile("mrs %0, ttbr0_el3" : "=r" (*table));
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asm volatile("mrs %0, tcr_el3" : "=r" (*tcr));
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asm volatile("mrs %0, mair_el3" : "=r" (*attr));
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} else {
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hang();
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}
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}
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/**
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* typedef pte_walker_cb_t - callback function for walk_pagetable.
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*
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* This function is called when the walker finds a table entry
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* or after parsing a block or pages. For a table the @end address
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* is 0, and @addr is the address of the table. Otherwise, they
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* are the start and end physical addresses of the block or page.
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*
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* @addr: PTE start address (PA), or address of table. Includes attributes.
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* @end: End address of the region (or 0 for a table)
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* @va_bits: Number of bits in the virtual address
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* @level: Table level
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* @priv: Private data for the callback
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*
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* Return: true to stop walking, false to continue
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*/
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typedef bool (*pte_walker_cb_t)(u64 addr, u64 end, int va_bits, int level, void *priv);
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/**
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* walk_pagetable() - Walk the pagetable at ttbr and call @cb for each region
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*
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* @ttbr: Address of the pagetable to dump
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* @tcr: TCR value to use
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* @cb: Callback function to call for each entry
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* @priv: Private data for the callback
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*/
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void walk_pagetable(u64 ttbr, u64 tcr, pte_walker_cb_t cb, void *priv);
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/**
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* dump_pagetable() - Dump the pagetable at ttbr, printing each region and
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* level.
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*
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* @ttbr: Address of the pagetable to dump
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* @tcr: TCR value to use
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*/
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void dump_pagetable(u64 ttbr, u64 tcr);
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struct mm_region {
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u64 virt;
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u64 phys;
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@ -48,6 +48,55 @@ Notes
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6. CONFIG_ARM64 instead of CONFIG_ARMV8 is used to distinguish aarch64 and
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aarch32 specific codes.
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MMU
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---
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U-Boot uses a simple page table for MMU setup. It uses the smallest number of bits
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possible for the virtual address based on the maximum memory address (see the logic
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in ``get_tcr()``). If this is less than 39 bits, the MMU will use only 3 levels for
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address translation.
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As with all platforms, U-Boot on ARM64 uses a 1:1 mapping of virtual to physical addresses.
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In general, the memory map is expected to remain static once the MMU is enabled.
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Software pagetable walker
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^^^^^^^^^^^^^^^^^^^^^^^^^
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It is possible to debug the pagetable generated by U-Boot with the built in
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``dump_pagetable()`` and ``walk_pagetable()`` functions (the former being a simple
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wrapper for the latter). For example the following can be added to ``setup_all_pgtables()``
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after the first call to ``setup_pgtables()``:
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.. code-block:: c
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dump_pagetable(gd->arch.tlb_addr, get_tcr(NULL, NULL));
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.. kernel-doc:: arch/arm/cpu/armv8/cache_v8.c
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:identifiers: __pagetable_walk pagetable_print_entry
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The pagetable walker can be used as follows:
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.. kernel-doc:: arch/arm/include/asm/armv8/mmu.h
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:identifiers: pte_walker_cb_t walk_pagetable dump_pagetable
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This will result in a print like the following:
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.. code-block:: text
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Walking pagetable at 000000017df90000, va_bits: 36. Using 3 levels
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[0x17df91000] | Table | |
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[0x17df92000] | Table | |
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[0x000001000 - 0x000200000] | Pages | Device-nGnRnE | Non-shareable
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[0x000200000 - 0x040000000] | Block | Device-nGnRnE | Non-shareable
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[0x040000000 - 0x080000000] | Block | Device-nGnRnE | Non-shareable
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[0x080000000 - 0x140000000] | Block | Normal | Inner-shareable
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[0x17df93000] | Table | |
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[0x140000000 - 0x17de00000] | Block | Normal | Inner-shareable
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[0x17df94000] | Table | |
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[0x17de00000 - 0x17dfa0000] | Pages | Normal | Inner-shareable
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For more information, please refer to the additional function documentation in
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``arch/arm/include/asm/armv8/mmu.h``.
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Contributors
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------------
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Reference in a new issue