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Prepare v2024.07-rc5

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Merge tag 'v2024.07-rc5' into next

Prepare v2024.07-rc5
This commit is contained in:
Tom Rini 2024-06-24 13:34:52 -06:00
commit a7eada2432
50 changed files with 587 additions and 284 deletions
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2
Makefile
View file

@ -3,7 +3,7 @@
VERSION = 2024
PATCHLEVEL = 07
SUBLEVEL =
EXTRAVERSION = -rc4
EXTRAVERSION = -rc5
NAME =
# *DOCUMENTATION*

2
arch/arm/dts/rk3566-anbernic-rgxx3-u-boot.dtsi
View file

@ -4,7 +4,7 @@
/ {
chosen {
u-boot,spl-boot-order = "same-as-spl", &sdmmc1, &sdmmc0;
u-boot,spl-boot-order = &sdmmc0, &sdhci;
};
};

21
arch/arm/mach-stm32mp/stm32mp1/psci.c
View file

@ -808,6 +808,27 @@ void __secure psci_system_suspend(u32 __always_unused function_id,
writel(SYSCFG_CMPENR_MPUEN, STM32_SYSCFG_BASE + SYSCFG_CMPENSETR);
clrbits_le32(STM32_SYSCFG_BASE + SYSCFG_CMPCR, SYSCFG_CMPCR_SW_CTRL);
/*
* Make sure the OS would not get any spurious IWDG pretimeout IRQ
* right after the system wakes up. This may happen in case the SoC
* got woken up by another source than the IWDG pretimeout and the
* pretimeout IRQ arrived immediately afterward, but too late to be
* handled by the main loop above. In case either of the IWDG is
* enabled, ping it first and then return to the OS.
*/
/* Ping IWDG1 and ACK pretimer IRQ */
if (gic_enabled[4] & BIT(22)) {
writel(IWDG_KR_RELOAD_KEY, STM32_IWDG1_BASE + IWDG_KR);
writel(IWDG_EWCR_EWIC, STM32_IWDG1_BASE + IWDG_EWCR);
}
/* Ping IWDG2 and ACK pretimer IRQ */
if (gic_enabled[4] & BIT(23)) {
writel(IWDG_KR_RELOAD_KEY, STM32_IWDG2_BASE + IWDG_KR);
writel(IWDG_EWCR_EWIC, STM32_IWDG2_BASE + IWDG_EWCR);
}
/*
* The system has resumed successfully. Rewrite LR register stored
* on stack with 'ep' value, so that on return from this PSCI call,

4
arch/arm/mach-stm32mp/stm32mp1/spl.c
View file

@ -118,7 +118,7 @@ static int optee_get_reserved_memory(uint32_t *start, uint32_t *size)
node = ofnode_path("/reserved-memory/optee");
if (!ofnode_valid(node))
return 0;
return -ENOENT;
fdt_start = ofnode_get_addr_size(node, "reg", &fdt_mem_size);
*start = fdt_start;
@ -134,7 +134,7 @@ void stm32_init_tzc_for_optee(void)
{
const uint32_t dram_size = stm32mp_get_dram_size();
const uintptr_t dram_top = STM32_DDR_BASE + (dram_size - 1);
uint32_t optee_base, optee_size, tee_shmem_base;
u32 optee_base = 0, optee_size = 0, tee_shmem_base;
const uintptr_t tzc = STM32_TZC_BASE;
int ret;

64
board/anbernic/rgxx3_rk3566/rgxx3-rk3566.c
View file

@ -6,14 +6,12 @@
#include <abuf.h>
#include <adc.h>
#include <asm/io.h>
#include <command.h>
#include <display.h>
#include <dm.h>
#include <dm/lists.h>
#include <env.h>
#include <fdt_support.h>
#include <linux/delay.h>
#include <linux/iopoll.h>
#include <mipi_dsi.h>
#include <mmc.h>
#include <panel.h>
@ -21,8 +19,6 @@
#include <stdlib.h>
#include <video_bridge.h>
#define BOOT_BROM_DOWNLOAD 0xef08a53c
#define GPIO0_BASE 0xfdd60000
#define GPIO4_BASE 0xfe770000
#define GPIO_SWPORT_DR_L 0x0000
@ -36,14 +32,6 @@
#define GPIO_WRITEMASK(bits) ((bits) << 16)
#define SARADC_BASE 0xfe720000
#define SARADC_DATA 0x0000
#define SARADC_STAS 0x0004
#define SARADC_ADC_STATUS BIT(0)
#define SARADC_CTRL 0x0008
#define SARADC_INPUT_SRC_MSK 0x7
#define SARADC_POWER_CTRL BIT(3)
#define DTB_DIR "rockchip/"
struct rg3xx_model {
@ -169,64 +157,12 @@ static const struct rg353_panel rg353_panel_details[] = {
},
};
/*
* The device has internal eMMC, and while some devices have an exposed
* clk pin you can ground to force a bypass not all devices do. As a
* result it may be possible for some devices to become a perma-brick
* if a corrupted TPL or SPL stage with a valid header is flashed to
* the internal eMMC. Add functionality to read ADC channel 0 (the func
* button) as early as possible in the boot process to provide some
* protection against this. If we ever get an open TPL stage, we should
* consider moving this function there.
*/
void read_func_button(void)
{
int ret;
u32 reg;
/* Turn off SARADC to reset it. */
writel(0, (SARADC_BASE + SARADC_CTRL));
/* Enable channel 0 and power on SARADC. */
writel(((0 & SARADC_INPUT_SRC_MSK) | SARADC_POWER_CTRL),
(SARADC_BASE + SARADC_CTRL));
/*
* Wait for data to be ready. Use timeout of 20000us from
* rockchip_saradc driver.
*/
ret = readl_poll_timeout((SARADC_BASE + SARADC_STAS), reg,
!(reg & SARADC_ADC_STATUS), 20000);
if (ret) {
printf("ADC Timeout");
return;
}
/* Read the data from the SARADC. */
reg = readl((SARADC_BASE + SARADC_DATA));
/* Turn the SARADC back off so it's ready to be used again. */
writel(0, (SARADC_BASE + SARADC_CTRL));
/*
* If the value is less than 30 the button is being pressed.
* Reset the device back into Rockchip download mode.
*/
if (reg <= 30) {
printf("download key pressed, entering download mode...");
writel(BOOT_BROM_DOWNLOAD, CONFIG_ROCKCHIP_BOOT_MODE_REG);
do_reset(NULL, 0, 0, NULL);
}
};
/*
* Start LED very early so user knows device is on. Set color
* to red.
*/
void spl_board_init(void)
{
read_func_button();
/* Set GPIO0_C5, GPIO0_C6, and GPIO0_C7 to output. */
writel(GPIO_WRITEMASK(GPIO_C7 | GPIO_C6 | GPIO_C5) | \
(GPIO_C7 | GPIO_C6 | GPIO_C5),

23
board/bsh/imx8mn_smm_s2/ddr3l_timing_256m.c
View file

@ -18,15 +18,15 @@ struct dram_cfg_param ddr_ddrc_cfg[] = {
{ 0x3d400304, 0x1 },
{ 0x3d400030, 0x20 },
{ 0x3d400000, 0xa1040001 },
{ 0x3d400064, 0x610040 },
{ 0x3d400064, 0x300040 },
{ 0x3d4000d0, 0xc00200c5 },
{ 0x3d4000d4, 0x1000b },
{ 0x3d4000dc, 0x1d700004 },
{ 0x3d4000e0, 0x180000 },
{ 0x3d4000e0, 0x580000 },
{ 0x3d4000e4, 0x90000 },
{ 0x3d4000f0, 0x0 },
{ 0x3d4000f0, 0x2 },
{ 0x3d4000f4, 0xee5 },
{ 0x3d400100, 0xc101b0e },
{ 0x3d400100, 0xc100d0e },
{ 0x3d400104, 0x30314 },
{ 0x3d400108, 0x4060509 },
{ 0x3d40010c, 0x2006 },
@ -67,10 +67,10 @@ struct dram_cfg_param ddr_ddrc_cfg[] = {
{ 0x3d400498, 0x7ff },
{ 0x3d40049c, 0xe00 },
{ 0x3d4004a0, 0x7ff },
{ 0x3d402064, 0x28001b },
{ 0x3d402064, 0x14001b },
{ 0x3d4020dc, 0x12200004 },
{ 0x3d4020e0, 0x0 },
{ 0x3d402100, 0x7090b07 },
{ 0x3d4020e0, 0x400000 },
{ 0x3d402100, 0x7090507 },
{ 0x3d402104, 0x20209 },
{ 0x3d402108, 0x3030407 },
{ 0x3d40210c, 0x2006 },
@ -680,12 +680,13 @@ struct dram_cfg_param ddr_fsp0_cfg[] = {
{ 0x54006, 0x140 },
{ 0x54007, 0x1000 },
{ 0x54008, 0x101 },
{ 0x54009, 0x200 },
{ 0x5400b, 0x31f },
{ 0x5400c, 0xc8 },
{ 0x54012, 0x1 },
{ 0x5402f, 0x1d70 },
{ 0x54030, 0x4 },
{ 0x54031, 0x18 },
{ 0x54031, 0x58 },
{ 0x5403a, 0x1323 },
{ 0xd0000, 0x1 },
};
@ -700,11 +701,13 @@ struct dram_cfg_param ddr_fsp1_cfg[] = {
{ 0x54006, 0x140 },
{ 0x54007, 0x1000 },
{ 0x54008, 0x101 },
{ 0x54009, 0x200 },
{ 0x5400b, 0x21f },
{ 0x5400c, 0xc8 },
{ 0x54012, 0x1 },
{ 0x5402f, 0x1220 },
{ 0x54030, 0x4 },
{ 0x54031, 0x40 },
{ 0x5403a, 0x1323 },
{ 0xd0000, 0x1 },
};
@ -886,11 +889,11 @@ struct dram_cfg_param ddr_phy_pie[] = {
{ 0xd00e7, 0x400 },
{ 0x90017, 0x0 },
{ 0x90026, 0x2b },
{ 0x2000b, 0x32 },
{ 0x2000b, 0x1c2 },
{ 0x2000c, 0x64 },
{ 0x2000d, 0x3e8 },
{ 0x2000e, 0x2c },
{ 0x12000b, 0x14 },
{ 0x12000b, 0xbb },
{ 0x12000c, 0x26 },
{ 0x12000d, 0x1a1 },
{ 0x12000e, 0x10 },

14
board/bsh/imx8mn_smm_s2/ddr3l_timing_512m.c
View file

@ -18,15 +18,15 @@ struct dram_cfg_param ddr_ddrc_cfg[] = {
{ 0x3d400304, 0x1 },
{ 0x3d400030, 0x20 },
{ 0x3d400000, 0xa1040001 },
{ 0x3d400064, 0x610068 },
{ 0x3d400064, 0x300068 },
{ 0x3d4000d0, 0xc00200c5 },
{ 0x3d4000d4, 0x1000b },
{ 0x3d4000dc, 0x1d700004 },
{ 0x3d4000e0, 0x180000 },
{ 0x3d4000e0, 0x580000 },
{ 0x3d4000e4, 0x90000 },
{ 0x3d4000f0, 0x0 },
{ 0x3d4000f0, 0x2 },
{ 0x3d4000f4, 0xee5 },
{ 0x3d400100, 0xc101b0e },
{ 0x3d400100, 0xc100d0e },
{ 0x3d400104, 0x30314 },
{ 0x3d400108, 0x4060509 },
{ 0x3d40010c, 0x2006 },
@ -700,11 +700,13 @@ struct dram_cfg_param ddr_fsp1_cfg[] = {
{ 0x54006, 0x140 },
{ 0x54007, 0x1000 },
{ 0x54008, 0x101 },
{ 0x54009, 0x200 },
{ 0x5400b, 0x21f },
{ 0x5400c, 0xc8 },
{ 0x54012, 0x1 },
{ 0x5402f, 0x1220 },
{ 0x54030, 0x4 },
{ 0x54031, 0x40 },
{ 0x5403a, 0x1323 },
{ 0xd0000, 0x1 },
};
@ -886,11 +888,11 @@ struct dram_cfg_param ddr_phy_pie[] = {
{ 0xd00e7, 0x400 },
{ 0x90017, 0x0 },
{ 0x90026, 0x2b },
{ 0x2000b, 0x32 },
{ 0x2000b, 0x1c2 },
{ 0x2000c, 0x64 },
{ 0x2000d, 0x3e8 },
{ 0x2000e, 0x2c },
{ 0x12000b, 0x14 },
{ 0x12000b, 0xbb },
{ 0x12000c, 0x26 },
{ 0x12000d, 0x1a1 },
{ 0x12000e, 0x10 },

15
board/dhelectronics/dh_stm32mp1/board.c
View file

@ -76,14 +76,25 @@
static bool dh_stm32_mac_is_in_ks8851(void)
{
ofnode node;
struct udevice *udev;
u32 reg, cider, ccr;
char path[256];
ofnode node;
int ret;
node = ofnode_path("ethernet1");
if (!ofnode_valid(node))
return false;
if (ofnode_device_is_compatible(node, "micrel,ks8851-mll"))
ret = ofnode_get_path(node, path, sizeof(path));
if (ret)
return false;
ret = uclass_get_device_by_of_path(UCLASS_ETH, path, &udev);
if (ret)
return false;
if (!ofnode_device_is_compatible(node, "micrel,ks8851-mll"))
return false;
/*

6
boot/Kconfig
View file

@ -85,7 +85,7 @@ config FIT_SIGNATURE
using a hash signed and verified using RSA. If
CONFIG_SHA_PROG_HW_ACCEL is defined, i.e support for progressive
hashing is available using hardware, then the RSA library will use
it. See doc/uImage.FIT/signature.txt for more details.
it. See doc/usage/fit/signature.rst for more details.
WARNING: When relying on signed FIT images with a required signature
check the legacy image format is disabled by default, so that
@ -223,8 +223,8 @@ config SPL_LOAD_FIT
1. "loadables" images, other than FDTs, which do not have a "load"
property will not be loaded. This limitation also applies to FPGA
images with the correct "compatible" string.
2. For FPGA images, the supported "compatible" list is in the
doc/uImage.FIT/source_file_format.txt.
2. For FPGA images, the supported "compatible" list may be found in
https://fitspec.osfw.foundation/.
3. FDTs are only loaded for images with an "os" property of "u-boot".
"linux" images are also supported with Falcon boot mode.

2
boot/bootm.c
View file

@ -963,7 +963,7 @@ int bootm_measure(struct bootm_headers *images)
goto unmap_initrd;
if (IS_ENABLED(CONFIG_MEASURE_DEVICETREE)) {
ret = tcg2_measure_data(dev, &elog, 0, images->ft_len,
ret = tcg2_measure_data(dev, &elog, 1, images->ft_len,
(u8 *)images->ft_addr,
EV_TABLE_OF_DEVICES,
strlen("dts") + 1,

2
cmd/Kconfig
View file

@ -622,7 +622,7 @@ config CMD_ZBOOT
Consider using FIT in preference to this since it supports directly
booting both 32- and 64-bit kernels, as well as secure boot.
Documentation is available in doc/uImage.FIT/x86-fit-boot.txt
Documentation is available in doc/usage/fit/x86-fit-boot.rst.
endmenu

2
cmd/sound.c
View file

@ -98,7 +98,7 @@ U_BOOT_CMD(
sound, INT_MAX, 1, do_sound,
"sound sub-system",
"init - initialise the sound driver\n"
"sound play [[[-q|-s] len [freq]] ...] - play sounds\n"
"sound play [len [freq [len [freq ...]]]] - play sounds\n"
" len - duration in ms\n"
" freq - frequency in Hz\n"
);

3
cmd/usb.c
View file

@ -25,9 +25,6 @@
#ifdef CONFIG_USB_STORAGE
static int usb_stor_curr_dev = -1; /* current device */
#endif
#if defined(CONFIG_USB_HOST_ETHER) && !defined(CONFIG_DM_ETH)
static int __maybe_unused usb_ether_curr_dev = -1; /* current ethernet device */
#endif
/* some display routines (info command) */
static char *usb_get_class_desc(unsigned char dclass)

2
common/Kconfig
View file

@ -628,7 +628,7 @@ if CYCLIC
config CYCLIC_MAX_CPU_TIME_US
int "Sets the max allowed time for a cyclic function in us"
default 1000
default 5000
help
The max allowed time for a cyclic function in us. If a functions
takes longer than this duration this function will get unregistered

1
configs/octeon_nic23_defconfig
View file

@ -25,7 +25,6 @@ CONFIG_SYS_PBSIZE=276
CONFIG_SYS_CONSOLE_ENV_OVERWRITE=y
# CONFIG_SYS_DEVICE_NULLDEV is not set
CONFIG_CYCLIC=y
CONFIG_CYCLIC_MAX_CPU_TIME_US=5000
CONFIG_ARCH_MISC_INIT=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_BOARD_LATE_INIT=y

2
doc/board/phytec/phycore-am62x.rst
View file

@ -159,4 +159,4 @@ Further Information
-------------------
Please see :doc:`../ti/am62x_sk` chapter for further AM62 SoC related documentation
and https://docs.phytec.com/phycore-am62x for vendor documentation.
and https://docs.phytec.com/projects/yocto-phycore-am62x/en/latest/ for vendor documentation.

4
doc/board/phytec/phycore-am64x.rst
View file

@ -9,7 +9,7 @@ SoM (System on Module) featuring TI's AM64x SoC. It can be used in combination
with different carrier boards. This module can come with different sizes and
models for DDR, eMMC, SPI NOR Flash and various SoCs from the AM64x family.
A development Kit, called `phyBOARD-Lyra <https://www.phytec.com/product/phyboard-am64x>`_
A development Kit, called `phyBOARD-Electra <https://www.phytec.com/product/phyboard-am64x>`_
is used as a carrier board reference design around the AM64x SoM.
Quickstart
@ -156,4 +156,4 @@ Further Information
-------------------
Please see :doc:`../ti/am64x_evm` chapter for further AM64 SoC related documentation
and https://docs.phytec.com/phycore-am64x for vendor documentation.
and https://docs.phytec.com/projects/yocto-phycore-am64x/en/latest/ for vendor documentation.

29
doc/board/ti/k3.rst
View file

@ -204,6 +204,11 @@ online
Build Procedure
---------------
.. note ::
Make sure you have installed all necessary host package dependencies
before proceeding. See :ref:`build/gcc:Building with GCC`.
Depending on the specifics of your device, you will need three or more
binaries to boot your SoC.
@ -388,6 +393,30 @@ wakeup and main domain and to boot to the U-Boot prompt
| `tispl.bin` for HS devices or `tispl.bin_unsigned` for GP devices
| `u-boot.img` for HS devices or `u-boot.img_unsigned` for GP devices
Capsules
--------
Most K3 boards have support for UEFI capsule update via capsule-on-disk
functionality. Check the ``CONFIG_EFI_CAPSULE_ON_DISK`` config option for
the board under question to verify. If configured, capsules for each of the
binaries above are automatically generated as part of the binary's build.
They are named `<binary>-capsule.bin`. For example, the capsule for
`u-boot.img` would be called `uboot-capsule.bin`.
See :ref:`uefi_capsule_update_ref` for more information on U-Boot's support
for capsule update and how they are applied.
Each board defines the capsules generated, including where those capsules
are applied. See the ``update_info`` definition for a board, typically
found at `board/ti/<board>/evm.c`. For example, `board/ti/am62x/evm.c`.
Usually, if the board has OSPI flash, the capsules will be applied there,
else the boot partition of the eMMC device.
Once applied, the board will have U-Boot binaries in on-board non-volatile
storage. To start booting from that storage, set the bootmode pins
accordingly. Future updates can be performed by using the capsules
generated from the corresponding U-Boot builds.
FIT signature signing
---------------------

9
doc/develop/devicetree/control.rst
View file

@ -113,9 +113,12 @@ SoC being used via Kconfig and set `DEFAULT_DEVICE_TREE=<vendor>/<name>` when
prompted by Kconfig.
However, if `dts/upstream/` hasn't yet received devicetree source file for your
newly added board support then you can add corresponding devicetree source file
as `arch/<arch>/dts/<name>.dts`. To select that add `# CONFIG_OF_UPSTREAM is not
set` and set `DEFAULT_DEVICE_TREE=<name>` when prompted by Kconfig.
newly added board support then one option is that you can add the corresponding
devicetree source file as `arch/<arch>/dts/<name>.dts`. To select that add `#
CONFIG_OF_UPSTREAM is not set` and set `DEFAULT_DEVICE_TREE=<name>` when
prompted by Kconfig. Another option is that you can use use the "pick" option of
`dts/update-dts-subtree.sh` mentioned above to bring in the commits that you
need.
This should include your CPU or SoC's devicetree file. On top of that any U-Boot
specific tweaks (see: :ref:`dttweaks`) can be made for your board.

21
doc/develop/process.rst
View file

@ -34,7 +34,7 @@ It is followed by a *Stabilization Period*.
The end of a Release Cycle is marked by the release of a new U-Boot version.
Merge Window
------------
^^^^^^^^^^^^
The Merge Window is the period when new patches get submitted (and hopefully
accepted) for inclusion into U-Boot mainline. This period lasts for 21 days (3
@ -44,7 +44,7 @@ This is the only time when new code (like support for new processors or new
boards, or other new features or reorganization of code) is accepted.
Twilight Time
-------------
^^^^^^^^^^^^^
Usually patches do not get accepted as they are - the peer review that takes
place will usually require changes and resubmissions of the patches before they
@ -65,13 +65,13 @@ the Merge Window does not preclude patches that were already posted from being
merged for the upcoming release.
Stabilization Period
--------------------
^^^^^^^^^^^^^^^^^^^^
During the Stabilization Period only patches containing bug fixes get
applied.
Corner Cases
------------
^^^^^^^^^^^^
Sometimes it is not clear if a patch contains a bug fix or not.
For example, changes that remove dead code, unused macros etc. or
@ -108,6 +108,19 @@ Differences to the Linux Development Process
In U-Boot, ``"-rc1"`` will only be released after all (or at least most of
the) patches that were submitted during the merge window have been applied.
Resyncing of the device tree subtree
------------------------------------
As explained in :doc:`devicetree/control` some platforms make use of device tree
files which come from a git subtree that mirrors the Linux Kernel sources
itself. For our purposes, we only track releases and not release candidates for
merging in our tree. These merges follow the normal merge window rules.
In the case of specific changes, such as bug fixes or new platform support,
these can be "cherry-picked" and are subject to the normal merge rules. For
example, a bug fix can come in later in the window but a full re-sync only
happens within the merge window itself.
.. _custodians:
Custodians

2
doc/develop/release_cycle.rst
View file

@ -75,7 +75,7 @@ For the next scheduled release, release candidates were made on::
* U-Boot v2024.07-rc4 was released on Mon 03 June 2024.
.. * U-Boot v2024.07-rc5 was released on Mon 17 June 2024.
* U-Boot v2024.07-rc5 was released on Mon 24 June 2024.
Please note that the following dates are planned only and may be deviated from
as needed.

4
doc/develop/testing.rst
View file

@ -69,7 +69,7 @@ build::
./test/py/test.py --bd sandbox_spl --build -k test_spl
See test/py/README.md for more information about the pytest suite.
See :doc:`py_testing` for more information about the pytest suite.
See :doc:`tests_sandbox` for how to run tests directly (not through pytest).
@ -123,7 +123,7 @@ or is covered sparingly. So here are some suggestions:
is much easier to add onto a test - writing a new large test can seem
daunting to most contributors.
See doc:`tests_writing` for how to write tests.
See :doc:`tests_writing` for how to write tests.
Future work

4
doc/develop/uefi/uefi.rst
View file

@ -72,7 +72,7 @@ bootm command. This feature is available if U-Boot is configured with::
CONFIG_BOOTM_EFI=y
A sample configuration is provided as file doc/uImage.FIT/uefi.its.
A sample configuration is provided in :doc:`../../usage/fit/uefi`.
Below you find the output of an example session starting GRUB::
@ -96,7 +96,7 @@ Below you find the output of an example session starting GRUB::
## Transferring control to EFI (at address 404000d0) ...
Welcome to GRUB!
See doc/uImage.FIT/howto.txt for an introduction to FIT images.
See :doc:`../../usage/fit/howto` for an introduction to FIT images.
Configuring UEFI secure boot
~~~~~~~~~~~~~~~~~~~~~~~~~~~~

2
doc/sphinx/requirements.txt
View file

@ -9,7 +9,7 @@ Jinja2==3.1.4
MarkupSafe==2.1.3
packaging==23.2
Pygments==2.17.2
requests==2.31.0
requests==2.32.2
six==1.16.0
snowballstemmer==2.2.0
Sphinx==7.2.6

2
doc/usage/cmd/bootmeth.rst
View file

@ -48,7 +48,7 @@ The format looks like this:
===== === ================== =================================
Order Seq Name Description
===== === ================== =================================
0 0 extlinunx Extlinux boot from a block device
0 0 extlinux Extlinux boot from a block device
1 1 efi EFI boot from an .efi file
2 2 pxe PXE boot from a network device
3 3 sandbox Sandbox boot for testing

2
doc/usage/fit/signature.rst
View file

@ -15,7 +15,7 @@ that it can be verified using a public key later. Provided that the private
key is kept secret and the public key is stored in a non-volatile place,
any image can be verified in this way.
See verified-boot.txt for more general information on verified boot.
See :doc:`verified-boot` for more general information on verified boot.
Concepts

28
doc/usage/fit/source_file_format.rst
View file

@ -192,13 +192,13 @@ type
invalid Invalid Image
aisimage Davinci AIS image
atmelimage ATMEL ROM-Boot Image
copro Coprocessor Image}
copro Coprocessor Image
fdt_legacy legacy Image with Flat Device Tree
filesystem Filesystem Image
firmware Firmware
firmware_ivt Firmware with HABv4 IVT }
firmware_ivt Firmware with HABv4 IVT
flat_dt Flat Device Tree
fpga FPGA Image }
fpga FPGA Device Image (bitstream file, vendor specific)
gpimage TI Keystone SPL Image
imx8image NXP i.MX8 Boot Image
imx8mimage NXP i.MX8M Boot Image
@ -207,31 +207,31 @@ type
kernel_noload Kernel Image (no loading done)
kwbimage Kirkwood Boot Image
lpc32xximage LPC32XX Boot Image
mtk_image MediaTek BootROM loadable Image }
mtk_image MediaTek BootROM loadable Image
multi Multi-File Image
mxsimage Freescale MXS Boot Image
omapimage TI OMAP SPL With GP CH
pblimage Freescale PBL Boot Image
pmmc TI Power Management Micro-Controller Firmware
ramdisk RAMDisk Image
rkimage Rockchip Boot Image }
rksd Rockchip SD Boot Image }
rkspi Rockchip SPI Boot Image }
rkimage Rockchip Boot Image
rksd Rockchip SD Boot Image
rkspi Rockchip SPI Boot Image
script Script
socfpgaimage Altera SoCFPGA CV/AV preloader
socfpgaimage_v1 Altera SoCFPGA A10 preloader
spkgimage Renesas SPKG Image }
spkgimage Renesas SPKG Image
standalone Standalone Program
stm32image STMicroelectronics STM32 Image }
sunxi_egon Allwinner eGON Boot Image }
sunxi_toc0 Allwinner TOC0 Boot Image }
stm32image STMicroelectronics STM32 Image
sunxi_egon Allwinner eGON Boot Image
sunxi_toc0 Allwinner TOC0 Boot Image
tee Trusted Execution Environment Image
ublimage Davinci UBL image
vybridimage Vybrid Boot Image
x86_setup x86 setup.bin
zynqimage Xilinx Zynq Boot Image }
zynqmpbif Xilinx ZynqMP Boot Image (bif) }
zynqmpimage Xilinx ZynqMP Boot Image }
zynqimage Xilinx Zynq Boot Image
zynqmpbif Xilinx ZynqMP Boot Image (bif)
zynqmpimage Xilinx ZynqMP Boot Image
==================== ==================
compression

35
doc/usage/measured_boot.rst
View file

@ -7,19 +7,46 @@ U-Boot can perform a measured boot, the process of hashing various components
of the boot process, extending the results in the TPM and logging the
component's measurement in memory for the operating system to consume.
The functionality is available when booting via the EFI subsystem or 'bootm'
command.
UEFI measured boot
------------------
The EFI subsystem implements the `EFI TCG protocol
<https://trustedcomputinggroup.org/resource/tcg-efi-protocol-specification/>`_
and the `TCG PC Client Specific Platform Firmware Profile Specification
<https://trustedcomputinggroup.org/resource/pc-client-specific-platform-firmware-profile-specification/>`_
which defines the binaries to be measured and the corresponding PCRs to be used.
Requirements
~~~~~~~~~~~~
* A hardware TPM 2.0 supported by an enabled U-Boot driver
* CONFIG_EFI_TCG2_PROTOCOL=y
* CONFIG_EFI_TCG2_PROTOCOL_EVENTLOG_SIZE=y
* optional CONFIG_EFI_TCG2_PROTOCOL_MEASURE_DTB=y will measure the loaded DTB
in PCR 1
Legacy measured boot
--------------------
The commands booti, bootm, and bootz can be used for measured boot
using the legacy entry point of the Linux kernel.
By default, U-Boot will measure the operating system (linux) image, the
initrd image, and the "bootargs" environment variable. By enabling
CONFIG_MEASURE_DEVICETREE, U-Boot will also measure the devicetree image.
CONFIG_MEASURE_DEVICETREE, U-Boot will also measure the devicetree image in PCR1.
The operating system typically would verify that the hashes found in the
TPM PCRs match the contents of the event log. This can further be checked
against the hash results of previous boots.
Requirements
------------
~~~~~~~~~~~~
* A hardware TPM 2.0 supported by the U-Boot drivers
* CONFIG_TPM=y
* A hardware TPM 2.0 supported by an enabled U-Boot driver
* CONFIG_TPMv2=y
* CONFIG_MEASURED_BOOT=y
* Device-tree configuration of the TPM device to specify the memory area
for event logging. The TPM device node must either contain a phandle to

55
doc/usage/netconsole.rst
View file

@ -3,10 +3,10 @@ Network console
In U-Boot, we implemented the networked console via the standard
"devices" mechanism, which means that you can switch between the
serial and network input/output devices by adjusting the 'stdin' and
'stdout' environment variables. To switch to the networked console,
set either of these variables to "nc". Input and output can be
switched independently.
serial and network input/output devices by adjusting the 'stdin',
'stdout', and 'stderr' environment variables. To switch to the
networked console, set either of these variables to "nc". Input and
output can be switched independently.
The default buffer size can be overridden by setting
CFG_NETCONSOLE_BUFFER_SIZE.
@ -18,14 +18,18 @@ broadcast address and port 6666 are used. If it is set to an IP
address of 0 (or 0.0.0.0) then no messages are sent to the network.
The source / listening port can be configured separately by setting
the 'ncinport' environment variable and the destination port can be
configured by setting the 'ncoutport' environment variable.
configured by setting the 'ncoutport' environment variable. Note that
you need to set up the network interface (e.g. using DHCP) before it
can be used for network console.
For example, if your server IP is 192.168.1.1, you could use::
For example, if your server IP is 192.168.1.1, you could use:
=> setenv nc 'setenv stdout nc;setenv stdin nc'
=> setenv ncip 192.168.1.1
=> saveenv
=> run nc
.. prompt:: bash =>
env set nc 'env set stdout nc; env set stderr nc; env set stdin nc'
env set ncip '192.168.1.1'
env save
run nc
On the host side, please use this script to access the console
@ -107,3 +111,34 @@ as follows:
Note that unlike the U-Boot implementation the Linux netconsole is
unidirectional, i. e. you have console output only in Linux.
Setup via environment
---------------------
If persistent environment is enabled in your U-Boot configuration, you
can configure the network console using the environment. For example:
.. prompt:: bash =>
env set autoload no
env set hostname "u-boot"
env set bootdelay 5
env set nc 'dhcp; env set stdout nc; env set stderr nc; env set stdin nc'
env set ncip '192.168.1.1'
env set preboot "${preboot}; run nc;"
env save
reset
``autoload no`` tells the ``dhcp`` command to configure the network
interface without trying to load an image. ``hostname "u-boot"`` sets
the hostname to be sent in DHCP requests, so they are easy to
recognize in the DHCP server log. The command in ``nc`` calls ``dhcp``
to make sure the network interface is set up before enabling
netconsole.
Adding ``nc`` to ``preboot`` tells U-Boot to activate netconsole
before trying to find any boot options, so you can interact with it if
desired.
``env save`` stores the settings persistently, and ``reset`` then
triggers a fresh start that will use the changed settings.

2
drivers/core/Kconfig
View file

@ -113,7 +113,7 @@ config DM_EVENT
select EVENT
help
This enables support for generating events related to driver model
operations, such as prbing or removing a device. Subsystems can
operations, such as probing or removing a device. Subsystems can
register a 'spy' function that is called when the event occurs. Such
subsystems must select this option.

1
drivers/dfu/Kconfig
View file

@ -68,6 +68,7 @@ config DFU_RAM
config DFU_SF
bool "SPI flash back end for DFU"
depends on SPI_FLASH || DM_SPI_FLASH
help
This option enables using DFU to read and write to SPI flash based
storage.

170
drivers/mtd/nand/raw/nand_macronix.c
View file

@ -16,13 +16,183 @@
* GNU General Public License for more details.
*/
#include <dm/device_compat.h>
#include <linux/mtd/rawnand.h>
#define ONFI_FEATURE_ADDR_30LFXG18AC_OTP 0x90
#define MACRONIX_30LFXG18AC_OTP_START_PAGE 2
#define MACRONIX_30LFXG18AC_OTP_PAGES 30
#define MACRONIX_30LFXG18AC_OTP_PAGE_SIZE 2112
#define MACRONIX_30LFXG18AC_OTP_SIZE_BYTES \
(MACRONIX_30LFXG18AC_OTP_PAGES * \
MACRONIX_30LFXG18AC_OTP_PAGE_SIZE)
#define MACRONIX_30LFXG18AC_OTP_EN BIT(0)
static int macronix_30lfxg18ac_get_otp_info(struct mtd_info *mtd, size_t len,
size_t *retlen,
struct otp_info *buf)
{
if (len < sizeof(*buf))
return -EINVAL;
/* Always report that OTP is unlocked. Reason is that this
* type of flash chip doesn't provide way to check that OTP
* is locked or not: subfeature parameter is implemented as
* volatile register. Technically OTP region could be locked
* and become readonly, but as there is no way to check it,
* don't allow to lock it ('_lock_user_prot_reg' callback
* always returns -EOPNOTSUPP) and thus we report that OTP
* is unlocked.
*/
buf->locked = 0;
buf->start = 0;
buf->length = MACRONIX_30LFXG18AC_OTP_SIZE_BYTES;
*retlen = sizeof(*buf);
return 0;
}
static int macronix_30lfxg18ac_otp_enable(struct nand_chip *nand)
{
u8 feature_buf[ONFI_SUBFEATURE_PARAM_LEN] = { 0 };
struct mtd_info *mtd;
mtd = nand_to_mtd(nand);
feature_buf[0] = MACRONIX_30LFXG18AC_OTP_EN;
return nand->onfi_set_features(mtd, nand, ONFI_FEATURE_ADDR_30LFXG18AC_OTP, feature_buf);
}
static int macronix_30lfxg18ac_otp_disable(struct nand_chip *nand)
{
u8 feature_buf[ONFI_SUBFEATURE_PARAM_LEN] = { 0 };
struct mtd_info *mtd;
mtd = nand_to_mtd(nand);
return nand->onfi_set_features(mtd, nand, ONFI_FEATURE_ADDR_30LFXG18AC_OTP, feature_buf);
}
static int __macronix_30lfxg18ac_rw_otp(struct mtd_info *mtd,
loff_t offs_in_flash,
size_t len, size_t *retlen,
u_char *buf, bool write)
{
struct nand_chip *nand;
size_t bytes_handled;
off_t offs_in_page;
u64 page;
int ret;
nand = mtd_to_nand(mtd);
nand->select_chip(mtd, 0);
ret = macronix_30lfxg18ac_otp_enable(nand);
if (ret)
goto out_otp;
page = offs_in_flash;
/* 'page' will be result of division. */
offs_in_page = do_div(page, MACRONIX_30LFXG18AC_OTP_PAGE_SIZE);
bytes_handled = 0;
while (bytes_handled < len &&
page < MACRONIX_30LFXG18AC_OTP_PAGES) {
size_t bytes_to_handle;
u64 phys_page = page + MACRONIX_30LFXG18AC_OTP_START_PAGE;
bytes_to_handle = min_t(size_t, len - bytes_handled,
MACRONIX_30LFXG18AC_OTP_PAGE_SIZE -
offs_in_page);
if (write)
ret = nand_prog_page_op(nand, phys_page, offs_in_page,
&buf[bytes_handled], bytes_to_handle);
else
ret = nand_read_page_op(nand, phys_page, offs_in_page,
&buf[bytes_handled], bytes_to_handle);
if (ret)
goto out_otp;
bytes_handled += bytes_to_handle;
offs_in_page = 0;
page++;
}
*retlen = bytes_handled;
out_otp:
if (ret)
dev_err(mtd->dev, "failed to perform OTP IO: %i\n", ret);
ret = macronix_30lfxg18ac_otp_disable(nand);
if (ret)
dev_err(mtd->dev, "failed to leave OTP mode after %s\n",
write ? "write" : "read");
nand->select_chip(mtd, -1);
return ret;
}
static int macronix_30lfxg18ac_write_otp(struct mtd_info *mtd, loff_t to,
size_t len, size_t *rlen,
u_char *buf)
{
return __macronix_30lfxg18ac_rw_otp(mtd, to, len, rlen, (u_char *)buf,
true);
}
static int macronix_30lfxg18ac_read_otp(struct mtd_info *mtd, loff_t from,
size_t len, size_t *rlen,
u_char *buf)
{
return __macronix_30lfxg18ac_rw_otp(mtd, from, len, rlen, buf, false);
}
static int macronix_30lfxg18ac_lock_otp(struct mtd_info *mtd, loff_t from,
size_t len)
{
/* See comment in 'macronix_30lfxg18ac_get_otp_info()'. */
return -EOPNOTSUPP;
}
static void macronix_nand_setup_otp(struct nand_chip *chip)
{
static const char * const supported_otp_models[] = {
"MX30LF1G18AC",
"MX30LF2G18AC",
"MX30LF4G18AC",
};
int i;
if (!chip->onfi_version ||
!(le16_to_cpu(chip->onfi_params.opt_cmd)
& ONFI_OPT_CMD_SET_GET_FEATURES))
return;
for (i = 0; i < ARRAY_SIZE(supported_otp_models); i++) {
if (!strcmp(chip->onfi_params.model, supported_otp_models[i])) {
struct mtd_info *mtd;
mtd = nand_to_mtd(chip);
mtd->_get_user_prot_info = macronix_30lfxg18ac_get_otp_info;
mtd->_read_user_prot_reg = macronix_30lfxg18ac_read_otp;
mtd->_write_user_prot_reg = macronix_30lfxg18ac_write_otp;
mtd->_lock_user_prot_reg = macronix_30lfxg18ac_lock_otp;
return;
}
}
}
static int macronix_nand_init(struct nand_chip *chip)
{
if (nand_is_slc(chip))
chip->bbt_options |= NAND_BBT_SCAN2NDPAGE;
macronix_nand_setup_otp(chip);
return 0;
}

5
drivers/mtd/nand/raw/pxa3xx_nand.c
View file

@ -799,6 +799,11 @@ static void prepare_start_command(struct pxa3xx_nand_info *info, int command)
info->ecc_err_cnt = 0;
info->ndcb3 = 0;
info->need_wait = 0;
/*
* Reset max_bitflips to zero. Once command is complete,
* max_bitflips for this READ is returned in ecc.read_page()
*/
info->max_bitflips = 0;
switch (command) {
case NAND_CMD_READ0:

1
drivers/mtd/ubi/Kconfig
View file

@ -9,6 +9,7 @@ config UBI_SILENCE_MSG
config MTD_UBI
bool "Enable UBI - Unsorted block images"
depends on MTD
select RBTREE
select MTD_PARTITIONS
help

2
drivers/nvme/nvme_show.c
View file

@ -67,7 +67,7 @@ static void print_formats(struct nvme_id_ns *id, struct nvme_ns *ns)
printf("Blk device %d: LBA Format Support:\n", ns->devnum);
for (i = 0; i < id->nlbaf; i++) {
printf("\tLBA Foramt %d Support: ", i);
printf("\tLBA Format %d Support: ", i);
if (i == ns->flbas)
printf("(current)\n");
else

40
drivers/pinctrl/rockchip/pinctrl-rockchip-core.c
View file

@ -13,10 +13,10 @@
#include <linux/libfdt.h>
#include "pinctrl-rockchip.h"
#include <dt-bindings/pinctrl/rockchip.h>
#define MAX_ROCKCHIP_PINS_ENTRIES 30
#define MAX_ROCKCHIP_GPIO_PER_BANK 32
#define RK_FUNC_GPIO 0
static int rockchip_verify_config(struct udevice *dev, u32 bank, u32 pin)
{
@ -131,8 +131,12 @@ static int rockchip_get_mux(struct rockchip_pin_bank *bank, int pin)
if (bank->iomux[iomux_num].type & IOMUX_GPIO_ONLY)
return RK_FUNC_GPIO;
regmap = (bank->iomux[iomux_num].type & IOMUX_SOURCE_PMU)
? priv->regmap_pmu : priv->regmap_base;
if (bank->iomux[iomux_num].type & IOMUX_SOURCE_PMU)
regmap = priv->regmap_pmu;
else if (bank->iomux[iomux_num].type & IOMUX_L_SOURCE_PMU)
regmap = (pin % 8 < 4) ? priv->regmap_pmu : priv->regmap_base;
else
regmap = priv->regmap_base;
/* get basic quadrupel of mux registers and the correct reg inside */
mux_type = bank->iomux[iomux_num].type;
@ -142,6 +146,28 @@ static int rockchip_get_mux(struct rockchip_pin_bank *bank, int pin)
if (bank->recalced_mask & BIT(pin))
rockchip_get_recalced_mux(bank, pin, &reg, &bit, &mask);
if (IS_ENABLED(CONFIG_ROCKCHIP_RK3588)) {
if (bank->bank_num == 0) {
if (pin >= RK_PB4 && pin <= RK_PD7) {
u32 reg0 = 0;
reg0 = reg + 0x4000 - 0xC; /* PMU2_IOC_BASE */
ret = regmap_read(regmap, reg0, &val);
if (ret)
return ret;
ret = ((val >> bit) & mask);
if (ret != 8)
return ret;
reg = reg + 0x8000; /* BUS_IOC_BASE */
regmap = priv->regmap_base;
}
} else if (bank->bank_num > 0) {
reg += 0x8000; /* BUS_IOC_BASE */
}
}
ret = regmap_read(regmap, reg, &val);
if (ret)
return ret;
@ -171,7 +197,7 @@ static int rockchip_verify_mux(struct rockchip_pin_bank *bank,
}
if (bank->iomux[iomux_num].type & IOMUX_GPIO_ONLY) {
if (mux != IOMUX_GPIO_ONLY) {
if (mux != RK_FUNC_GPIO) {
debug("pin %d only supports a gpio mux\n", pin);
return -ENOTSUPP;
}
@ -531,12 +557,14 @@ static struct rockchip_pin_ctrl *rockchip_pinctrl_get_soc_data(struct udevice *d
/* preset iomux offset value, set new start value */
if (iom->offset >= 0) {
if (iom->type & IOMUX_SOURCE_PMU)
if ((iom->type & IOMUX_SOURCE_PMU) ||
(iom->type & IOMUX_L_SOURCE_PMU))
pmu_offs = iom->offset;
else
grf_offs = iom->offset;
} else { /* set current iomux offset */
iom->offset = (iom->type & IOMUX_SOURCE_PMU) ?
iom->offset = ((iom->type & IOMUX_SOURCE_PMU) ||
(iom->type & IOMUX_L_SOURCE_PMU)) ?
pmu_offs : grf_offs;
}

54
drivers/power/regulator/rk8xx.c
View file

@ -519,7 +519,7 @@ static int _buck_get_enable(struct udevice *pmic, int buck)
if (ret < 0)
return ret;
return ret & mask ? true : false;
return (ret & mask) ? true : false;
}
static int _buck_set_suspend_enable(struct udevice *pmic, int buck, bool enable)
@ -584,7 +584,7 @@ static int _buck_get_suspend_enable(struct udevice *pmic, int buck)
val = pmic_reg_read(pmic, RK816_REG_DCDC_SLP_EN);
if (val < 0)
return val;
ret = val & mask ? 1 : 0;
ret = (val & mask) ? 1 : 0;
break;
case RK806_ID:
{
@ -607,7 +607,7 @@ static int _buck_get_suspend_enable(struct udevice *pmic, int buck)
val = pmic_reg_read(pmic, REG_SLEEP_SET_OFF1);
if (val < 0)
return val;
ret = val & mask ? 0 : 1;
ret = (val & mask) ? 0 : 1;
break;
case RK809_ID:
case RK817_ID:
@ -619,7 +619,7 @@ static int _buck_get_suspend_enable(struct udevice *pmic, int buck)
val = pmic_reg_read(pmic, RK817_POWER_SLP_EN(0));
if (val < 0)
return val;
ret = val & mask ? 1 : 0;
ret = (val & mask) ? 1 : 0;
break;
default:
ret = -EINVAL;
@ -722,7 +722,7 @@ static int _ldo_get_enable(struct udevice *pmic, int ldo)
if (ret < 0)
return ret;
return ret & mask ? true : false;
return (ret & mask) ? true : false;
}
static int _nldo_get_enable(struct udevice *pmic, int nldo)
@ -979,7 +979,7 @@ static int _ldo_get_suspend_enable(struct udevice *pmic, int ldo)
val = pmic_reg_read(pmic, RK816_REG_LDO_SLP_EN);
if (val < 0)
return val;
ret = val & mask ? 1 : 0;
ret = (val & mask) ? 1 : 0;
break;
case RK808_ID:
case RK818_ID:
@ -987,7 +987,7 @@ static int _ldo_get_suspend_enable(struct udevice *pmic, int ldo)
val = pmic_reg_read(pmic, REG_SLEEP_SET_OFF2);
if (val < 0)
return val;
ret = val & mask ? 0 : 1;
ret = (val & mask) ? 0 : 1;
break;
case RK809_ID:
case RK817_ID:
@ -996,13 +996,13 @@ static int _ldo_get_suspend_enable(struct udevice *pmic, int ldo)
val = pmic_reg_read(pmic, RK817_POWER_SLP_EN(0));
if (val < 0)
return val;
ret = val & mask ? 1 : 0;
ret = (val & mask) ? 1 : 0;
} else {
mask = 1 << ldo;
val = pmic_reg_read(pmic, RK817_POWER_SLP_EN(1));
if (val < 0)
return val;
ret = val & mask ? 1 : 0;
ret = (val & mask) ? 1 : 0;
}
break;
}
@ -1133,14 +1133,14 @@ static int buck_get_enable(struct udevice *dev)
return _buck_get_enable(dev->parent, buck);
}
static int _ldo_get_value(struct udevice *dev, const struct rk8xx_reg_info *info)
static int _ldo_get_value(struct udevice *pmic, const struct rk8xx_reg_info *info)
{
int mask = info->vsel_mask;
int ret, val;
if (info->vsel_reg == NA)
return -ENOSYS;
ret = pmic_reg_read(dev->parent, info->vsel_reg);
ret = pmic_reg_read(pmic, info->vsel_reg);
if (ret < 0)
return ret;
val = ret & mask;
@ -1153,7 +1153,7 @@ static int ldo_get_value(struct udevice *dev)
int ldo = dev->driver_data - 1;
const struct rk8xx_reg_info *info = get_ldo_reg(dev->parent, ldo, 0);
return _ldo_get_value(dev, info);
return _ldo_get_value(dev->parent, info);
}
static int nldo_get_value(struct udevice *dev)
@ -1161,7 +1161,7 @@ static int nldo_get_value(struct udevice *dev)
int nldo = dev->driver_data - 1;
const struct rk8xx_reg_info *info = get_nldo_reg(dev->parent, nldo, 0);
return _ldo_get_value(dev, info);
return _ldo_get_value(dev->parent, info);
}
static int pldo_get_value(struct udevice *dev)
@ -1169,10 +1169,10 @@ static int pldo_get_value(struct udevice *dev)
int pldo = dev->driver_data - 1;
const struct rk8xx_reg_info *info = get_pldo_reg(dev->parent, pldo, 0);
return _ldo_get_value(dev, info);
return _ldo_get_value(dev->parent, info);
}
static int _ldo_set_value(struct udevice *dev, const struct rk8xx_reg_info *info, int uvolt)
static int _ldo_set_value(struct udevice *pmic, const struct rk8xx_reg_info *info, int uvolt)
{
int mask = info->vsel_mask;
int val;
@ -1188,7 +1188,7 @@ static int _ldo_set_value(struct udevice *dev, const struct rk8xx_reg_info *info
debug("%s: volt=%d, reg=0x%x, mask=0x%x, val=0x%x\n",
__func__, uvolt, info->vsel_reg, mask, val);
return pmic_clrsetbits(dev->parent, info->vsel_reg, mask, val);
return pmic_clrsetbits(pmic, info->vsel_reg, mask, val);
}
static int ldo_set_value(struct udevice *dev, int uvolt)
@ -1196,7 +1196,7 @@ static int ldo_set_value(struct udevice *dev, int uvolt)
int ldo = dev->driver_data - 1;
const struct rk8xx_reg_info *info = get_ldo_reg(dev->parent, ldo, uvolt);
return _ldo_set_value(dev, info, uvolt);
return _ldo_set_value(dev->parent, info, uvolt);
}
static int nldo_set_value(struct udevice *dev, int uvolt)
@ -1204,7 +1204,7 @@ static int nldo_set_value(struct udevice *dev, int uvolt)
int nldo = dev->driver_data - 1;
const struct rk8xx_reg_info *info = get_nldo_reg(dev->parent, nldo, uvolt);
return _ldo_set_value(dev, info, uvolt);
return _ldo_set_value(dev->parent, info, uvolt);
}
static int pldo_set_value(struct udevice *dev, int uvolt)
@ -1212,10 +1212,10 @@ static int pldo_set_value(struct udevice *dev, int uvolt)
int pldo = dev->driver_data - 1;
const struct rk8xx_reg_info *info = get_pldo_reg(dev->parent, pldo, uvolt);
return _ldo_set_value(dev, info, uvolt);
return _ldo_set_value(dev->parent, info, uvolt);
}
static int _ldo_set_suspend_value(struct udevice *dev, const struct rk8xx_reg_info *info, int uvolt)
static int _ldo_set_suspend_value(struct udevice *pmic, const struct rk8xx_reg_info *info, int uvolt)
{
int mask = info->vsel_mask;
int val;
@ -1231,7 +1231,7 @@ static int _ldo_set_suspend_value(struct udevice *dev, const struct rk8xx_reg_in
debug("%s: volt=%d, reg=0x%x, mask=0x%x, val=0x%x\n",
__func__, uvolt, info->vsel_sleep_reg, mask, val);
return pmic_clrsetbits(dev->parent, info->vsel_sleep_reg, mask, val);
return pmic_clrsetbits(pmic, info->vsel_sleep_reg, mask, val);
}
static int ldo_set_suspend_value(struct udevice *dev, int uvolt)
@ -1258,7 +1258,7 @@ static int pldo_set_suspend_value(struct udevice *dev, int uvolt)
return _ldo_set_suspend_value(dev->parent, info, uvolt);
}
static int _ldo_get_suspend_value(struct udevice *dev, const struct rk8xx_reg_info *info)
static int _ldo_get_suspend_value(struct udevice *pmic, const struct rk8xx_reg_info *info)
{
int mask = info->vsel_mask;
int val, ret;
@ -1266,7 +1266,7 @@ static int _ldo_get_suspend_value(struct udevice *dev, const struct rk8xx_reg_in
if (info->vsel_sleep_reg == NA)
return -ENOSYS;
ret = pmic_reg_read(dev->parent, info->vsel_sleep_reg);
ret = pmic_reg_read(pmic, info->vsel_sleep_reg);
if (ret < 0)
return ret;
@ -1437,7 +1437,7 @@ static int switch_get_enable(struct udevice *dev)
if (ret < 0)
return ret;
return ret & mask ? true : false;
return (ret & mask) ? true : false;
}
static int switch_set_suspend_value(struct udevice *dev, int uvolt)
@ -1492,21 +1492,21 @@ static int switch_get_suspend_enable(struct udevice *dev)
val = pmic_reg_read(dev->parent, REG_SLEEP_SET_OFF1);
if (val < 0)
return val;
ret = val & mask ? 0 : 1;
ret = (val & mask) ? 0 : 1;
break;
case RK809_ID:
mask = 1 << (sw + 6);
val = pmic_reg_read(dev->parent, RK817_POWER_SLP_EN(0));
if (val < 0)
return val;
ret = val & mask ? 1 : 0;
ret = (val & mask) ? 1 : 0;
break;
case RK818_ID:
mask = 1 << 6;
val = pmic_reg_read(dev->parent, REG_SLEEP_SET_OFF1);
if (val < 0)
return val;
ret = val & mask ? 0 : 1;
ret = (val & mask) ? 0 : 1;
break;
}

46
drivers/usb/dwc3/ep0.c
View file

@ -60,7 +60,7 @@ static int dwc3_ep0_start_trans(struct dwc3 *dwc, u8 epnum, dma_addr_t buf_dma,
dep = dwc->eps[epnum];
if (dep->flags & DWC3_EP_BUSY) {
dev_vdbg(dwc->dev, "%s still busy", dep->name);
dev_vdbg(dwc->dev, "%s still busy\n", dep->name);
return 0;
}
@ -237,9 +237,9 @@ int dwc3_gadget_ep0_queue(struct usb_ep *ep, struct usb_request *request,
goto out;
}
dev_vdbg(dwc->dev, "queueing request %p to %s length %d state '%s'",
request, dep->name, request->length,
dwc3_ep0_state_string(dwc->ep0state));
dev_vdbg(dwc->dev, "queueing request %p to %s length %d state '%s\n'",
request, dep->name, request->length,
dwc3_ep0_state_string(dwc->ep0state));
ret = __dwc3_gadget_ep0_queue(dep, req);
@ -696,35 +696,35 @@ static int dwc3_ep0_std_request(struct dwc3 *dwc, struct usb_ctrlrequest *ctrl)
switch (ctrl->bRequest) {
case USB_REQ_GET_STATUS:
dev_vdbg(dwc->dev, "USB_REQ_GET_STATUS");
dev_vdbg(dwc->dev, "USB_REQ_GET_STATUS\n");
ret = dwc3_ep0_handle_status(dwc, ctrl);
break;
case USB_REQ_CLEAR_FEATURE:
dev_vdbg(dwc->dev, "USB_REQ_CLEAR_FEATURE");
dev_vdbg(dwc->dev, "USB_REQ_CLEAR_FEATURE\n");
ret = dwc3_ep0_handle_feature(dwc, ctrl, 0);
break;
case USB_REQ_SET_FEATURE:
dev_vdbg(dwc->dev, "USB_REQ_SET_FEATURE");
dev_vdbg(dwc->dev, "USB_REQ_SET_FEATURE\n");
ret = dwc3_ep0_handle_feature(dwc, ctrl, 1);
break;
case USB_REQ_SET_ADDRESS:
dev_vdbg(dwc->dev, "USB_REQ_SET_ADDRESS");
dev_vdbg(dwc->dev, "USB_REQ_SET_ADDRESS\n");
ret = dwc3_ep0_set_address(dwc, ctrl);
break;
case USB_REQ_SET_CONFIGURATION:
dev_vdbg(dwc->dev, "USB_REQ_SET_CONFIGURATION");
dev_vdbg(dwc->dev, "USB_REQ_SET_CONFIGURATION\n");
ret = dwc3_ep0_set_config(dwc, ctrl);
break;
case USB_REQ_SET_SEL:
dev_vdbg(dwc->dev, "USB_REQ_SET_SEL");
dev_vdbg(dwc->dev, "USB_REQ_SET_SEL\n");
ret = dwc3_ep0_set_sel(dwc, ctrl);
break;
case USB_REQ_SET_ISOCH_DELAY:
dev_vdbg(dwc->dev, "USB_REQ_SET_ISOCH_DELAY");
dev_vdbg(dwc->dev, "USB_REQ_SET_ISOCH_DELAY\n");
ret = dwc3_ep0_set_isoch_delay(dwc, ctrl);
break;
default:
dev_vdbg(dwc->dev, "Forwarding to gadget driver");
dev_vdbg(dwc->dev, "Forwarding to gadget driver\n");
ret = dwc3_ep0_delegate_req(dwc, ctrl);
break;
}
@ -910,17 +910,17 @@ static void dwc3_ep0_xfer_complete(struct dwc3 *dwc,
switch (dwc->ep0state) {
case EP0_SETUP_PHASE:
dev_vdbg(dwc->dev, "Setup Phase");
dev_vdbg(dwc->dev, "Setup Phase\n");
dwc3_ep0_inspect_setup(dwc, event);
break;
case EP0_DATA_PHASE:
dev_vdbg(dwc->dev, "Data Phase");
dev_vdbg(dwc->dev, "Data Phase\n");
dwc3_ep0_complete_data(dwc, event);
break;
case EP0_STATUS_PHASE:
dev_vdbg(dwc->dev, "Status Phase");
dev_vdbg(dwc->dev, "Status Phase\n");
dwc3_ep0_complete_status(dwc, event);
break;
default:
@ -1046,7 +1046,7 @@ static void dwc3_ep0_xfernotready(struct dwc3 *dwc,
switch (event->status) {
case DEPEVT_STATUS_CONTROL_DATA:
dev_vdbg(dwc->dev, "Control Data");
dev_vdbg(dwc->dev, "Control Data\n");
/*
* We already have a DATA transfer in the controller's cache,
@ -1060,7 +1060,7 @@ static void dwc3_ep0_xfernotready(struct dwc3 *dwc,
if (dwc->ep0_expect_in != event->endpoint_number) {
struct dwc3_ep *dep = dwc->eps[dwc->ep0_expect_in];
dev_vdbg(dwc->dev, "Wrong direction for Data phase");
dev_vdbg(dwc->dev, "Wrong direction for Data phase\n");
dwc3_ep0_end_control_data(dwc, dep);
dwc3_ep0_stall_and_restart(dwc);
return;
@ -1072,13 +1072,13 @@ static void dwc3_ep0_xfernotready(struct dwc3 *dwc,
if (dwc->ep0_next_event != DWC3_EP0_NRDY_STATUS)
return;
dev_vdbg(dwc->dev, "Control Status");
dev_vdbg(dwc->dev, "Control Status\n");
dwc->ep0state = EP0_STATUS_PHASE;
if (dwc->delayed_status) {
WARN_ON_ONCE(event->endpoint_number != 1);
dev_vdbg(dwc->dev, "Delayed Status");
dev_vdbg(dwc->dev, "Delayed Status\n");
return;
}
@ -1091,10 +1091,10 @@ void dwc3_ep0_interrupt(struct dwc3 *dwc,
{
u8 epnum = event->endpoint_number;
dev_dbg(dwc->dev, "%s while ep%d%s in state '%s'",
dwc3_ep_event_string(event->endpoint_event),
epnum >> 1, (epnum & 1) ? "in" : "out",
dwc3_ep0_state_string(dwc->ep0state));
dev_dbg(dwc->dev, "%s while ep%d%s in state '%s'\n",
dwc3_ep_event_string(event->endpoint_event),
epnum >> 1, (epnum & 1) ? "in" : "out",
dwc3_ep0_state_string(dwc->ep0state));
switch (event->endpoint_event) {
case DWC3_DEPEVT_XFERCOMPLETE:

4
drivers/usb/dwc3/gadget.c
View file

@ -248,7 +248,7 @@ void dwc3_gadget_giveback(struct dwc3_ep *dep, struct dwc3_request *req,
list_del(&req->list);
req->trb = NULL;
if (req->request.length)
if (req->request.dma && req->request.length)
dwc3_flush_cache((uintptr_t)req->request.dma, req->request.length);
if (req->request.status == -EINPROGRESS)
@ -256,7 +256,7 @@ void dwc3_gadget_giveback(struct dwc3_ep *dep, struct dwc3_request *req,
if (dwc->ep0_bounced && dep->number == 0)
dwc->ep0_bounced = false;
else
else if (req->request.dma)
usb_gadget_unmap_request(&dwc->gadget, &req->request,
req->direction);

2
drivers/usb/host/usb-uclass.c
View file

@ -387,7 +387,7 @@ int usb_init(void)
/* if we were not able to find at least one working bus, bail out */
if (controllers_initialized == 0)
printf("No working controllers found\n");
printf("No USB controllers found\n");
return usb_started ? 0 : -ENOENT;
}

12
include/bootmeth.h
View file

@ -42,7 +42,7 @@ struct bootmeth_ops {
/**
* get_state_desc() - get detailed state information
*
* Prodecues a textual description of the state of the bootmeth. This
* Produces a textual description of the state of the boot method. This
* can include newline characters if it extends to multiple lines. It
* must be a nul-terminated string.
*
@ -140,7 +140,7 @@ struct bootmeth_ops {
* @dev: Bootmethod device to boot
* @bflow: Bootflow to boot
* Return: does not return on success, since it should boot the
* Operating Systemn. Returns -EFAULT if that fails, -ENOTSUPP if
* operating system. Returns -EFAULT if that fails, -ENOTSUPP if
* trying method resulted in finding out that is not actually
* supported for this boot and should not be tried again unless
* something changes, other -ve on other error
@ -153,7 +153,7 @@ struct bootmeth_ops {
/**
* bootmeth_get_state_desc() - get detailed state information
*
* Prodecues a textual description of the state of the bootmeth. This
* Produces a textual description of the state of the boot method. This
* can include newline characters if it extends to multiple lines. It
* must be a nul-terminated string.
*
@ -246,7 +246,7 @@ int bootmeth_read_file(struct udevice *dev, struct bootflow *bflow,
* @dev: Bootmethod device to use
* @bflow: Bootflow to read
* Return: does not return on success, since it should boot the
* Operating Systemn. Returns -EFAULT if that fails, other -ve on
* operating system. Returns -EFAULT if that fails, other -ve on
* other error
*/
int bootmeth_read_all(struct udevice *dev, struct bootflow *bflow);
@ -257,7 +257,7 @@ int bootmeth_read_all(struct udevice *dev, struct bootflow *bflow);
* @dev: Bootmethod device to boot
* @bflow: Bootflow to boot
* Return: does not return on success, since it should boot the
* Operating Systemn. Returns -EFAULT if that fails, other -ve on
* operating system. Returns -EFAULT if that fails, other -ve on
* other error
*/
int bootmeth_boot(struct udevice *dev, struct bootflow *bflow);
@ -266,7 +266,7 @@ int bootmeth_boot(struct udevice *dev, struct bootflow *bflow);
* bootmeth_setup_iter_order() - Set up the ordering of bootmeths to scan
*
* This sets up the ordering information in @iter, based on the selected
* ordering of the bootmethds in bootstd_priv->bootmeth_order. If there is no
* ordering of the boot methods in bootstd_priv->bootmeth_order. If there is no
* ordering there, then all bootmethods are added
*
* @iter: Iterator to update with the order

4
lib/efi_loader/capsule_esl.dtsi.in
View file

@ -1,9 +1,9 @@
// SPDX-License-Identifier: GPL-2.0+
/**
/*
* Devicetree file with the public key EFI Signature List(ESL)
* node. This file is used to generate the dtsi file to be
* included into the DTB.
*/
*/
/ {
signature {
capsule-key = /incbin/("ESL_BIN_FILE");

130
lib/efi_loader/efi_tcg2.c
View file

@ -254,8 +254,8 @@ efi_tcg2_get_capability(struct efi_tcg2_protocol *this,
capability->protocol_version.major = 1;
capability->protocol_version.minor = 1;
efi_ret = tcg2_platform_get_tpm2(&dev);
if (efi_ret != EFI_SUCCESS) {
ret = tcg2_platform_get_tpm2(&dev);
if (ret) {
capability->supported_event_logs = 0;
capability->hash_algorithm_bitmap = 0;
capability->tpm_present_flag = false;
@ -350,8 +350,7 @@ efi_tcg2_get_eventlog(struct efi_tcg2_protocol *this,
goto out;
}
ret = tcg2_platform_get_tpm2(&dev);
if (ret != EFI_SUCCESS) {
if (tcg2_platform_get_tpm2(&dev)) {
event_log_location = NULL;
event_log_last_entry = NULL;
*event_log_truncated = false;
@ -386,7 +385,7 @@ static efi_status_t tcg2_hash_pe_image(void *efi, u64 efi_size,
void *new_efi = NULL;
u8 hash[TPM2_SHA512_DIGEST_SIZE];
struct udevice *dev;
efi_status_t ret;
efi_status_t ret = EFI_SUCCESS;
u32 active;
int i;
@ -401,12 +400,13 @@ static efi_status_t tcg2_hash_pe_image(void *efi, u64 efi_size,
goto out;
}
ret = tcg2_platform_get_tpm2(&dev);
if (ret != EFI_SUCCESS)
if (tcg2_platform_get_tpm2(&dev)) {
ret = EFI_DEVICE_ERROR;
goto out;
}
ret = tcg2_get_active_pcr_banks(dev, &active);
if (ret != EFI_SUCCESS) {
if (tcg2_get_active_pcr_banks(dev, &active)) {
ret = EFI_DEVICE_ERROR;
goto out;
}
@ -470,12 +470,12 @@ efi_status_t tcg2_measure_pe_image(void *efi, u64 efi_size,
IMAGE_DOS_HEADER *dos;
IMAGE_NT_HEADERS32 *nt;
struct efi_handler *handler;
int rc;
if (!is_tcg2_protocol_installed())
return EFI_SUCCESS;
ret = tcg2_platform_get_tpm2(&dev);
if (ret != EFI_SUCCESS)
if (tcg2_platform_get_tpm2(&dev))
return EFI_SECURITY_VIOLATION;
switch (handle->image_type) {
@ -499,9 +499,9 @@ efi_status_t tcg2_measure_pe_image(void *efi, u64 efi_size,
if (ret != EFI_SUCCESS)
return ret;
ret = tcg2_pcr_extend(dev, pcr_index, &digest_list);
if (ret != EFI_SUCCESS)
return ret;
rc = tcg2_pcr_extend(dev, pcr_index, &digest_list);
if (rc)
return EFI_DEVICE_ERROR;
ret = efi_search_protocol(&handle->header,
&efi_guid_loaded_image_device_path, &handler);
@ -571,9 +571,10 @@ efi_tcg2_hash_log_extend_event(struct efi_tcg2_protocol *this, u64 flags,
struct efi_tcg2_event *efi_tcg_event)
{
struct udevice *dev;
efi_status_t ret;
efi_status_t ret = EFI_SUCCESS;
u32 event_type, pcr_index, event_size;
struct tpml_digest_values digest_list;
int rc = 0;
EFI_ENTRY("%p, %llu, %llu, %llu, %p", this, flags, data_to_hash,
data_to_hash_len, efi_tcg_event);
@ -583,9 +584,10 @@ efi_tcg2_hash_log_extend_event(struct efi_tcg2_protocol *this, u64 flags,
goto out;
}
ret = tcg2_platform_get_tpm2(&dev);
if (ret != EFI_SUCCESS)
if (tcg2_platform_get_tpm2(&dev)) {
ret = EFI_DEVICE_ERROR;
goto out;
}
if (efi_tcg_event->size < efi_tcg_event->header.header_size +
sizeof(u32)) {
@ -618,8 +620,10 @@ efi_tcg2_hash_log_extend_event(struct efi_tcg2_protocol *this, u64 flags,
ret = tcg2_hash_pe_image((void *)(uintptr_t)data_to_hash,
data_to_hash_len, &digest_list);
} else {
ret = tcg2_create_digest(dev, (u8 *)(uintptr_t)data_to_hash,
data_to_hash_len, &digest_list);
rc = tcg2_create_digest(dev, (u8 *)(uintptr_t)data_to_hash,
data_to_hash_len, &digest_list);
if (rc)
ret = EFI_DEVICE_ERROR;
}
if (ret != EFI_SUCCESS)
@ -628,9 +632,11 @@ efi_tcg2_hash_log_extend_event(struct efi_tcg2_protocol *this, u64 flags,
pcr_index = efi_tcg_event->header.pcr_index;
event_type = efi_tcg_event->header.event_type;
ret = tcg2_pcr_extend(dev, pcr_index, &digest_list);
if (ret != EFI_SUCCESS)
rc = tcg2_pcr_extend(dev, pcr_index, &digest_list);
if (rc) {
ret = EFI_DEVICE_ERROR;
goto out;
}
if (flags & EFI_TCG2_EXTEND_ONLY) {
if (event_log.truncated)
@ -669,7 +675,7 @@ efi_tcg2_submit_command(struct efi_tcg2_protocol *this,
u8 *output_param_block)
{
struct udevice *dev;
efi_status_t ret;
efi_status_t ret = EFI_SUCCESS;
u32 rc;
size_t resp_buf_size = output_param_block_size;
@ -681,9 +687,10 @@ efi_tcg2_submit_command(struct efi_tcg2_protocol *this,
goto out;
}
ret = tcg2_platform_get_tpm2(&dev);
if (ret != EFI_SUCCESS)
if (tcg2_platform_get_tpm2(&dev)) {
ret = EFI_DEVICE_ERROR;
goto out;
}
rc = tpm2_submit_command(dev, input_param_block,
output_param_block, &resp_buf_size);
@ -711,19 +718,25 @@ efi_tcg2_get_active_pcr_banks(struct efi_tcg2_protocol *this,
u32 *active_pcr_banks)
{
struct udevice *dev;
efi_status_t ret;
efi_status_t ret = EFI_INVALID_PARAMETER;
EFI_ENTRY("%p, %p", this, active_pcr_banks);
if (!this || !active_pcr_banks) {
ret = EFI_INVALID_PARAMETER;
goto out;
}
ret = tcg2_platform_get_tpm2(&dev);
if (ret != EFI_SUCCESS)
if (!this || !active_pcr_banks)
goto out;
ret = tcg2_get_active_pcr_banks(dev, active_pcr_banks);
if (tcg2_platform_get_tpm2(&dev))
goto out;
/*
* EFI_INVALID_PARAMETER does not convey the problem type.
* but that's what currently the spec specifies.
* EFI_DEVICE_ERROR would be better
*/
if (tcg2_get_active_pcr_banks(dev, active_pcr_banks))
goto out;
ret = EFI_SUCCESS;
out:
return EFI_EXIT(ret);
@ -849,14 +862,15 @@ static efi_status_t measure_event(struct udevice *dev, u32 pcr_index,
u32 event_type, u32 size, u8 event[])
{
struct tpml_digest_values digest_list;
efi_status_t ret;
efi_status_t ret = EFI_DEVICE_ERROR;
int rc;
ret = tcg2_create_digest(dev, event, size, &digest_list);
if (ret != EFI_SUCCESS)
rc = tcg2_create_digest(dev, event, size, &digest_list);
if (rc)
goto out;
ret = tcg2_pcr_extend(dev, pcr_index, &digest_list);
if (ret != EFI_SUCCESS)
rc = tcg2_pcr_extend(dev, pcr_index, &digest_list);
if (rc)
goto out;
ret = tcg2_agile_log_append(pcr_index, event_type, &digest_list,
@ -898,10 +912,10 @@ static efi_status_t efi_init_event_log(void)
struct tcg2_event_log elog;
struct udevice *dev;
efi_status_t ret;
int rc;
ret = tcg2_platform_get_tpm2(&dev);
if (ret != EFI_SUCCESS)
return ret;
if (tcg2_platform_get_tpm2(&dev))
return EFI_DEVICE_ERROR;
ret = efi_allocate_pool(EFI_BOOT_SERVICES_DATA, TPM2_EVENT_LOG_SIZE,
(void **)&event_log.buffer);
@ -930,9 +944,11 @@ static efi_status_t efi_init_event_log(void)
*/
elog.log = event_log.buffer;
elog.log_size = TPM2_EVENT_LOG_SIZE;
ret = tcg2_log_prepare_buffer(dev, &elog, false);
if (ret != EFI_SUCCESS)
rc = tcg2_log_prepare_buffer(dev, &elog, false);
if (rc) {
ret = (rc == -ENOBUFS) ? EFI_BUFFER_TOO_SMALL : EFI_DEVICE_ERROR;
goto free_pool;
}
event_log.pos = elog.log_position;
@ -1303,8 +1319,7 @@ efi_status_t efi_tcg2_measure_dtb(void *dtb)
if (!is_tcg2_protocol_installed())
return EFI_SUCCESS;
ret = tcg2_platform_get_tpm2(&dev);
if (ret != EFI_SUCCESS)
if (tcg2_platform_get_tpm2(&dev))
return EFI_SECURITY_VIOLATION;
rsvmap_size = size_of_rsvmap(dtb);
@ -1328,7 +1343,7 @@ efi_status_t efi_tcg2_measure_dtb(void *dtb)
sha256_update(&hash_ctx, (u8 *)dtb + fdt_off_mem_rsvmap(dtb), rsvmap_size);
sha256_finish(&hash_ctx, blob->data + blob->blob_description_size);
ret = measure_event(dev, 0, EV_POST_CODE, event_size, (u8 *)blob);
ret = measure_event(dev, 1, EV_POST_CODE, event_size, (u8 *)blob);
free(blob);
return ret;
@ -1353,8 +1368,7 @@ efi_status_t efi_tcg2_measure_efi_app_invocation(struct efi_loaded_image_obj *ha
if (tcg2_efi_app_invoked)
return EFI_SUCCESS;
ret = tcg2_platform_get_tpm2(&dev);
if (ret != EFI_SUCCESS)
if (tcg2_platform_get_tpm2(&dev))
return EFI_SECURITY_VIOLATION;
ret = tcg2_measure_boot_variable(dev);
@ -1403,9 +1417,8 @@ efi_status_t efi_tcg2_measure_efi_app_exit(void)
if (!is_tcg2_protocol_installed())
return EFI_SUCCESS;
ret = tcg2_platform_get_tpm2(&dev);
if (ret != EFI_SUCCESS)
return ret;
if (tcg2_platform_get_tpm2(&dev))
return EFI_SECURITY_VIOLATION;
ret = measure_event(dev, 4, EV_EFI_ACTION,
strlen(EFI_RETURNING_FROM_EFI_APPLICATION),
@ -1434,9 +1447,10 @@ efi_tcg2_notify_exit_boot_services(struct efi_event *event, void *context)
goto out;
}
ret = tcg2_platform_get_tpm2(&dev);
if (ret != EFI_SUCCESS)
if (tcg2_platform_get_tpm2(&dev)) {
ret = EFI_SECURITY_VIOLATION;
goto out;
}
ret = measure_event(dev, 5, EV_EFI_ACTION,
strlen(EFI_EXIT_BOOT_SERVICES_INVOCATION),
@ -1466,9 +1480,8 @@ efi_status_t efi_tcg2_notify_exit_boot_services_failed(void)
if (!is_tcg2_protocol_installed())
return EFI_SUCCESS;
ret = tcg2_platform_get_tpm2(&dev);
if (ret != EFI_SUCCESS)
goto out;
if (tcg2_platform_get_tpm2(&dev))
return EFI_SECURITY_VIOLATION;
ret = measure_event(dev, 5, EV_EFI_ACTION,
strlen(EFI_EXIT_BOOT_SERVICES_INVOCATION),
@ -1548,8 +1561,7 @@ efi_status_t efi_tcg2_do_initial_measurement(void)
if (!is_tcg2_protocol_installed())
return EFI_SUCCESS;
ret = tcg2_platform_get_tpm2(&dev);
if (ret != EFI_SUCCESS)
if (tcg2_platform_get_tpm2(&dev))
return EFI_SECURITY_VIOLATION;
ret = tcg2_measure_secure_boot_variable(dev);
@ -1574,8 +1586,7 @@ efi_status_t efi_tcg2_register(void)
struct efi_event *event;
u32 err;
ret = tcg2_platform_get_tpm2(&dev);
if (ret != EFI_SUCCESS) {
if (tcg2_platform_get_tpm2(&dev)) {
log_warning("Missing TPMv2 device for EFI_TCG_PROTOCOL\n");
return EFI_SUCCESS;
}
@ -1583,6 +1594,7 @@ efi_status_t efi_tcg2_register(void)
/* initialize the TPM as early as possible. */
err = tpm_auto_start(dev);
if (err) {
ret = EFI_DEVICE_ERROR;
log_err("TPM startup failed\n");
goto fail;
}

6
lib/efi_loader/efi_variable.c
View file

@ -288,7 +288,6 @@ efi_status_t efi_set_variable_int(const u16 *variable_name,
/* check if a variable exists */
var = efi_var_mem_find(vendor, variable_name, NULL);
append = !!(attributes & EFI_VARIABLE_APPEND_WRITE);
attributes &= ~EFI_VARIABLE_APPEND_WRITE;
delete = !append && (!data_size || !attributes);
/* check attributes */
@ -304,7 +303,7 @@ efi_status_t efi_set_variable_int(const u16 *variable_name,
/* attributes won't be changed */
if (!delete &&
((ro_check && var->attr != attributes) ||
((ro_check && var->attr != (attributes & ~EFI_VARIABLE_APPEND_WRITE)) ||
(!ro_check && ((var->attr & ~EFI_VARIABLE_READ_ONLY)
!= (attributes & ~EFI_VARIABLE_READ_ONLY))))) {
return EFI_INVALID_PARAMETER;
@ -378,7 +377,8 @@ efi_status_t efi_set_variable_int(const u16 *variable_name,
for (; *old_data; ++old_data)
;
++old_data;
ret = efi_var_mem_ins(variable_name, vendor, attributes,
ret = efi_var_mem_ins(variable_name, vendor,
attributes & ~EFI_VARIABLE_APPEND_WRITE,
var->length, old_data, data_size, data,
time);
} else {

2
lib/tpm-v2.c
View file

@ -554,7 +554,7 @@ int tcg2_log_prepare_buffer(struct udevice *dev, struct tcg2_event_log *elog,
if (elog->log_size) {
if (log.found) {
if (elog->log_size < log.log_position)
return -ENOSPC;
return -ENOBUFS;
/*
* Copy the discovered log into the user buffer

2
test/py/requirements.txt
View file

@ -20,7 +20,7 @@ pytest==6.2.5
pytest-xdist==2.5.0
python-mimeparse==1.6.0
python-subunit==1.3.0
requests==2.31.0
requests==2.32.2
setuptools==65.5.1
six==1.16.0
testtools==2.3.0

10
test/py/tests/test_efi_secboot/conftest.py
View file

@ -64,6 +64,12 @@ def efi_boot_env(request, u_boot_config):
check_call('cd %s; %scert-to-efi-sig-list -g %s db1.crt db1.esl; %ssign-efi-sig-list -t "2020-04-05" -c KEK.crt -k KEK.key db db1.esl db1.auth'
% (mnt_point, EFITOOLS_PATH, GUID, EFITOOLS_PATH),
shell=True)
# db2 (APPEND_WRITE)
check_call('cd %s; openssl req -x509 -sha256 -newkey rsa:2048 -subj /CN=TEST_db2/ -keyout db2.key -out db2.crt -nodes -days 365'
% mnt_point, shell=True)
check_call('cd %s; %scert-to-efi-sig-list -g %s db2.crt db2.esl; %ssign-efi-sig-list -a -c KEK.crt -k KEK.key db db2.esl db2.auth'
% (mnt_point, EFITOOLS_PATH, GUID, EFITOOLS_PATH),
shell=True)
# dbx (TEST_dbx certificate)
check_call('cd %s; openssl req -x509 -sha256 -newkey rsa:2048 -subj /CN=TEST_dbx/ -keyout dbx.key -out dbx.crt -nodes -days 365'
% mnt_point, shell=True)
@ -84,6 +90,10 @@ def efi_boot_env(request, u_boot_config):
check_call('cd %s; %scert-to-efi-hash-list -g %s -s 256 db1.crt dbx_hash1.crl; %ssign-efi-sig-list -t "2020-04-06" -c KEK.crt -k KEK.key dbx dbx_hash1.crl dbx_hash1.auth'
% (mnt_point, EFITOOLS_PATH, GUID, EFITOOLS_PATH),
shell=True)
# dbx_hash2 (digest of TEST_db2 certificate, with APPEND_WRITE)
check_call('cd %s; %scert-to-efi-hash-list -g %s -s 256 db2.crt dbx_hash2.crl; %ssign-efi-sig-list -a -c KEK.crt -k KEK.key dbx dbx_hash2.crl dbx_hash2.auth'
% (mnt_point, EFITOOLS_PATH, GUID, EFITOOLS_PATH),
shell=True)
# dbx_db (with TEST_db certificate)
check_call('cd %s; %ssign-efi-sig-list -t "2020-04-05" -c KEK.crt -k KEK.key dbx db.esl dbx_db.auth'
% (mnt_point, EFITOOLS_PATH),

4
test/py/tests/test_efi_secboot/test_authvar.py
View file

@ -183,7 +183,7 @@ class TestEfiAuthVar(object):
assert 'db:' in ''.join(output)
output = u_boot_console.run_command_list([
'fatload host 0:1 4000000 db1.auth',
'fatload host 0:1 4000000 db2.auth',
'setenv -e -nv -bs -rt -a -i 4000000:$filesize db'])
assert 'Failed to set EFI variable' in ''.join(output)
@ -197,7 +197,7 @@ class TestEfiAuthVar(object):
with u_boot_console.log.section('Test Case 3c'):
# Test Case 3c, update with correct signature
output = u_boot_console.run_command_list([
'fatload host 0:1 4000000 db1.auth',
'fatload host 0:1 4000000 db2.auth',
'setenv -e -nv -bs -rt -at -a -i 4000000:$filesize db',
'printenv -e -n -guid d719b2cb-3d3a-4596-a3bc-dad00e67656f db'])
assert 'Failed to set EFI variable' not in ''.join(output)

10
test/py/tests/test_efi_secboot/test_signed.py
View file

@ -177,7 +177,7 @@ class TestEfiSignedImage(object):
with u_boot_console.log.section('Test Case 5b'):
# Test Case 5b, authenticated if both signatures are verified
output = u_boot_console.run_command_list([
'fatload host 0:1 4000000 db1.auth',
'fatload host 0:1 4000000 db2.auth',
'setenv -e -nv -bs -rt -at -a -i 4000000:$filesize db'])
assert 'Failed to set EFI variable' not in ''.join(output)
output = u_boot_console.run_command_list([
@ -201,7 +201,7 @@ class TestEfiSignedImage(object):
with u_boot_console.log.section('Test Case 5d'):
# Test Case 5d, rejected if both of signatures are revoked
output = u_boot_console.run_command_list([
'fatload host 0:1 4000000 dbx_hash1.auth',
'fatload host 0:1 4000000 dbx_hash2.auth',
'setenv -e -nv -bs -rt -at -a -i 4000000:$filesize dbx'])
assert 'Failed to set EFI variable' not in ''.join(output)
output = u_boot_console.run_command_list([
@ -223,7 +223,7 @@ class TestEfiSignedImage(object):
'setenv -e -nv -bs -rt -at -i 4000000:$filesize KEK',
'fatload host 0:1 4000000 PK.auth',
'setenv -e -nv -bs -rt -at -i 4000000:$filesize PK',
'fatload host 0:1 4000000 db1.auth',
'fatload host 0:1 4000000 db2.auth',
'setenv -e -nv -bs -rt -at -a -i 4000000:$filesize db',
'fatload host 0:1 4000000 dbx_hash1.auth',
'setenv -e -nv -bs -rt -at -i 4000000:$filesize dbx'])
@ -300,7 +300,7 @@ class TestEfiSignedImage(object):
'setenv -e -nv -bs -rt -at -i 4000000:$filesize KEK',
'fatload host 0:1 4000000 PK.auth',
'setenv -e -nv -bs -rt -at -i 4000000:$filesize PK',
'fatload host 0:1 4000000 db1.auth',
'fatload host 0:1 4000000 db2.auth',
'setenv -e -nv -bs -rt -at -a -i 4000000:$filesize db',
'fatload host 0:1 4000000 dbx_hash384.auth',
'setenv -e -nv -bs -rt -at -i 4000000:$filesize dbx'])
@ -323,7 +323,7 @@ class TestEfiSignedImage(object):
'setenv -e -nv -bs -rt -at -i 4000000:$filesize KEK',
'fatload host 0:1 4000000 PK.auth',
'setenv -e -nv -bs -rt -at -i 4000000:$filesize PK',
'fatload host 0:1 4000000 db1.auth',
'fatload host 0:1 4000000 db2.auth',
'setenv -e -nv -bs -rt -at -a -i 4000000:$filesize db',
'fatload host 0:1 4000000 dbx_hash512.auth',
'setenv -e -nv -bs -rt -at -i 4000000:$filesize dbx'])

2
tools/rkcommon.c
View file

@ -470,7 +470,7 @@ int rkcommon_verify_header(unsigned char *buf, int size,
* If no 'imagename' is specified via the commandline (e.g. if this is
* 'dumpimage -l' w/o any further constraints), we accept any spl_info.
*/
if (params->imagename == NULL)
if (params->imagename == NULL || !strlen(params->imagename))
return 0;
/* Match the 'imagename' against the 'spl_hdr' found */