Commit graph

1421 commits

Author SHA1 Message Date
Yuri Zaporozhets
7837e273df drivers/video/vesa: use MTRRs only on x86
MTRR functionality is available only on x86, so this driver cannot be compiled
on other architectures. Fix this with preprocessor directives.

Signed-off-by: Yuri Zaporozhets <yuriz@qrv-systems.net>
2024-11-04 16:41:38 -06:00
Eva Kurchatova
722073a065 video: simplefb: Fix build warn with CONFIG_FDT_64BIT=n
Fix compile warning with !CONFIG_FDT_64BIT by
casting the variable in the debug print.

Signed-off-by: Eva Kurchatova <lekkit@at.encryp.ch>
Reported-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2024-10-22 20:56:28 +02:00
Simon Glass
18a85cf7b5 video: Avoid starting a new line to close to the bottom
When starting a new text line, an assumption is made that the current
vertical position is a multiple of the character height. When this is
not true, characters can be written after the end of the framebuffer.

This can causes crashes and strange errors from QEMU.

Adjust the scrolling check when processing a newline character, to
avoid any problems.

Add some comments to make things a little clearer.

Signed-off-by: Simon Glass <sjg@chromium.org>
2024-10-18 14:10:22 -06:00
Simon Glass
52c19173df video: Add a dark-grey console colour
This is useful for highlighting something with a black background, as
is needed with cedit when using a white-on-black console. Add this as
a new colour.

Signed-off-by: Simon Glass <sjg@chromium.org>
2024-10-18 14:10:22 -06:00
Neil Armstrong
8c914e5364 video: meson: dw-hdmi: do not fail probe if HDMI regulator is already enabled
If the regulator is already enabled, this happens if the regulator
is set in regulator-always-on, regulator_set_enable() return -EALREADY.

Ignore the -EALREADY return since it's not an error.

Suggested-by: Jonas Karlman <jonas@kwiboo.se>
Link: https://lore.kernel.org/r/20241009-u-boot-video-fix-hdmi-supply-already-on-v2-1-4478a28d1f49@linaro.org
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2024-10-14 09:06:16 +02:00
Tom Rini
82686e678e Merge branch 'staging' of https://source.denx.de/u-boot/custodians/u-boot-tegra
Assorted Tegra enhancements. Merged with the recent XPL_BUILD changes,
resolve some whitespace issues and fix the name of the new apalis-tk1
env file by Tom.

Signed-off-by: Tom Rini <trini@konsulko.com>
2024-10-13 10:43:24 -06:00
Svyatoslav Ryhel
711fcd3bda video: panel: add Sharp LQ101R1SX01 MIPI DSI panel driver
This module is a color active matrix LCD module incorporating
Oxide TFT (Thin Film Transistor). It is composed of a color TFT-LCD
panel, driver ICs, a control circuit and power supply circuit, and
a backlight unit. Graphics and texts can be displayed on a 2560×1600
dots panel with (16,777,216) colors by using MIPI DUAL DSI interface,
supplying +3.3V DC supply voltage for TFT-LCD panel driving and
supplying DC supply voltage for LED Backlight.

Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
2024-10-13 17:33:46 +03:00
Svyatoslav Ryhel
744bce5123 video: tegra20: dsi: add ganged mode support
Implement ganged mode support for the Tegra DSI driver. The DSI host
controller to gang up with is specified via a phandle in the device tree
and the resolved DSI host controller used for the programming of the
ganged-mode registers.

Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
2024-10-13 17:33:46 +03:00
Svyatoslav Ryhel
68ebc7c86b video: tegra20: dc: remove DECLARE_GLOBAL_DATA_PTR use
It seems that DECLARE_GLOBAL_DATA_PTR use is not needed and video system
works perfectly fine without it.

Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
2024-10-13 17:33:46 +03:00
Simon Glass
5c10c8badf global: Rename SPL_TPL_ to PHASE_
Use PHASE_ as the symbol to select a particular XPL build. This means
that SPL_TPL_ is no-longer set.

Update the comment in bootstage to refer to this symbol, instead of
SPL_

Signed-off-by: Simon Glass <sjg@chromium.org>
2024-10-11 11:44:48 -06:00
Simon Glass
c46760d596 global: Rename SPL_ to XPL_
Use XPL_ as the symbol to indicate an SPL build. This means that SPL_ is
no-longer set.

Signed-off-by: Simon Glass <sjg@chromium.org>
2024-10-11 11:44:48 -06:00
Simon Glass
456bdb70de xpl: Rename spl_phase() to xpl_phase()
Rename this function to indicate that it refers to any xPL phase.

Signed-off-by: Simon Glass <sjg@chromium.org>
2024-10-11 11:44:47 -06:00
Simon Glass
32c24a1705 video: Avoid setting global_data fb_base in video setup
This field is not used, so don't set it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2024-08-26 14:05:38 -06:00
Simon Glass
3430a62568 video: Avoid setting global_data fb_base from SPL handoff
This field is not used, so don't set it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2024-08-26 14:05:38 -06:00
Simon Glass
3876abbbfc zynqmp: Avoid setting the framebuffer address
This is handled by driver model so this driver should not be setting the
framebuffer address. Drop the assignment.

Signed-off-by: Simon Glass <sjg@chromium.org>
2024-08-26 14:05:38 -06:00
Simon Glass
1a36338e68 video: mxs: Avoid setting global_data fb_base
This is not used, so don't set it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2024-08-26 14:05:38 -06:00
Simon Glass
60fa5e9eff video: mxc: Avoid setting global_data fb_base
This is not used, so don't set it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2024-08-26 14:05:37 -06:00
Simon Glass
b5c5923e4e video: Add a function to obtain the framebuffer address
Add a new function which returns the framebuffer address of the first
video device. This will allow the global_data field top be dropped.

Signed-off-by: Simon Glass <sjg@chromium.org>
2024-08-26 14:05:37 -06:00
Simon Glass
5c8dddadf1 video: Use cyclic to handle video sync
At present U-Boot flushes the cache after every character written to
the display. This makes the command-line slower, to the point that
pasting in long strings can fail.

Add a cyclic function to sync the display every 10ms. Enable this by
default.

Allow much longer times for sandbox, since the SDL display is quite
slow.

Avoid size growth if the feature is disabled by making the new init and
destroy functions dependent on CYCLIC being enabled.

Signed-off-by: Simon Glass <sjg@chromium.org>
2024-07-31 16:54:09 +02:00
Simon Glass
b023948e4f video: Move last_sync to private data
Rather than using a static variable, use the video device's private
data to remember when the last video sync was completed. This allows
each display to have its own sync and avoids using static data in SPL.

Signed-off-by: Simon Glass <sjg@chromium.org>
2024-07-31 16:52:51 +02:00
Marek Vasut
109ab9d296 drivers: video: Remove duplicate newlines
Drop all duplicate newlines. No functional change.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2024-07-22 10:53:06 -06:00
Svyatoslav Ryhel
317a6f99fe video: tegra20: dc: use nvidia,head property to identify DC controller
Use existing nvidia,head device tree property to get DC controller id.

Acked-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
2024-07-05 09:01:37 +03:00
Tom Rini
03de305ec4 Restore patch series "arm: dts: am62-beagleplay: Fix Beagleplay Ethernet"
As part of bringing the master branch back in to next, we need to allow
for all of these changes to exist here.

Reported-by: Jonas Karlman <jonas@kwiboo.se>
Signed-off-by: Tom Rini <trini@konsulko.com>
2024-05-20 13:35:03 -06:00
Tom Rini
d678a59d2d Revert "Merge patch series "arm: dts: am62-beagleplay: Fix Beagleplay Ethernet""
When bringing in the series 'arm: dts: am62-beagleplay: Fix Beagleplay
Ethernet"' I failed to notice that b4 noticed it was based on next and
so took that as the base commit and merged that part of next to master.

This reverts commit c8ffd1356d, reversing
changes made to 2ee6f3a5f7.

Reported-by: Jonas Karlman <jonas@kwiboo.se>
Signed-off-by: Tom Rini <trini@konsulko.com>
2024-05-19 08:16:36 -06:00
Tom Rini
a2955579e7 video: Remove <common.h> and add needed includes
Remove <common.h> from this driver directory and when needed
add missing include files directly.

Reviewed-by: Peter Robinson <pbrobinson@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
2024-05-07 08:00:57 -06:00
Tom Rini
9552923ded Merge patch series "Kconfig: some cleanups"
Michal Simek <michal.simek@amd.com> says:

I looked as cleaning up some dependencies and I found that qconfig is
reporting some issues. This series is fixing some of them. But there are
still some other pending. That's why please go and fix them if they are
related to your board.

UTF-8: I am using uni2ascii -B < file to do conversion. When you run it in
a loop you will find some other issue with copyright chars or some issues
in files taken from the Linux kernel like DTs. They should be likely fixed
in the kernel first.
Based on discussion I am ignoring names too.
2024-04-22 11:01:56 -06:00
Michal Simek
81f3a665ab common: Convert *.c/h from UTF-8 to ASCII enconfing
Convert UTF-8 chars to ASCII in cases where make sense. No Copyright or
names are converted.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Acked-by: Marek Behún <kabel@kernel.org>
2024-04-22 11:01:48 -06:00
Devarsh Thakkar
4ac7ffb60e video: Assume video to be active if SPL is passing video hand-off
If SPL is passing video handoff structure to U-boot then it is safe to
assume that SPL has already enabled video and that's why it is passing
video handoff structure to U-boot so that U-boot can preserve the
framebuffer.

Signed-off-by: Devarsh Thakkar <devarsht@ti.com>
Reviewed-by: Nikhil M Jain <n-jain1@ti.com>
2024-04-21 09:07:02 +02:00
Caleb Connolly
91e9687b49 video: simplefb: modernise DT parsing
simplefb was using old style FDT parsing which doesn't behave well in
combination with livetree. Update it to use ofnode instead and add a
missing null check for the "format" property.

Standardise the error logging while we're here.

Fixes: 971d7e6424 ("video: simplefb")
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
2024-04-21 09:07:02 +02:00
Svyatoslav Ryhel
9970634f83 video: renesas: shift the init sequence by one step earlier
Shift all setup stages one step earlier to better fit the
existing uclass.

Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
2024-04-21 09:07:02 +02:00
Svyatoslav Ryhel
3573f2f64c video: bridge: ssd2825: shift the init sequence by one step earlier
Shift all setup stages one step earlier to better fit the
existing uclass.

Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
2024-04-21 09:07:02 +02:00
Svyatoslav Ryhel
2a9ce5f127 video: endeavoru-panel: shift the init sequence by one step earlier
Shift all setup stages one step earlier to better fit the
existing uclass.

Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
2024-04-21 09:07:02 +02:00
Jonas Schwöbel
0afdc32d7c video: bridge: add basic support for the Parade DP501 transmitter
The Parade DP501 is a DP & DVI/HDMI dual-mode transmitter. It
enables an RGB/Parallel SOC output to be converted, packed and
serialized into either DP or TMDS output device. Only DisplayPort
functionality of this transmitter has been implemented and tested.

Signed-off-by: Jonas Schwöbel <jonasschwoebel@yahoo.de>
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
2024-04-21 09:07:02 +02:00
Svyatoslav Ryhel
da16cdeb4e video: bridge: add Toshiba TC358768 RGB to DSI bridge support
Add initial support for the Toshiba TC358768 RGB to DSI bridge.

The driver is based on the mainline Linux Toshiba TC358768
bridge driver and implements the same set of features.

Tested-by: Andreas Westman Dorcsak <hedmoo@yahoo.com> # ASUS TF700T
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
2024-04-21 09:07:02 +02:00
Anton Bambura
d6a6dd9079 video: panel: add Samsung LTL106HL02 MIPI DSI panel driver
LTL106HL02 is a color active matrix TFT (Thin Film Transistor)
liquid crystal display (LCD) that uses amorphous silicon TFT as
switching devices. This model is composed of a TFT LCD panel, a
driver circuit and a backlight unit. The resolution of a 10.6"
contains 1920 x 1080 pixels and can display up to 16,8M color
with wide viewing angle.

Co-developed-by: Jonas Schwöbel <jonasschwoebel@yahoo.de>
Signed-off-by: Jonas Schwöbel <jonasschwoebel@yahoo.de>
Co-developed-by: Svyatoslav Ryhel <clamor95@gmail.com>
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Signed-off-by: Anton Bambura <jenneron@protonmail.com>
2024-04-21 09:07:02 +02:00
Svyatoslav Ryhel
3cb31745c4 video: panel: add LG LG070WX3 MIPI DSI panel driver
The LD070WX3 is a Color Active Matrix Liquid Crystal Display with
an integral Light Emitting Diode (LED) backlight system. The
matrix employs a-Si Thin Film Transistor as the active element. It
is a transmissive type display operating in the normally Black
mode. This TFT-LCD has 7.0 inches diagonally measured active
display area with WXGA resolution (800 by 1280 pixel array).

Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
2024-04-21 09:07:01 +02:00
Jonas Schwöbel
edb8a528f9 video: tegra20: dsi: use set_backlight for backlight only
Shift the backlight set further to prevent visual glitches on
panel init.

Signed-off-by: Jonas Schwöbel <jonasschwoebel@yahoo.de>
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Reviewed-by: Thierry Reding <treding@nvidia.com>
2024-04-21 09:07:01 +02:00
Jonas Schwöbel
580a444288 video: tegra20: dsi: set correct fifo depth
According to Thierry Reding's commit in the linux kernel

976cebc35bed0456a42bf96073a26f251d23b264
"drm/tegra: dsi: Make FIFO depths host parameters"

correct depth of the video FIFO is 1920 *words* no *bytes*

Tested-by: Ion Agorria <ion@agorria.com> # HTC One X
Tested-by: Svyatoslav Ryhel <clamor95@gmail.com> # Nvidia Tegratab T114
Signed-off-by: Jonas Schwöbel <jonasschwoebel@yahoo.de>
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Reviewed-by: Thierry Reding <treding@nvidia.com>
2024-04-21 09:07:01 +02:00
Jonas Schwöbel
2702c6ae55 video: tegra20: dsi: remove pre-configuration
Configuration for DC driver command mode is not required for
every panel. Removed.

Tested-by: Ion Agorria <ion@agorria.com> # HTC One X
Tested-by: Svyatoslav Ryhel <clamor95@gmail.com> # Nvidia Tegratab T114
Signed-off-by: Jonas Schwöbel <jonasschwoebel@yahoo.de>
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Reviewed-by: Thierry Reding <treding@nvidia.com>
2024-04-21 09:07:01 +02:00
Svyatoslav Ryhel
6c4dc89659 video: tegra20: dsi: add reset support
Implement reset use to discard any changes which could have been
applied to DSI before and can interfere with current configuration.

Tested-by: Ion Agorria <ion@agorria.com> # HTC One X
Tested-by: Svyatoslav Ryhel <clamor95@gmail.com> # Nvidia Tegratab T114
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
2024-04-21 09:07:01 +02:00
Svyatoslav Ryhel
f1b1f5e61d video: tegra20: dsi: add T114 support
Existing Tegra DSI driver mostly fits T114 apart MIPI calibration
which on T114 has dedicated driver. To resolve this MIPI calibration
logic was split for pre-T114 and T114+ devices.

Tested-by: Ion Agorria <ion@agorria.com> # HTC One X
Tested-by: Svyatoslav Ryhel <clamor95@gmail.com> # Nvidia Tegratab T114
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Reviewed-by: Thierry Reding <treding@nvidia.com>
2024-04-21 09:07:01 +02:00
Svyatoslav Ryhel
c68d08be49 video: tegra20: add MIPI calibration driver
Dedicated MIPI calibration driver is used on T114 and newer. Before
T114 MIPI calibration registers were part of VI and CSI.

Tested-by: Svyatoslav Ryhel <clamor95@gmail.com> # Nvidia Tegratab T114
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Reviewed-by: Thierry Reding <treding@nvidia.com>
2024-04-21 09:07:01 +02:00
Svyatoslav Ryhel
8fea3369ee video: tegra20: dc: parameterize V- and H-sync polarities
Based on Thierry Reding's Linux commit:

'commit 1716b1891e1de05e2c20ccafa9f58550f3539717
("drm/tegra: rgb: Parameterize V- and H-sync polarities")'

Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Reviewed-by: Thierry Reding <treding@nvidia.com>
2024-04-21 09:07:01 +02:00
Jonas Schwöbel
eb81700018 video: tegra20: dc: clean framebuffer memory block
Fill the framebuffer memory with zeros to avoid visual glitches.

Signed-off-by: Jonas Schwöbel <jonasschwoebel@yahoo.de>
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Reviewed-by: Thierry Reding <treding@nvidia.com>
2024-04-21 09:07:01 +02:00
Jonas Schwöbel
6b4559ba6c video: tegra20: dc: enable backlight after DC is configured
The goal of panel_set_backlight() is to enable backlight. Hence,
it should be called at the probe end.

Signed-off-by: Jonas Schwöbel <jonasschwoebel@yahoo.de>
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Reviewed-by: Thierry Reding <treding@nvidia.com>
2024-04-21 09:07:01 +02:00
Jonas Schwöbel
de903ac9ba video: tegra20: dc: fix printing of framebuffer address
Framebuffer address should not be a pointer.

Signed-off-by: Jonas Schwöbel <jonasschwoebel@yahoo.de>
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
2024-04-21 09:07:01 +02:00
Svyatoslav Ryhel
8c0eb06fbe video: tegra20: dc: configure behavior if PLLD/D2 is used
If DISP1 is a PLLD/D2 child, it cannot go over 370MHz. The cause
of this is not quite clear. This can be overcomed by further
halving the PLLD/D2 if the target parent rate is over 800MHz.
This way DISP1 and DSI clocks will have the same frequency. The
shift divider in this case has to be calculated from the
original PLLD/D2 frequency and is passed from the DSI driver.

Tested-by: Andreas Westman Dorcsak <hedmoo@yahoo.com> # ASUS Grouper E1565
Tested-by: Ion Agorria <ion@agorria.com> # HTC One X
Tested-by: Svyatoslav Ryhel <clamor95@gmail.com> # Nvidia Tegratab T114
Tested-by: Jonas Schwöbel <jonasschwoebel@yahoo.de> # Microsoft Surface 2
Signed-off-by: Jonas Schwöbel <jonasschwoebel@yahoo.de>
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Acked-by: Thierry Reding <treding@nvidia.com>
2024-04-21 09:07:01 +02:00
Svyatoslav Ryhel
8a8bfd8c13 video: tegra20: dc: add powergate
Add powergate use on T114 to complete resetting of DC.

Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Reviewed-by: Thierry Reding <treding@nvidia.com>
2024-04-21 09:07:01 +02:00
Svyatoslav Ryhel
97b6914e2b video: tegra20: dc: add PLLD2 parent support
T30+ SOC have second PLLD - PLLD2 which can be actively used by
DC and act as main DISP1/2 clock parent.

Tested-by: Agneli <poczt@protonmail.ch> # Toshiba AC100 T20
Tested-by: Robert Eckelmann <longnoserob@gmail.com> # ASUS TF101
Tested-by: Andreas Westman Dorcsak <hedmoo@yahoo.com> # ASUS Grouper E1565
Tested-by: Ion Agorria <ion@agorria.com> # HTC One X
Tested-by: Svyatoslav Ryhel <clamor95@gmail.com> # Nvidia Tegratab T114
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Reviewed-by: Thierry Reding <treding@nvidia.com>
2024-04-21 09:07:01 +02:00
Svyatoslav Ryhel
b9ef623c11 video: tegra20: dc: pass DC id to internal devices
Tegra SoC has 2 independent display controllers called DC_A and
DC_B, they are handled differently by internal video devices like
DSI and HDMI controllers so it is important for last to know
which display controller is used to properly set up registers.
To achieve this, a pipe field was added to pdata to pass display
controller id to internal Tegra SoC devices.

Tested-by: Agneli <poczt@protonmail.ch> # Toshiba AC100 T20
Tested-by: Robert Eckelmann <longnoserob@gmail.com> # ASUS TF101
Tested-by: Andreas Westman Dorcsak <hedmoo@yahoo.com> # ASUS Grouper E1565
Tested-by: Ion Agorria <ion@agorria.com> # HTC One X
Tested-by: Svyatoslav Ryhel <clamor95@gmail.com> # Nvidia Tegratab T114
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
2024-04-21 09:07:01 +02:00