video: tegra20: dc: use nvidia,head property to identify DC controller

Use existing nvidia,head device tree property to get DC controller id.

Acked-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
This commit is contained in:
Svyatoslav Ryhel 2024-05-14 09:05:00 +03:00
parent 9ebb154923
commit 317a6f99fe
2 changed files with 3 additions and 7 deletions

View file

@ -49,7 +49,7 @@ struct tegra_lcd_priv {
int dc_clk[2]; /* Contains clk and its parent */
ulong scdiv; /* Clock divider used by disp_clk_ctrl */
bool rotation; /* 180 degree panel turn */
bool pipe; /* DC controller: 0 for A, 1 for B */
int pipe; /* DC controller: 0 for A, 1 for B */
};
enum {
@ -461,9 +461,7 @@ static int tegra_lcd_of_to_plat(struct udevice *dev)
}
priv->rotation = dev_read_bool(dev, "nvidia,180-rotation");
if (!strcmp(dev->name, TEGRA_DC_B))
priv->pipe = 1;
priv->pipe = dev_read_u32_default(dev, "nvidia,head", 0);
rgb = fdt_subnode_offset(blob, node, "rgb");
if (rgb < 0) {

View file

@ -14,15 +14,13 @@
/* arch-tegra/dc exists only because T124 uses it */
#include <asm/arch-tegra/dc.h>
#define TEGRA_DC_A "dc@54200000"
#define TEGRA_DC_B "dc@54240000"
#define TEGRA_DSI_A "dsi@54300000"
#define TEGRA_DSI_B "dsi@54400000"
struct tegra_dc_plat {
struct udevice *dev; /* Display controller device */
struct dc_ctlr *dc; /* Display controller regmap */
bool pipe; /* DC number: 0 for A, 1 for B */
int pipe; /* DC number: 0 for A, 1 for B */
ulong scdiv; /* Shift clock divider */
};