ZynqMP provides two QSPI interfaces on MIO[0..12],
but the existing pin group definitions only allow
all or none of the pins to be configured for QSPI.
This is an issue on platforms that use only the lower
QSPI interface and require the remaining pins to be
configured for other purposes such as general I/O.
Add pin groups to support QSPI on MIO[0..4] with SS
(slave select) on MIO5, freeing up MIO[7..12] for
other uses.
The new pin groups can be accessed from Linux as
'qspi0_1_grp' and 'qspi_ss_1_grp'.
Change-Id: Ibdb3f13d4ba9194a3be8ce5e63478d9066d087ac
Signed-off-by: Carsten Hansen <Carsten.Hansen@bksv.com>
Signed-off-by: Jay Buddhabhatti <jay.buddhabhatti@amd.com>
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