Carsten Hansen fe81d9c959 feat(zynqmp): add pin group for lower qspi interface ... ZynqMP provides two QSPI interfaces on MIO[0..12], but the existing pin group definitions only allow all or none of the pins to be configured for QSPI. This is an issue on platforms that use only the lower QSPI interface and require the remaining pins to be configured for other purposes such as general I/O. Add pin groups to support QSPI on MIO[0..4] with SS (slave select) on MIO5, freeing up MIO[7..12] for other uses. The new pin groups can be accessed from Linux as 'qspi0_1_grp' and 'qspi_ss_1_grp'. Change-Id: Ibdb3f13d4ba9194a3be8ce5e63478d9066d087ac Signed-off-by: Carsten Hansen <Carsten.Hansen@bksv.com> Signed-off-by: Jay Buddhabhatti <jay.buddhabhatti@amd.com>		2025-03-04 04:06:37 -08:00
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common	feat(versal2): add support for platform management	2025-02-20 22:23:12 -08:00
versal	refactor(xilinx): refactor console to support transfer list	2025-02-17 06:11:10 +00:00
versal_net	refactor(xilinx): refactor console to support transfer list	2025-02-17 06:11:10 +00:00
zynqmp	feat(zynqmp): add pin group for lower qspi interface	2025-03-04 04:06:37 -08:00