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refactor(xilinx): refactor console to support transfer list

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Refactor console to support DTB console in case of transfer list.
Simplify logic where SOC specific macros are moved to platform headers
or makefile where XLNX_DT_CFG macro describe if system is DT driven or not.

Change-Id: Id45c03a950b62e83e91a50e0485eacdb233ba745
Signed-off-by: Maheedhar Bollapalli <maheedharsai.bollapalli@amd.com>
This commit is contained in:
Maheedhar Bollapalli 2024-12-04 04:05:04 +00:00
parent c5c108b1aa
commit 4c5cf47f98
5 changed files with 29 additions and 15 deletions
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8
plat/amd/versal2/platform.mk
View file

@ -160,3 +160,11 @@ BL31_SOURCES += plat/amd/common/plat_xfer_list.c
else
BL31_SOURCES += plat/xilinx/common/plat_fdt.c
endif
XLNX_DT_CFG ?= 1
ifeq (${TRANSFER_LIST},0)
ifndef XILINX_OF_BOARD_DTB_ADDR
XLNX_DT_CFG := 0
endif
endif
$(eval $(call add_define,XLNX_DT_CFG))

16
plat/xilinx/common/plat_console.c
View file

@ -31,9 +31,7 @@ static console_t runtime_console;
static console_holder rt_hd_console;
#endif
#if ((CONSOLE_IS(dtb) || RT_CONSOLE_IS(dtb)) && defined(XILINX_OF_BOARD_DTB_ADDR)) && \
(!defined(PLAT_zynqmp) || (defined(PLAT_zynqmp) && \
!IS_TFA_IN_OCM(BL31_BASE)))
#if ((CONSOLE_IS(dtb) || RT_CONSOLE_IS(dtb)) && (XLNX_DT_CFG == 1))
static dt_uart_info_t dt_uart_info;
#endif
@ -78,9 +76,7 @@ static void register_console(const console_holder *consoleh, console_t *console)
console_set_scope(console, consoleh->console_scope);
}
#if ((CONSOLE_IS(dtb) || RT_CONSOLE_IS(dtb)) && defined(XILINX_OF_BOARD_DTB_ADDR)) && \
(!defined(PLAT_zynqmp) || (defined(PLAT_zynqmp) && \
!IS_TFA_IN_OCM(BL31_BASE)))
#if ((CONSOLE_IS(dtb) || RT_CONSOLE_IS(dtb)) && (XLNX_DT_CFG == 1))
/**
* get_baudrate() - Get the baudrate form DTB.
* @dtb: Address of the Device Tree Blob (DTB).
@ -259,9 +255,7 @@ void setup_console(void)
/* For DT code decoding uncomment console registration below */
/* register_console(&boot_hd_console, &boot_console); */
#if ((CONSOLE_IS(dtb) || RT_CONSOLE_IS(dtb)) && defined(XILINX_OF_BOARD_DTB_ADDR)) && \
(!defined(PLAT_zynqmp) || (defined(PLAT_zynqmp) && \
!IS_TFA_IN_OCM(BL31_BASE)))
#if ((CONSOLE_IS(dtb) || RT_CONSOLE_IS(dtb)) && (XLNX_DT_CFG == 1))
/* Parse DTB console for UART information */
if (fdt_get_uart_info(&dt_uart_info) == 0) {
if (CONSOLE_IS(dtb)) {
@ -280,9 +274,7 @@ void setup_console(void)
INFO("BL31: Early console setup\n");
#ifdef CONSOLE_RUNTIME
#if (RT_CONSOLE_IS(dtb) && defined(XILINX_OF_BOARD_DTB_ADDR)) && \
(!defined(PLAT_zynqmp) || (defined(PLAT_zynqmp) && \
!IS_TFA_IN_OCM(BL31_BASE)))
#if (RT_CONSOLE_IS(dtb) && (XLNX_DT_CFG == 1))
rt_hd_console.base = dt_uart_info.base;
rt_hd_console.baud_rate = dt_uart_info.baud_rate;
rt_hd_console.console_type = dt_uart_info.console_type;

6
plat/xilinx/versal/platform.mk
View file

@ -1,5 +1,5 @@
# Copyright (c) 2018-2021, Arm Limited and Contributors. All rights reserved.
# Copyright (c) 2022-2024, Advanced Micro Devices, Inc. All rights reserved.
# Copyright (c) 2022-2025, Advanced Micro Devices, Inc. All rights reserved.
#
# SPDX-License-Identifier: BSD-3-Clause
@ -49,8 +49,12 @@ ifdef VERSAL_PLATFORM
endif
ifdef XILINX_OF_BOARD_DTB_ADDR
XLNX_DT_CFG := 1
$(eval $(call add_define,XILINX_OF_BOARD_DTB_ADDR))
else
XLNX_DT_CFG := 0
endif
$(eval $(call add_define,XLNX_DT_CFG))
PLAT_XLAT_TABLES_DYNAMIC := 0
ifeq (${PLAT_XLAT_TABLES_DYNAMIC},1)

6
plat/xilinx/versal_net/platform.mk
View file

@ -1,6 +1,6 @@
# Copyright (c) 2018-2022, Arm Limited and Contributors. All rights reserved.
# Copyright (c) 2021-2022, Xilinx, Inc. All rights reserved.
# Copyright (c) 2022-2023, Advanced Micro Devices, Inc. All rights reserved.
# Copyright (c) 2022-2025, Advanced Micro Devices, Inc. All rights reserved.
#
# SPDX-License-Identifier: BSD-3-Clause
@ -68,8 +68,12 @@ endif
$(eval $(call add_define_val,VERSAL_NET_CONSOLE,VERSAL_NET_CONSOLE_ID_${VERSAL_NET_CONSOLE}))
ifdef XILINX_OF_BOARD_DTB_ADDR
XLNX_DT_CFG := 1
$(eval $(call add_define,XILINX_OF_BOARD_DTB_ADDR))
else
XLNX_DT_CFG := 0
endif
$(eval $(call add_define,XLNX_DT_CFG))
# Runtime console in default console in DEBUG build
ifeq ($(DEBUG), 1)

8
plat/xilinx/zynqmp/include/platform_def.h
View file

@ -1,7 +1,7 @@
/*
* Copyright (c) 2014-2022, Arm Limited and Contributors. All rights reserved.
* Copyright (c) 2018-2022, Xilinx, Inc. All rights reserved.
* Copyright (c) 2022-2023, Advanced Micro Devices, Inc. All rights reserved.
* Copyright (c) 2022-2025, Advanced Micro Devices, Inc. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@ -173,4 +173,10 @@
INTR_PROP_DESC(ARM_IRQ_SEC_SGI_0, PLAT_SDEI_NORMAL_PRI, grp, \
GIC_INTR_CFG_EDGE)
#if (defined(XILINX_OF_BOARD_DTB_ADDR) && !IS_TFA_IN_OCM(BL31_BASE))
#define XLNX_DT_CFG 1
#else
#define XLNX_DT_CFG 0
#endif
#endif /* PLATFORM_DEF_H */