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arm-trusted-firmware/lib/cpus/aarch64
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Okash Khawaja baeaf292ce refactor(cpus): use BIT macro in a consistent manner 
In assembly code, BIT macro is used with a preceding hash #. Let's
update Cortex X1 code to follow the same convention. Excluding hash
doesn't cause compilation to fail or emit incorrect code.

Signed-off-by: Okash Khawaja <okash@google.com>
Change-Id: If304cdf90542d2edcab3e2d66cd7e905ff7fd047
2023-04-28 13:18:28 +01:00
..
a64fx.S feat(cpus): add a64fx cpu to tf-a 2022-07-07 07:17:25 +09:00
aem_generic.S FVP_Base_AEMv8A platform: Fix cache maintenance operations 2019-08-16 11:30:37 +00:00
cortex_a35.S Cortex-A35: Implement workaround for errata 855472 2019-04-17 13:46:43 +01:00
cortex_a53.S lib/cpus: Report AT speculative erratum workaround 2020-08-18 10:49:27 +01:00
cortex_a55.S feat(plat/qti): fix to support cpu errata 2022-07-29 18:15:32 +05:30
cortex_a57.S fix(security): apply SMCCC_ARCH_WORKAROUND_3 to A73/A75/A72/A57 2022-03-18 01:01:34 +02:00
cortex_a65.S Introducing support for Cortex-A65 2019-10-02 18:12:28 +02:00
cortex_a65ae.S Introducing support for Cortex-A65AE 2019-10-03 15:38:31 +02:00
cortex_a72.S fix(security): apply SMCCC_ARCH_WORKAROUND_3 to A73/A75/A72/A57 2022-03-18 01:01:34 +02:00
cortex_a73.S fix(security): apply SMCCC_ARCH_WORKAROUND_3 to A73/A75/A72/A57 2022-03-18 01:01:34 +02:00
cortex_a75.S refactor(amu): unify ENABLE_AMU and ENABLE_FEAT_AMUv1 2023-03-27 19:36:00 +01:00
cortex_a75_pubsub.c Sanitise includes across codebase 2019-01-04 10:43:17 +00:00
cortex_a76.S fix(cpus): workaround for Cortex-A76 erratum 2743102 2022-11-03 14:50:58 -05:00
cortex_a76ae.S fix(security): workaround for CVE-2022-23960 for A76AE, A78AE, A78C 2022-03-21 08:57:09 -05:00
cortex_a77.S fix(cpus): workaround for Cortex-A77 erratum 2743100 2022-11-10 15:51:16 +00:00
cortex_a78.S refactor(amu): unify ENABLE_AMU and ENABLE_FEAT_AMUv1 2023-03-27 19:36:00 +01:00
cortex_a78_ae.S refactor(amu): unify ENABLE_AMU and ENABLE_FEAT_AMUv1 2023-03-27 19:36:00 +01:00
cortex_a78c.S fix(cpus): workaround for Cortex-A78C erratum 1827440 2023-03-21 16:21:38 -05:00
cortex_a510.S fix(cpus): use hint instruction for "tsb csync" 2023-03-23 13:26:02 +00:00
cortex_a710.S fix(cpus): workaround for Cortex-A710 erratum 2282622 2023-01-09 23:17:48 -06:00
cortex_a715.S refactor(cpu): update IP names of Makalu CPU lib 2022-08-31 18:31:29 +01:00
cortex_blackhawk.S feat(cpus): add support for blackhawk cpu 2023-04-04 17:16:53 +02:00
cortex_chaberton.S feat(cpus): add support for chaberton cpu 2023-04-04 17:16:46 +02:00
cortex_hayes.S feat(cpu): add support for Hayes CPU 2021-09-30 19:30:39 +02:00
cortex_hunter.S fix(security): workaround for CVE-2022-23960 2022-05-11 19:05:48 +02:00
cortex_hunter_elp_arm.S feat(cpu): add library support for Hunter ELP 2022-10-07 12:44:04 +01:00
cortex_x1.S refactor(cpus): use BIT macro in a consistent manner 2023-04-28 13:18:28 +01:00
cortex_x2.S fix(cpus): workaround for Cortex-X2 erratum 2282622 2023-01-11 11:34:19 -06:00
cortex_x3.S fix(cpus): workaround for Cortex-X3 erratum 2615812 2022-11-17 09:41:40 +00:00
cpu_helpers.S Merge changes from topic "bk/errata_refactor" into integration 2023-03-20 16:45:08 +01:00
cpuamu.c Sanitise includes across codebase 2019-01-04 10:43:17 +00:00
cpuamu_helpers.S Add support for Branch Target Identification 2019-05-24 14:44:45 +01:00
denver.S fix(cpus/denver): use CPU_NO_EXTRA3_FUNC for all variants 2022-05-24 15:32:33 +01:00
dsu_helpers.S fix(errata): workaround for DSU-110 erratum 2313941 2022-05-11 19:05:36 +02:00
generic.S arm_fpga: Add support for unknown MPIDs 2020-09-25 15:45:50 +01:00
neoverse_e1.S DSU: Apply erratum 936184 for Neoverse N1/E1 2019-06-11 14:01:32 +01:00
neoverse_n1.S fix(cpus): do not put RAS check before using esb 2023-04-24 17:32:22 +01:00
neoverse_n1_pubsub.c Rename Cortex-Ares to Neoverse N1 2019-02-19 13:50:07 +00:00
neoverse_n2.S refactor(amu): unify ENABLE_AMU and ENABLE_FEAT_AMUv1 2023-03-27 19:36:00 +01:00
neoverse_n_common.S Add support for Neoverse-N2 CPUs. 2020-11-30 19:12:56 +00:00
neoverse_poseidon.S fix(security): workaround for CVE-2022-23960 2022-05-11 19:05:48 +02:00
neoverse_v1.S fix(cpus): workaround for Neoverse V1 errata 2743233 2023-03-09 14:09:37 -06:00
neoverse_v2.S refactor(cpu): use the updated IP name for Demeter CPU 2022-10-03 15:31:40 +05:30
qemu_max.S Add support for QEMU "max" CPU 2021-04-13 12:31:40 +01:00
rainier.S refactor(amu): unify ENABLE_AMU and ENABLE_FEAT_AMUv1 2023-03-27 19:36:00 +01:00
runtime_errata.S fix(cpus): workaround for Cortex-A510 erratum 2684597 2023-01-25 09:40:33 +00:00
wa_cve_2017_5715_bpiall.S fix(security): apply SMCCC_ARCH_WORKAROUND_3 to A73/A75/A72/A57 2022-03-18 01:01:34 +02:00
wa_cve_2017_5715_mmu.S fix(security): apply SMCCC_ARCH_WORKAROUND_3 to A73/A75/A72/A57 2022-03-18 01:01:34 +02:00
wa_cve_2022_23960_bhb.S fix(security): optimisations for CVE-2022-23960 2022-10-26 16:45:12 -05:00
wa_cve_2022_23960_bhb_vector.S fix(security): workaround for CVE-2022-23960 2022-03-10 23:57:14 -06:00