arm-trusted-firmware/lib/cpus/aarch64
Boyan Karatotev 8a4a91651f refactor(cpus): convert the Cortex-A77 to use the bit set helpers
This makes the implementation itself much more readable. At this point
all errata have been tested with a script [1] to make sure the migration
kept everything the same. It reported 1508412, 1946167, and
CVE_2022_23960 as having some mismatch. The first has a small
non-trivial change that results in identical behaviour. The second is
non-trivial to compare, but manual inspection shows it is identical. The
CVE had no workaround function previously, however, the instructions are
indeed identical. All errata have been checked that they get invoked.

The script's commandline looks like:
  ./script.py cortex_a77 /path/to/tf-a-with-changes /path/to/tf-a-clean/

[1]: the script:
import re
import subprocess
import sys

def full_cpu_name():
    return sys.argv[1]

def old_cpu_name():
    return sys.argv[1].split('_')[1]

def new_build():
    return sys.argv[2]

def old_build():
    return sys.argv[3]

def get_dump(root_dir, symbol):
    # bl31 includes more stuff
    raw_dump = subprocess.run([
            'aarch64-none-elf-objdump', f'--disassemble={symbol}',
            root_dir + '/build/fvp/release/bl31/bl31.elf'
        ], capture_output=True, encoding='ascii'
    ).stdout

    # get rid of objdump verbosity
    raw_dump = raw_dump.split('\n')[7:-1]
    # split arguments and remove addresses at the start
    return [line.split('\t')[2:] for line in raw_dump]

def check_identical(new, old):
    if old and old[-1][0] == 'isb':
        old = old[:-1]
        print('    NOTE: dropped trailing isb (ok on reset)')

    if not new or not old or len(new) != len(old):
        return False

    for newi, oldi in zip(new, old):
        if newi[0] == oldi[0] == 'b':
            # ignore the address, compare just the name
            if newi[1].split(' ')[1] != newi[1].split(' ')[1]:
                return False
            continue # identical, proceed

        if newi != oldi:
            return False
    return True

FLAG_RE = r'report_errata (.*?), '
cpu_path = old_build() + '/lib/cpus/aarch64/' + full_cpu_name() + '.S'
with open(cpu_path) as cpu_src:
    errata_flags = re.findall(FLAG_RE, cpu_src.read())
    errata_ids = [flg.split('_')[-1] for flg in errata_flags]

print('List of flags to build with:')
print(' '.join([flg + '=1' for flg in errata_flags]))
input((
    'Press enter when your patch in argv[2] and '
    'the top of master in argv[3] are both built for release...'
))

for id in errata_ids:
    new_check = get_dump(new_build(),
        f'check_erratum_{full_cpu_name()}_{id}')
    old_check = get_dump(old_build(), f'check_errata_{id}')
    new_wa = get_dump(new_build(), f'erratum_{full_cpu_name()}_{id}_wa')
    old_wa = get_dump(old_build(), f'errata_{old_cpu_name()}_{id}_wa')

    # remove the boilerplate for each (mov, bl, cbz, ret)
    new_wa = new_wa[4:-3]
    old_wa = old_wa[3:-1]

    print(f'Checking {id} . . .')
    if not check_identical(new_check, old_check):
        print(f'  Check {id} check function manually!')
    if not check_identical(new_wa, old_wa):
        print(f'  Check {id} workaround manually!')

print('All previous errata checked against their migrations')

Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com>
Change-Id: I987ded7962f3449344feda47e314994f400e85b8
2023-08-04 11:32:44 -05:00
..
a64fx.S feat(cpus): add a64fx cpu to tf-a 2022-07-07 07:17:25 +09:00
aem_generic.S FVP_Base_AEMv8A platform: Fix cache maintenance operations 2019-08-16 11:30:37 +00:00
cortex_a35.S Cortex-A35: Implement workaround for errata 855472 2019-04-17 13:46:43 +01:00
cortex_a53.S refactor(cpus): rename errata_report.h to errata.h 2023-05-30 09:31:15 +01:00
cortex_a55.S refactor(cpus): convert the Cortex-A55 to use cpu helpers 2023-08-03 14:10:28 -05:00
cortex_a57.S fix(security): apply SMCCC_ARCH_WORKAROUND_3 to A73/A75/A72/A57 2022-03-18 01:01:34 +02:00
cortex_a65.S Introducing support for Cortex-A65 2019-10-02 18:12:28 +02:00
cortex_a65ae.S refactor(cpus): convert the Cortex-A65AE to use the errata framework 2023-07-27 09:35:12 +01:00
cortex_a72.S refactor(cpus): convert Cortex-A72 to use cpu helpers 2023-07-31 15:28:38 +01:00
cortex_a73.S fix(security): apply SMCCC_ARCH_WORKAROUND_3 to A73/A75/A72/A57 2022-03-18 01:01:34 +02:00
cortex_a75.S refactor(cpus): convert the Cortex-A75 to use cpu helpers 2023-06-27 17:14:57 -04:00
cortex_a75_pubsub.c Sanitise includes across codebase 2019-01-04 10:43:17 +00:00
cortex_a76.S refactor(cpus): convert the Cortex-A76 to use cpu helpers 2023-08-03 14:10:28 -05:00
cortex_a76ae.S refactor(cpus): convert the Cortex-A76AE to use cpu helpers 2023-08-03 14:10:28 -05:00
cortex_a77.S refactor(cpus): convert the Cortex-A77 to use the bit set helpers 2023-08-04 11:32:44 -05:00
cortex_a78.S refactor(cpus): convert the Cortex-A78 to use cpu helpers 2023-08-03 14:10:28 -05:00
cortex_a78_ae.S refactor(amu): unify ENABLE_AMU and ENABLE_FEAT_AMUv1 2023-03-27 19:36:00 +01:00
cortex_a78c.S refactor(cpus): convert the Cortex-A78C to use cpu helpers 2023-08-03 14:09:00 -05:00
cortex_a510.S refactor(cpus): convert the Cortex-A510 to use cpu helpers 2023-07-27 09:35:12 +01:00
cortex_a520.S refactor(cpus): use cpu errata wrappers for aarch64 hunter based cpus 2023-07-28 09:16:59 -05:00
cortex_a710.S fix(cpus): workaround for Cortex-A710 erratum 2282622 2023-01-09 23:17:48 -06:00
cortex_a715.S refactor(cpus): convert Cortex-A715 to the errata framework 2023-06-19 14:41:59 +01:00
cortex_a720.S refactor(cpus): use cpu errata wrappers for aarch64 hunter based cpus 2023-07-28 09:16:59 -05:00
cortex_blackhawk.S refactor(cpus): use cpu errata wrappers for aarch64 hunter based cpus 2023-07-28 09:16:59 -05:00
cortex_chaberton.S refactor(cpus): use cpu errata wrappers for aarch64 hunter based cpus 2023-07-28 09:16:59 -05:00
cortex_x1.S refactor(cpus): convert the Cortex-X1 to use cpu helpers 2023-08-03 14:09:00 -05:00
cortex_x2.S refactor(cpus): convert the Cortex-x2 to use cpu helpers 2023-07-27 09:35:12 +01:00
cortex_x3.S fix(cpus): workaround for Cortex-X3 erratum 2615812 2022-11-17 09:41:40 +00:00
cortex_x4.S refactor(cpus): use cpu errata wrappers for aarch64 hunter based cpus 2023-07-28 09:16:59 -05:00
cpu_helpers.S refactor(cpus): convert print_errata_status to C 2023-05-30 09:31:15 +01:00
cpuamu.c Sanitise includes across codebase 2019-01-04 10:43:17 +00:00
cpuamu_helpers.S Add support for Branch Target Identification 2019-05-24 14:44:45 +01:00
denver.S fix(cpus/denver): use CPU_NO_EXTRA3_FUNC for all variants 2022-05-24 15:32:33 +01:00
dsu_helpers.S feat(cpus): conform DSU errata to errata framework PCS 2023-06-08 15:34:53 -04:00
generic.S arm_fpga: Add support for unknown MPIDs 2020-09-25 15:45:50 +01:00
neoverse_e1.S refactor(cpus): convert Neoverse-E1 to framework 2023-07-18 10:47:57 -05:00
neoverse_hermes.S feat(cpus): add support for hermes cpu 2023-06-27 10:49:38 -05:00
neoverse_n1.S refactor(cpus): convert Neoverse-N1 to use helpers 2023-07-26 09:39:48 -05:00
neoverse_n1_pubsub.c Rename Cortex-Ares to Neoverse N1 2019-02-19 13:50:07 +00:00
neoverse_n2.S fix(cpus): workaround for Neoverse N2 erratum 2779511 2023-08-03 22:42:31 +02:00
neoverse_n_common.S Add support for Neoverse-N2 CPUs. 2020-11-30 19:12:56 +00:00
neoverse_poseidon.S fix(security): workaround for CVE-2022-23960 2022-05-11 19:05:48 +02:00
neoverse_v1.S refactor(cpus): convert Neoverse V1 to use CPU helpers 2023-08-03 23:02:39 +02:00
neoverse_v2.S fix(cpus): workaround for Neoverse V2 erratum 2801372 2023-07-21 16:52:36 +02:00
qemu_max.S refactor(cpus): convert QEMU Max to use the errata framework 2023-06-27 15:41:56 +01:00
rainier.S refactor(cpus): convert Rainier to use errata framework 2023-06-27 15:42:10 +01:00
wa_cve_2017_5715_bpiall.S fix(security): apply SMCCC_ARCH_WORKAROUND_3 to A73/A75/A72/A57 2022-03-18 01:01:34 +02:00
wa_cve_2017_5715_mmu.S fix(security): apply SMCCC_ARCH_WORKAROUND_3 to A73/A75/A72/A57 2022-03-18 01:01:34 +02:00
wa_cve_2022_23960_bhb.S fix(security): optimisations for CVE-2022-23960 2022-10-26 16:45:12 -05:00
wa_cve_2022_23960_bhb_vector.S fix(security): workaround for CVE-2022-23960 2022-03-10 23:57:14 -06:00