Djam/arm-trusted-firmware
1
0
Fork 0
mirror of https://github.com/ARM-software/arm-trusted-firmware.git synced 2025-04-17 01:54:22 +00:00
Code Issues Projects Releases Packages Wiki Activity Actions

refactor(cpus): convert Cortex-A715 to the errata framework

Browse source 
This involves replacing:
 * the reset_func with the standard cpu_reset_func_{start,end} to apply
   errata automatically
 * the <cpu>_errata_report with the errata_report_shim to report errata
   automatically
...and for each erratum:
 * the prologue with the workaround_<type>_start to do the checks and
   framework registration automatically
 * the epilogue with the workaround_<type>_end
 * the checker function with the check_erratum_<type> to make it more
   descriptive

It is important to note that the errata workaround and checking
sequences remain unchanged and preserve their git blame. Testing was
conducted by:

 * Building for release with all errata flags enabled and running script
   in change 19136 to compare output of objdump for each errata.
 * Manual comparison of disassembly of converted functions with non-
   converted functions
 * Build for debug with all errata enabled and step through ArmDS
   at reset to ensure all functions are entered.

Change-Id: Ib63b6310997d523fa8bd7f867e53fedec66f1e06
Signed-off-by: Harrison Mutai <harrison.mutai@arm.com>
This commit is contained in:
Harrison Mutai 2023-05-04 18:15:16 +01:00
parent d557aaec77
commit c82fb382b2
1 changed files with 12 additions and 40 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

52
lib/cpus/aarch64/cortex_a715.S
View file

@ -26,31 +26,22 @@
wa_cve_2022_23960_bhb_vector_table CORTEX_A715_BHB_LOOP_COUNT, cortex_a715
#endif /* WORKAROUND_CVE_2022_23960 */
func check_errata_cve_2022_23960
#if WORKAROUND_CVE_2022_23960
mov x0, #ERRATA_APPLIES
#else
mov x0, #ERRATA_MISSING
#endif
ret
endfunc check_errata_cve_2022_23960
func cortex_a715_reset_func
/* Disable speculative loads */
msr SSBS, xzr
#if IMAGE_BL31 && WORKAROUND_CVE_2022_23960
workaround_reset_start cortex_a715, CVE(2022, 23960), WORKAROUND_CVE_2022_23960
#if IMAGE_BL31
/*
* The Cortex-A715 generic vectors are overridden to apply errata
* mitigation on exception entry from lower ELs.
*/
adr x0, wa_cve_vbar_cortex_a715
msr vbar_el3, x0
#endif /* IMAGE_BL31 && WORKAROUND_CVE_2022_23960 */
override_vector_table wa_cve_vbar_cortex_a715
#endif /* IMAGE_BL31 */
workaround_reset_end cortex_a715, CVE(2022, 23960)
isb
ret
endfunc cortex_a715_reset_func
check_erratum_chosen cortex_a715, CVE(2022, 23960), WORKAROUND_CVE_2022_23960
cpu_reset_func_start cortex_a715
/* Disable speculative loads */
msr SSBS, xzr
cpu_reset_func_end cortex_a715
/* ----------------------------------------------------
* HW will do the cache maintenance while powering down
@ -68,26 +59,7 @@ func cortex_a715_core_pwr_dwn
ret
endfunc cortex_a715_core_pwr_dwn
#if REPORT_ERRATA
/*
* Errata printing function for Cortex-A715. Must follow AAPCS.
*/
func cortex_a715_errata_report
stp x8, x30, [sp, #-16]!
bl cpu_get_rev_var
mov x8, x0
/*
* Report all errata. The revision-variant information is passed to
* checking functions of each errata.
*/
report_errata WORKAROUND_CVE_2022_23960, cortex_a715, cve_2022_23960
ldp x8, x30, [sp], #16
ret
endfunc cortex_a715_errata_report
#endif
errata_report_shim cortex_a715
/* ---------------------------------------------
* This function provides Cortex-A715 specific