AlexeiFedorov 7a4a07078b feat(fvp): allocate L0 GPT at the top of SRAM ... This patch allocates level 0 GPT at the top of SRAM for FVP. This helps to meet L0 GPT alignment requirements and prevent the occurrence of possible unused gaps in SRAM. Load addresses for FVP TB_FW, SOC_FW and TOS_FW DTBs are defined in fvp_fw_config.dts via ARM_BL_RAM_BASE macro. Change-Id: Iaa52e302373779d9fdbaf4e1ba40c10aa8d1f8bd Signed-off-by: AlexeiFedorov <Alexei.Fedorov@arm.com>		2025-02-11 15:10:49 +00:00
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arch	fix: add support for 128-bit sysregs to EL3 crash handler	2025-02-05 21:19:15 +01:00
bl1	refactor(bl1): clean up bl2 layout calculation	2024-04-26 09:00:12 +00:00
bl2
bl2u
bl31	Merge "refactor(sdei): use common create_spsr() in SDEI library" into integration	2024-03-14 21:17:45 +01:00
bl32	feat(cm): test integrity of el1_ctx registers	2024-11-08 11:05:13 +00:00
common	feat(rmm): add PCIe IO info to Boot manifest	2025-02-11 15:10:49 +00:00
drivers	feat(nxp-clk): add a basic get_rate implementation	2025-01-23 13:13:22 +02:00
dt-bindings	fix(dt-bindings): update STM32MP2 clock and reset bindings	2024-06-27 17:17:35 +02:00
export	feat(tbbr): add image id for backup GPT	2023-10-27 08:31:54 -05:00
lib	Merge changes from topic "us_tc_trng" into integration	2025-02-04 13:19:10 +01:00
plat	feat(fvp): allocate L0 GPT at the top of SRAM	2025-02-11 15:10:49 +00:00
services	feat(rmm): add PCIe IO info to Boot manifest	2025-02-11 15:10:49 +00:00
tools_share	fix(tc): add SCP_BL2 to RSE measured boot	2024-06-13 15:53:10 +02:00