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feat(cm): test integrity of el1_ctx registers
* This patch adds support to tsp (BL32) Image, to exercise EL1_context registers at S-EL1. * Adds a SMC function ID "MODIFY_EL1_CTX" to handle EL1_CTX registers at S-EL1 and overwrite them. Signed-off-by: Jayanth Dodderi Chidanand <jayanthdodderi.chidanand@arm.com> Change-Id: Id4f2b3b748f7bc9e6c9d72a2f03d50aefbfb61cb
This commit is contained in:
Jayanth Dodderi Chidanand
parent
b40bc36c20
commit
7623e085cb
6 changed files with 186 additions and 8 deletions
bl32/tsp
include/bl32/tsp
services/spd/tspd
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@ -7,7 +7,7 @@
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INCLUDES += -Iinclude/bl32/tsp
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ifeq (${SPMC_AT_EL3},1)
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BL32_SOURCES += bl32/tsp/tsp_ffa_main.c \
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BL32_SOURCES += bl32/tsp/tsp_ffa_main.c \
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bl32/tsp/ffa_helpers.c
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else
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BL32_SOURCES += bl32/tsp/tsp_main.c
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@ -19,6 +19,7 @@ BL32_SOURCES += bl32/tsp/aarch64/tsp_entrypoint.S \
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bl32/tsp/tsp_interrupt.c \
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bl32/tsp/tsp_timer.c \
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bl32/tsp/tsp_common.c \
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bl32/tsp/tsp_context.c \
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common/aarch64/early_exceptions.S \
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lib/locks/exclusive/aarch64/spinlock.S
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143
bl32/tsp/tsp_context.c
Normal file
143
bl32/tsp/tsp_context.c
Normal file
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@ -0,0 +1,143 @@
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/*
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* Copyright (c) 2024, Arm Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#include <arch_features.h>
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#include <arch_helpers.h>
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#include <bl32/tsp/tsp_el1_context.h>
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#include <common/debug.h>
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#define DUMMY_CTX_VALUE ULL(0xffffffff)
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#define DUMMY_CTX_TCR_VALUE ULL(0xffff0000)
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#define DUMMY_CTX_TRF_VALUE ULL(0xf)
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#define DUMMY_CTX_GCS_VALUE ULL(0xffff0000)
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#define DEFAULT_CTX_VALUE ULL(0x0)
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/**
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* -------------------------------------------------------
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* Private Helper functions required to access and modify
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* EL1 context registers at S-EL1.
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* -------------------------------------------------------
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*/
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static void modify_el1_common_regs(uint64_t cm_value)
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{
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/**
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* NOTE: Few EL1 registers "SCTLR_EL1, SPSR_EL1, ELR_EL1" are
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* left out consciously as those are important registers for
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* execution in each world and overwriting them with dummy value
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* would cause unintended crash while executing the test.
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*/
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write_tcr_el1(cm_value);
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write_cpacr_el1(cm_value);
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write_csselr_el1(cm_value);
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write_esr_el1(cm_value);
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write_ttbr0_el1(cm_value);
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write_ttbr1_el1(cm_value);
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write_mair_el1(cm_value);
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write_amair_el1(cm_value);
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write_actlr_el1(cm_value);
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write_tpidr_el1(cm_value);
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write_tpidr_el0(cm_value);
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write_tpidrro_el0(cm_value);
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write_par_el1(cm_value);
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write_far_el1(cm_value);
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write_afsr0_el1(cm_value);
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write_afsr1_el1(cm_value);
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write_contextidr_el1(cm_value);
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write_vbar_el1(cm_value);
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write_mdccint_el1(cm_value);
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write_mdscr_el1(cm_value);
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}
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static void modify_el1_mte2_regs(uint64_t mte_value)
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{
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if (is_feat_mte2_supported()) {
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write_tfsre0_el1(mte_value);
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write_tfsr_el1(mte_value);
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write_rgsr_el1(mte_value);
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write_gcr_el1(mte_value);
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}
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}
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static void modify_el1_ras_regs(uint64_t ras_value)
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{
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if (is_feat_ras_supported()) {
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write_disr_el1(ras_value);
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}
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}
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static void modify_el1_s1pie_regs(uint64_t s1pie_value)
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{
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if (is_feat_s1pie_supported()) {
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write_pire0_el1(s1pie_value);
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write_pir_el1(s1pie_value);
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}
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}
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static void modify_el1_s1poe_regs(uint64_t s1poe_value)
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{
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if (is_feat_s1poe_supported()) {
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write_por_el1(s1poe_value);
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}
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}
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static void modify_el1_s2poe_regs(uint64_t s2poe_value)
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{
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if (is_feat_s2poe_supported()) {
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write_s2por_el1(s2poe_value);
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}
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}
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static void modify_el1_tcr2_regs(uint64_t tcr_value)
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{
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if (is_feat_tcr2_supported()) {
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write_tcr2_el1(tcr_value & DUMMY_CTX_TCR_VALUE);
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}
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}
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static void modify_el1_trf_regs(uint64_t trf_value)
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{
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if (is_feat_trf_supported()) {
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write_trfcr_el1(trf_value & DUMMY_CTX_TRF_VALUE);
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}
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}
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static void modify_el1_gcs_regs(uint64_t gcs_value)
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{
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if (is_feat_gcs_supported()) {
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write_gcscr_el1(gcs_value & DUMMY_CTX_GCS_VALUE);
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write_gcscre0_el1(gcs_value & DUMMY_CTX_GCS_VALUE);
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write_gcspr_el1(gcs_value & DUMMY_CTX_GCS_VALUE);
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write_gcspr_el0(gcs_value & DUMMY_CTX_GCS_VALUE);
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}
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}
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/**
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* -----------------------------------------------------
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* Public API, to modify/restore EL1 ctx registers:
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* -----------------------------------------------------
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*/
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void modify_el1_ctx_regs(const bool modify_option)
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{
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uint64_t mask;
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if (modify_option == TSP_CORRUPT_EL1_REGS) {
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VERBOSE("TSP(S-EL1): Corrupt EL1 Registers with Dummy values\n");
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mask = DUMMY_CTX_VALUE;
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} else {
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VERBOSE("TSP(S-EL1): Restore EL1 Registers with Default values\n");
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mask = DEFAULT_CTX_VALUE;
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}
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modify_el1_common_regs(mask);
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modify_el1_mte2_regs(mask);
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modify_el1_ras_regs(mask);
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modify_el1_s1pie_regs(mask);
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modify_el1_s1poe_regs(mask);
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modify_el1_s2poe_regs(mask);
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modify_el1_tcr2_regs(mask);
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modify_el1_trf_regs(mask);
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modify_el1_gcs_regs(mask);
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}
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@ -11,6 +11,7 @@
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#include <arch_features.h>
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#include <arch_helpers.h>
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#include <bl32/tsp/tsp.h>
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#include <bl32/tsp/tsp_el1_context.h>
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#include <common/bl_common.h>
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#include <common/build_message.h>
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#include <common/debug.h>
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@ -278,6 +279,17 @@ smc_args_t *tsp_smc_handler(uint64_t func,
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/* Toggle the dit bit */
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write_dit(service_arg0 != 0U ? 0 : DIT_BIT);
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break;
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case TSP_MODIFY_EL1_CTX:
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/*
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* Write dummy values to EL1 context registers, to simulate
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* their usage in the secure world.
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*/
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if (arg1 == TSP_CORRUPT_EL1_REGS) {
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modify_el1_ctx_regs(TSP_CORRUPT_EL1_REGS);
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} else {
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modify_el1_ctx_regs(TSP_RESTORE_EL1_REGS);
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}
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break;
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default:
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break;
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}
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@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2013-2022, ARM Limited and Contributors. All rights reserved.
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* Copyright (c) 2013-2024, Arm Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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@ -36,12 +36,13 @@
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* Identifiers for various TSP services. Corresponding function IDs (whether
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* fast or yielding) are generated by macros defined below
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*/
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#define TSP_ADD 0x2000
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#define TSP_SUB 0x2001
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#define TSP_MUL 0x2002
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#define TSP_DIV 0x2003
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#define TSP_ADD 0x2000
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#define TSP_SUB 0x2001
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#define TSP_MUL 0x2002
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#define TSP_DIV 0x2003
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#define TSP_HANDLE_SEL1_INTR_AND_RETURN 0x2004
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#define TSP_CHECK_DIT 0x2005
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#define TSP_CHECK_DIT 0x2005
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#define TSP_MODIFY_EL1_CTX 0x2006
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/*
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* Identify a TSP service from function ID filtering the last 16 bits from the
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16
include/bl32/tsp/tsp_el1_context.h
Normal file
16
include/bl32/tsp/tsp_el1_context.h
Normal file
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@ -0,0 +1,16 @@
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/*
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* Copyright (c) 2024, Arm Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#ifndef TSP_EL1_CONTEXT_H
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#define TSP_EL1_CONTEXT_H
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#define TSP_CORRUPT_EL1_REGS 1
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#define TSP_RESTORE_EL1_REGS 0
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/* Public helper function to handle EL1 ctx registers at S-EL1(TSP) */
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void modify_el1_ctx_regs(const bool modify_option);
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#endif /* TSP_EL1_CONTEXT_H */
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@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2013-2022, ARM Limited and Contributors. All rights reserved.
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* Copyright (c) 2013-2024, ARM Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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@ -575,6 +575,11 @@ static uintptr_t tspd_smc_handler(uint32_t smc_fid,
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* of the DIT PSTATE bit.
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*/
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case TSP_YIELD_FID(TSP_CHECK_DIT):
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/*
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* Request from non-secure client to modify the EL1
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* context registers.
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*/
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case TSP_YIELD_FID(TSP_MODIFY_EL1_CTX):
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if (ns) {
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/*
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* This is a fresh request from the non-secure client.
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