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https://github.com/ARM-software/arm-trusted-firmware.git
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Merge changes from topic "us_tc_trng" into integration
* changes: feat(tc): get entropy with PSA Crypto API feat(psa): add interface with RSE for retrieving entropy fix(psa): guard Crypto APIs with CRYPTO_SUPPORT feat(tc): enable trng feat(tc): initialize the RSE communication in earlier phase
This commit is contained in:
commit
697290a916
9 changed files with 141 additions and 29 deletions
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@ -781,6 +781,21 @@ Arm CCA platform:
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- ``ROTPK for secure firmware.``
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- ``ROTPK for non-secure firmware.``
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Get entropy API
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^^^^^^^^^^^^^^^
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AP/RSE interface for reading the entropy is as follows.
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Defined here:
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- ``include/lib/psa/rse_platform_api.h``
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.. code-block:: c
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psa_status_t rse_platform_get_entropy(uint8_t *data, size_t data_size)
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Through this service, we can read an entropy generated from RSE.
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References
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----------
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@ -46,21 +46,6 @@
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serial0 = &os_uart;
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};
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chosen {
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/*
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* Add some dummy entropy for Linux so it
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* doesn't delay the boot waiting for it.
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*/
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rng-seed = <0x01 0x02 0x04 0x05 0x06 0x07 0x08 \
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0x01 0x02 0x04 0x05 0x06 0x07 0x08 \
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0x01 0x02 0x04 0x05 0x06 0x07 0x08 \
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0x01 0x02 0x04 0x05 0x06 0x07 0x08 \
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0x01 0x02 0x04 0x05 0x06 0x07 0x08 \
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0x01 0x02 0x04 0x05 0x06 0x07 0x08 \
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0x01 0x02 0x04 0x05 0x06 0x07 0x08 \
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0x01 0x02 0x04 0x05 0x06 0x07 0x08 >;
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};
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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@ -11,6 +11,9 @@
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/* Declares types that encode errors, algorithms, key types, policies, etc. */
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#include "psa/crypto_types.h"
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/* Value identifying random number generating API */
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#define RSE_CRYPTO_GENERATE_RANDOM_SID (uint16_t)(0x100)
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/*
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* Value identifying export public key function API, used to dispatch the request
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* to the corresponding API implementation in the Crypto service backend.
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@ -11,7 +11,9 @@
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#include <stdint.h>
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#include "psa/error.h"
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#if CRYPTO_SUPPORT
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#include <rse_crypto_defs.h>
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#endif
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#define RSE_PLATFORM_API_ID_NV_READ (1010)
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#define RSE_PLATFORM_API_ID_NV_INCREMENT (1011)
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@ -42,6 +44,7 @@ psa_status_t
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rse_platform_nv_counter_read(uint32_t counter_id,
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uint32_t size, uint8_t *val);
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#if CRYPTO_SUPPORT
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/*
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* Reads the public key or the public part of a key pair in binary format.
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*
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@ -57,4 +60,17 @@ psa_status_t
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rse_platform_key_read(enum rse_key_id_builtin_t key, uint8_t *data,
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size_t data_size, size_t *data_length);
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/*
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* Gets the entropy.
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*
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* data Buffer where the entropy data is to be written.
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* data_size Size of the data buffer in bytes.
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*
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* PSA_SUCCESS if the entropy is generated successfully. Otherwise,
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* it returns a PSA_ERROR.
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*/
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psa_status_t
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rse_platform_get_entropy(uint8_t *data, size_t data_size);
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#endif
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#endif /* RSE_PLATFORM_API_H */
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@ -7,7 +7,9 @@
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#include <psa/client.h>
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#include <psa_manifest/sid.h>
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#if CRYPTO_SUPPORT
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#include <rse_crypto_defs.h>
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#endif
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#include <rse_platform_api.h>
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psa_status_t
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@ -41,6 +43,7 @@ rse_platform_nv_counter_read(uint32_t counter_id,
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in_vec, 1, out_vec, 1);
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}
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#if CRYPTO_SUPPORT
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psa_status_t
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rse_platform_key_read(enum rse_key_id_builtin_t key, uint8_t *data,
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size_t data_size, size_t *data_length)
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@ -67,3 +70,27 @@ rse_platform_key_read(enum rse_key_id_builtin_t key, uint8_t *data,
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return status;
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}
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psa_status_t
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rse_platform_get_entropy(uint8_t *data, size_t data_size)
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{
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psa_status_t status;
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struct rse_crypto_pack_iovec iov = {
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.function_id = RSE_CRYPTO_GENERATE_RANDOM_SID,
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};
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psa_invec in_vec[] = {
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{.base = &iov, .len = sizeof(struct rse_crypto_pack_iovec)},
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};
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psa_outvec out_vec[] = {
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{.base = data, .len = data_size}
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};
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status = psa_call(RSE_CRYPTO_HANDLE, PSA_IPC_CALL,
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in_vec, IOVEC_LEN(in_vec),
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out_vec, IOVEC_LEN(out_vec));
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return status;
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}
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#endif
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@ -40,6 +40,12 @@ ENABLE_FEAT_MTE2 := 2
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ENABLE_SPE_FOR_NS := 3
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ENABLE_FEAT_TCR2 := 3
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ifneq ($(filter ${TARGET_PLATFORM}, 3),)
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ENABLE_FEAT_RNG_TRAP := 0
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else
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ENABLE_FEAT_RNG_TRAP := 1
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endif
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CTX_INCLUDE_AARCH32_REGS := 0
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ifeq (${SPD},spmd)
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@ -47,6 +53,8 @@ ifeq (${SPD},spmd)
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CTX_INCLUDE_PAUTH_REGS := 1
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endif
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TRNG_SUPPORT := 1
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# TC RESOLUTION - LIST OF VALID OPTIONS (this impacts only FVP)
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TC_RESOLUTION_OPTIONS := 640x480p60 \
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1920x1080p60
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@ -240,7 +248,8 @@ include drivers/arm/rse/rse_comms.mk
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BL1_SOURCES += ${RSE_COMMS_SOURCES}
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BL2_SOURCES += ${RSE_COMMS_SOURCES}
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BL31_SOURCES += ${RSE_COMMS_SOURCES}
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BL31_SOURCES += ${RSE_COMMS_SOURCES} \
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lib/psa/rse_platform.c
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# Include Measured Boot makefile before any Crypto library makefile.
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# Crypto library makefile may need default definitions of Measured Boot build
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@ -285,8 +294,10 @@ ifeq (${MEASURED_BOOT},1)
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endif
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endif
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ifeq (${TRNG_SUPPORT},1)
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BL31_SOURCES += plat/arm/board/tc/tc_trng.c
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BL31_SOURCES += plat/arm/board/tc/tc_trng.c
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ifneq (${ENABLE_FEAT_RNG_TRAP},0)
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BL31_SOURCES += plat/arm/board/tc/tc_rng_trap.c
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endif
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ifneq (${PLATFORM_TEST},)
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@ -114,6 +114,8 @@ static void set_mcn_slc_alloc_mode(void)
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void bl31_platform_setup(void)
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{
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psa_status_t status;
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tc_bl31_common_platform_setup();
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#if (TARGET_PLATFORM == 3) || (TARGET_PLATFORM == 4)
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enable_ns_mcn_pmu();
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@ -122,6 +124,12 @@ void bl31_platform_setup(void)
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set_mcn_slc_alloc_mode();
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plat_arm_ni_setup(NCI_BASE_ADDR);
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#endif
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/* Initialise RSE communication channel */
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status = rse_comms_init(PLAT_RSE_AP_SND_MHU_BASE, PLAT_RSE_AP_RCV_MHU_BASE);
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if (status != PSA_SUCCESS) {
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ERROR("Failed to initialize RSE communication channel - psa_status = %d\n", status);
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}
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}
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scmi_channel_plat_info_t *plat_css_get_scmi_info(unsigned int channel_id __unused)
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@ -194,18 +202,10 @@ void __init bl31_plat_arch_setup(void)
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#if defined(SPD_spmd) && (SPMC_AT_EL3 == 0)
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void tc_bl31_plat_runtime_setup(void)
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{
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psa_status_t status;
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/* Start secure watchdog timer. */
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plat_arm_secure_wdt_start();
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arm_bl31_plat_runtime_setup();
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/* Initialise RSE communication channel */
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status = rse_comms_init(PLAT_RSE_AP_SND_MHU_BASE, PLAT_RSE_AP_RCV_MHU_BASE);
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if (status != PSA_SUCCESS) {
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ERROR("Failed to initialize RSE communication channel - psa_status = %d\n", status);
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}
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}
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void bl31_plat_runtime_setup(void)
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41
plat/arm/board/tc/tc_rng_trap.c
Normal file
41
plat/arm/board/tc/tc_rng_trap.c
Normal file
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@ -0,0 +1,41 @@
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/*
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* Copyright (c) 2025, ARM Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#include <assert.h>
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#include <bl31/sync_handle.h>
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#include <context.h>
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#include <plat/common/plat_trng.h>
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#define XZR_REG_NUM 31
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int plat_handle_rng_trap(uint64_t esr_el3, cpu_context_t *ctx)
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{
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uint64_t entropy;
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/* extract the target register number from the exception syndrome */
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unsigned int rt = get_sysreg_iss_rt(esr_el3);
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/* ignore XZR accesses and writes to the register */
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assert(rt != XZR_REG_NUM && !is_sysreg_iss_write(esr_el3));
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if (!plat_get_entropy(&entropy)) {
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ERROR("Failed to get entropy\n");
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panic();
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}
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/* Emulate RNDR and RNDRRS */
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gp_regs_t *gpregs = get_gpregs_ctx(ctx);
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write_ctx_reg(gpregs, rt, entropy);
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/*
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* We successfully handled the trap, continue with the next
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* instruction.
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*/
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return TRAP_RET_CONTINUE;
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}
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@ -11,6 +11,7 @@
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#include <string.h>
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#include <lib/mmio.h>
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#include <lib/psa/rse_platform_api.h>
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#include <lib/smccc.h>
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#include <lib/utils_def.h>
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#include <plat/common/platform.h>
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);
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uuid_t plat_trng_uuid;
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/* Dummy implementation */
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bool plat_get_entropy(uint64_t *out)
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{
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#if CRYPTO_SUPPORT
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psa_status_t status;
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status = rse_platform_get_entropy((uint8_t *)out, sizeof(*out));
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if (status != PSA_SUCCESS) {
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printf("Failed for entropy read, psa_status=%d\n", status);
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return false;
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}
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#else
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/* Dummy value */
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*out = 0xABBAEDDAACDCDEAD;
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#endif
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return true;
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}
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void plat_entropy_setup(void)
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{
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uint64_t dummy;
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uint64_t entropy;
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plat_trng_uuid = _plat_trng_uuid;
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/* Initialise the entropy source and trigger RNG generation */
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plat_get_entropy(&dummy);
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if (!plat_get_entropy(&entropy)) {
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ERROR("Failed to setup entropy\n");
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panic();
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}
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}
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