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Boyan Karatotev 79c0c7fac0 refactor(cm): clean up per-world context
In preparation for SMCCC_ARCH_FEATURE_AVAILABILITY, it is useful for
context to be directly related to the underlying system. Currently,
certain bits like SCR_EL3.APK are always set with the understanding that
they will only take effect if the feature is present.

However, that is problematic for SMCCC_ARCH_FEATURE_AVAILABILITY (an
SMCCC call to report which features firmware enables), as simply reading
the enable bit may contradict the ID register, like the APK bit above
for a system with no Pauth present.

This patch is to clean up these cases. Add a check for PAuth's presence
so that the APK bit remains unset if not present. Also move SPE and TRBE
enablement to only the NS context. They already only enable the features
for NS only and disable them for Secure and Realm worlds. This change
only makes these worlds' context read 0 for easy bitmasking.

There's only a single snag on SPE and TRBE. Currently, their fields have
the same values and any world asymmetry is handled by hardware. Since we
don't want to do that, the buffers' ownership will change if we just set
the fields to 0 for non-NS worlds. Doing that, however, exposes Secure
state to a potential denial of service attack - a malicious NS can
enable profiling and call an SMC. Then, the owning security state will
change and since no SPE/TRBE registers are contexted, Secure state will
start generating records. Always have NS world own the buffers to
prevent this.

Finally, get rid of manage_extensions_common() as it's just a level of
indirection to enable a single feature.

Change-Id: I487bd4c70ac3e2105583917a0e5499e0ee248ed9
Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com>
2025-01-07 07:59:28 +00:00
.husky build(npm): adhere to Husky deprecation notice 2024-03-07 16:13:15 +00:00
bl1 fix(cpus): modify the fix for Cortex-A75 erratum 764081 2024-10-03 10:07:47 -05:00
bl2 Merge changes from topic "early_console" into integration 2024-05-08 23:12:11 +02:00
bl2u build: remove MAKE_BUILD_STRINGS function 2024-04-29 12:47:01 +00:00
bl31 feat(fpmr): disable FPMR trap 2024-12-12 10:03:23 -06:00
bl32 feat(cm): test integrity of el1_ctx registers 2024-11-08 11:05:13 +00:00
common feat(fpmr): disable FPMR trap 2024-12-12 10:03:23 -06:00
docs Merge "fix(cert-create): add default keysize to Brainpool ECDSA" into integration 2024-12-31 13:44:30 +01:00
drivers refactor(mbedtls): rename default mbedtls confs 2024-12-09 15:59:45 +00:00
fdts Merge changes from topic "mcn" into integration 2024-12-19 14:32:13 +01:00
include refactor(cm): clean up per-world context 2025-01-07 07:59:28 +00:00
lib refactor(cm): clean up per-world context 2025-01-07 07:59:28 +00:00
licenses feat(dice): add typedefs from the Open DICE repo 2024-03-06 15:44:55 +01:00
make_helpers feat(fpmr): disable FPMR trap 2024-12-12 10:03:23 -06:00
plat feat(aarch64): add DBGPRCR_EL1 register accessors 2025-01-02 11:23:55 +01:00
services refactor(cm): clean up per-world context 2025-01-07 07:59:28 +00:00
tools fix(cert-create): add default keysize to Brainpool ECDSA 2024-12-31 11:48:43 +01:00
.checkpatch.conf Re-apply GIT_COMMIT_ID check for checkpatch 2019-07-12 11:06:24 +01:00
.commitlintrc.js build(npm): update Node.js and all packages 2024-02-27 18:50:10 +00:00
.ctags feat(build): add ctags recipes for indexing assembly files 2024-08-29 15:58:24 +01:00
.cz-adapter.cjs build(npm): fix Commitizen ES Module errors 2024-03-07 16:13:39 +00:00
.cz.json build(npm): fix Commitizen ES Module errors 2024-03-07 16:13:39 +00:00
.editorconfig chore(commitlint): tell editors commit line lengths are 72 characters 2024-10-16 13:44:51 +01:00
.gitignore fix: .gitignore to include memory tools 2023-08-11 11:49:53 +01:00
.gitreview Specify integration as the default branch for git-review 2020-04-02 07:57:17 +00:00
.nvmrc build(npm): update Node.js and all packages 2024-02-27 18:50:10 +00:00
.readthedocs.yaml fix(docs): point poetry readthedocs virtual env 2024-08-01 15:48:44 +00:00
.versionrc.cjs build(npm): update Node.js and all packages 2024-02-27 18:50:10 +00:00
changelog.yaml docs(changelog): add subsection common 2024-11-19 10:30:21 -06:00
dco.txt Drop requirement for CLA in contribution.md 2016-09-27 21:52:03 +01:00
license.rst doc: De-duplicate readme and license files 2019-10-08 16:36:15 +00:00
Makefile chore: drop -fno-builtin 2024-12-17 13:26:12 +00:00
package-lock.json chore(deps): bump micromatch 2024-11-25 10:34:31 +00:00
package.json docs(changelog): changelog for v2.12 release 2024-11-19 18:08:58 -06:00
poetry.lock chore(deps): bump jinja2 in the pip group across 1 directory 2025-01-02 14:25:11 +00:00
pyproject.toml docs(changelog): changelog for v2.12 release 2024-11-19 18:08:58 -06:00
readme.rst docs: fix link to TBBR specification 2024-02-02 15:31:12 +01:00

Trusted Firmware-A
==================

Trusted Firmware-A (TF-A) is a reference implementation of secure world software
for `Arm A-Profile architectures`_ (Armv8-A and Armv7-A), including an Exception
Level 3 (EL3) `Secure Monitor`_. It provides a suitable starting point for
productization of secure world boot and runtime firmware, in either the AArch32
or AArch64 execution states.

TF-A implements Arm interface standards, including:

-  `Power State Coordination Interface (PSCI)`_
-  `Trusted Board Boot Requirements CLIENT (TBBR-CLIENT)`_
-  `SMC Calling Convention`_
-  `System Control and Management Interface (SCMI)`_
-  `Software Delegated Exception Interface (SDEI)`_

The code is designed to be portable and reusable across hardware platforms and
software models that are based on the Armv8-A and Armv7-A architectures.

In collaboration with interested parties, we will continue to enhance TF-A
with reference implementations of Arm standards to benefit developers working
with Armv7-A and Armv8-A TrustZone technology.

Users are encouraged to do their own security validation, including penetration
testing, on any secure world code derived from TF-A.

More Info and Documentation
---------------------------

To find out more about Trusted Firmware-A, please `view the full documentation`_
that is available through `trustedfirmware.org`_.

--------------

*Copyright (c) 2013-2019, Arm Limited and Contributors. All rights reserved.*

.. _Armv7-A and Armv8-A: https://developer.arm.com/products/architecture/a-profile
.. _Secure Monitor: http://www.arm.com/products/processors/technologies/trustzone/tee-smc.php
.. _Power State Coordination Interface (PSCI): PSCI_
.. _PSCI: http://infocenter.arm.com/help/topic/com.arm.doc.den0022d/Power_State_Coordination_Interface_PDD_v1_1_DEN0022D.pdf
.. _Trusted Board Boot Requirements CLIENT (TBBR-CLIENT): https://developer.arm.com/docs/den0006/latest
.. _SMC Calling Convention: http://infocenter.arm.com/help/topic/com.arm.doc.den0028b/ARM_DEN0028B_SMC_Calling_Convention.pdf
.. _System Control and Management Interface (SCMI): SCMI_
.. _SCMI: http://infocenter.arm.com/help/topic/com.arm.doc.den0056a/DEN0056A_System_Control_and_Management_Interface.pdf
.. _Software Delegated Exception Interface (SDEI): SDEI_
.. _SDEI: http://infocenter.arm.com/help/topic/com.arm.doc.den0054a/ARM_DEN0054A_Software_Delegated_Exception_Interface.pdf
.. _Arm A-Profile architectures: https://developer.arm.com/architectures/cpu-architecture/a-profile
.. _view the full documentation: https://www.trustedfirmware.org/docs/tf-a
.. _trustedfirmware.org: http://www.trustedfirmware.org