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2dc80e4931
In AARCH32 mode, cortex_a72_reset_func branches to address in lr register instead of r5 register. This leads to linux boot failure of Cortex-A72 cores in AARCH32 mode on Juno-R2 board. This patch fixes the branching of cortex_a72_reset_func to r5 register as in cortex_a57_reset_func implementation. Signed-off-by: Manoj Kumar <manoj.kumar3@arm.com> |
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| .. | ||
| aem_generic.S | ||
| cortex_a5.S | ||
| cortex_a7.S | ||
| cortex_a9.S | ||
| cortex_a12.S | ||
| cortex_a15.S | ||
| cortex_a17.S | ||
| cortex_a32.S | ||
| cortex_a53.S | ||
| cortex_a57.S | ||
| cortex_a72.S | ||
| cpu_helpers.S | ||