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lib/cpus: fix branching in reset function for cortex-a72 AARCH32 mode

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In AARCH32 mode, cortex_a72_reset_func branches to address in lr
register instead of r5 register. This leads to linux boot failure
of Cortex-A72 cores in AARCH32 mode on Juno-R2 board.

This patch fixes the branching of cortex_a72_reset_func to r5
register as in cortex_a57_reset_func implementation.

Signed-off-by: Manoj Kumar <manoj.kumar3@arm.com>
This commit is contained in:
Manoj Kumar 2018-01-19 17:51:31 +05:30
parent 9fd4a36c40
commit 2dc80e4931
1 changed files with 1 additions and 1 deletions
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2
lib/cpus/aarch32/cortex_a72.S
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@ -109,7 +109,7 @@ func cortex_a72_reset_func
orr64_imm r0, r1, CORTEX_A72_ECTLR_SMP_BIT
stcopr16 r0, r1, CORTEX_A72_ECTLR
isb
bx lr
bx r5
endfunc cortex_a72_reset_func
/* ----------------------------------------------------